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    • 1. 发明授权
    • Aperture in a semiconductor material, and the production and use thereof
    • 半导体材料中的孔,以及其生产和使用
    • US06794296B1
    • 2004-09-21
    • US09786966
    • 2001-04-10
    • Rainer KassingChristophe MihalceaEgbert Oesterschulze
    • Rainer KassingChristophe MihalceaEgbert Oesterschulze
    • H01L21302
    • B81C1/00087B81B2201/047B81B2203/0361B81C2201/0132G01Q60/06G01Q60/22G01Q60/38G02B27/58H01J9/02H01J37/09
    • The invention relates to a method for producing an aperture (10) in a semiconductor material (12) comprising the following steps: Preparing a semiconductor wafer (14), for example, a (100)-oriented silicon wafer having an upper surface (16) and a lower surface (18); producing a cavity (20) with a side wall (22) in the upper surface (16) of the semiconductor wafer (14) by partially etching said upper surface (16), whereby the cavity (20) comprises a closed bottom area (24) which faces the lower surface (18) and which preferably has, in particular, a convex or, in particular, a concave corner or edge or a curvature of this type. After depositing an oxide layer (26) on the semiconductor material (12) at least in the area of the cavity (20) by oxidizing the semiconductor material (12), whereby the oxide layer (26) preferably comprises an inhomogeneity (28) in the bottom area (24), the semiconductor material (14) is selectively etched back on the lower surface (18) of the semiconductor wafer (14) until at least the oxide layer (26) located in the bottom area (24) is exposed. Afterwards, the exposed oxide layer (26) is etched until it is at least severed. In addition, the invention relates to an aperture (10) in a semiconductor material (12) especially produced according to the inventive method, and to different uses of such an aperture (10).
    • 本发明涉及一种用于在半导体材料(12)中制造孔(10)的方法,包括以下步骤:准备半导体晶片(14),例如具有上表面(16)的(100)取向的硅晶片 )和下表面(18); 通过部分地蚀刻所述上表面(16),在半导体晶片(14)的上表面(16)中产生具有侧壁(22)的空腔(20),由此空腔(20)包括封闭的底部区域 ),其特别优选地具有凸形或特别是这种类型的凹角或边缘或曲率。 在通过氧化半导体材料(12)至少在空腔(20)的区域中在半导体材料(12)上沉积氧化物层(26)之后,氧化物层(26)优选地包含不均匀性(28) 底部区域(24),半导体材料(14)被选择性地回蚀在半导体晶片(14)的下表面(18)上,直到至少位于底部区域(24)中的氧化物层(26)被暴露 。 之后,暴露的氧化物层(26)被蚀刻直至至少被切断。 另外,本发明涉及一种特别根据本发明方法制造的半导体材料(12)中的孔(10)以及这种孔(10)的不同用途。
    • 2. 发明申请
    • Method for producing at least one small opening in a layer on a substrate and components produced according ot said method
    • 用于在基板上的层中生产至少一个小开口的方法和根据所述方法制造的部件
    • US20060165957A1
    • 2006-07-27
    • US10523468
    • 2003-08-04
    • Egbert OesterschulzeRainer KassingGeorgi Georgiev
    • Egbert OesterschulzeRainer KassingGeorgi Georgiev
    • B32B3/10
    • G01Q70/16B81B2201/047B81C1/00087B81C2201/0132G01Q40/02G01Q60/22Y10T428/24273Y10T428/24479
    • A method is described for producing at least one small opening (10) in a layer on a substrate (1), in particular a semiconductor substrate. The substrate (1) is provided on the upper side (2) with at least one tapering recess (6), which has a tip portion (4) and side walls (5), and the upper side (2) of the substrate (1) is covered at least in the region of the recess (6) with a layer (7) made of an etchable material. According to the invention, the opening (10) is produced from the upper side (2) by selective opening of the layer (7) by means of an anisotropic plasma etching method which is matched to the material of the layer (7), the material, the etching gases and the etching parameters being chosen such that in the region of a tip portion (9) of the layer (7), which tip portion (9) lies on the tip portion (4) of the substrate (1), a greater etching rate is produced than in the region of side walls (8) of the layer (7) which lie on the side walls (5) of the substrate (1). In addition, calibration standards, bending beams and other component parts, which are produced according to this method, are described (FIG. 1).
    • 描述了一种用于在衬底(1),特别是半导体衬底上的层中生产至少一个小开口(10)的方法。 基板(1)在上侧(2)上设置有至少一个锥形凹部(6),其具有尖端部分(4)和侧壁(5)以及基板的上侧(2) 至少在凹部(6)的区域中覆盖有由可蚀刻材料制成的层(7)。 根据本发明,通过与层(7)的材料匹配的各向异性等离子体蚀刻方法,通过选择性地打开层(7),从上侧(2)制造开口(10), 材料,蚀刻气体和蚀刻参数被选择为使得在尖端部分(9)位于基底(1)的尖端部分(4)上的层(7)的尖端部分(9)的区域中, 比在位于基板(1)的侧壁(5)上的层(7)的侧壁(8)区域产生更大的蚀刻速率。 此外,描述了根据该方法制造的校准标准,弯曲梁和其他部件,(图1)。