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    • 3. 发明授权
    • Efficient delayed overhead processing techniques
    • 高效的延迟开销处理技术
    • US08380871B1
    • 2013-02-19
    • US12409365
    • 2009-03-23
    • Desmond AmbroseGlenn Henshaw
    • Desmond AmbroseGlenn Henshaw
    • G06F15/16
    • H04J3/0623
    • Techniques for processing overhead bytes in SONET or SDH frames are provided. Memory stores overhead bytes from the SONET (or SDH) frames. One or more processors load the overhead bytes from the memory. The one or more processors can process the overhead bytes away from the data path at a slower data rate than the data rate of data on the data path. By processing the overhead bytes at a slower data rate, less circuitry is needed to process the overhead bytes. Bytes on the data path are stored in a first-in-first-out delay buffer, while the overhead bytes are processed away from the data path, to maintain alignment between output signals of the processors and bytes on the data path.
    • 提供了用于处理SONET或SDH帧中的开销字节的技术。 存储器从SONET(或SDH)帧存储开销字节。 一个或多个处理器从内存中加载开销字节。 一个或多个处理器可以以比数据路径上的数据速率更慢的数据速率来处理远离数据路径的开销字节。 通过以较慢的数据速率处理开销字节,需要较少的电路来处理开销字节。 数据路径上的字节存储在先进先出的延迟缓冲器中,而开销字节被处理为远离数据路径,以保持处理器的输出信号与数据路径上的字节之间的对齐。
    • 6. 发明授权
    • Techniques for frame detection and word alignment
    • 帧检测和字对齐技术
    • US07230956B1
    • 2007-06-12
    • US10340203
    • 2003-01-10
    • Desmond AmbroseAntoine Alary
    • Desmond AmbroseAntoine Alary
    • H04J3/07
    • H04J3/0605H04J3/1611
    • A system receives input data frames that are configured according to a SONET or an SDH standard. The input data is converted to parallel data. The system provides groups of bits along parallel signal lines. In each group of bits, N contiguous bits in the group form a complete word of input data. The system identifies the boundary between complete words in the input data by comparing subsets of the bits to predefined framing patterns. The system then aligns the input data based on the location of each word using the boundary information. The output data of the system includes data that is word aligned. The system can also detect boundaries between the frames.
    • 系统接收根据SONET或SDH标准配置的输入数据帧。 输入数据被转换为并行数据。 该系统沿着并行信号线提供一组位。 在每组比特中,组中的N个连续比特形成输入数据的完整字。 该系统通过将比特子集与预定义的成帧模式进行比较来识别输入数据中完整词之间的边界。 然后系统使用边界信息根据每个单词的位置来对齐输入数据。 系统的输出数据包括字对齐的数据。 系统还可以检测帧之间的边界。
    • 8. 发明授权
    • Framing and word alignment for partially reconfigurable programmable circuits
    • 用于部分可重新配置的可编程电路的成帧和字对齐
    • US07143199B1
    • 2006-11-28
    • US10699012
    • 2003-10-31
    • Desmond Ambrose
    • Desmond Ambrose
    • G06F3/00G06F17/50
    • G06F17/5054Y02T10/82
    • Techniques for aligning the data path inside a receiver to the word and frame boundaries of an input data stream using reconfigurable programmable circuit elements are provided. The input data stream can be organized according to a data transmission protocol such as SONET or SDH. A first programmable circuit elements are initially configured as a frame detection block. The frame detection block detects the boundaries between words in the input data. A portion of the frame detection block is then reconfigured as a word align block. Another portion of the frame detection block is reconfigured as a block that monitors bits in each frame to ensure that the frame boundaries remain in the same bit positions. If the frame boundaries change, the programmable circuit elements are reconfigured to implement the frame detection block again.
    • 提供了使用可重新配置的可编程电路元件将接收机内的数据路径对准输入数据流的字和边界的技术。 可以根据诸如SONET或SDH的数据传输协议来组织输入数据流。 第一可编程电路元件最初被配置为帧检测块。 帧检测块检测输入数据中的字之间的边界。 然后将帧检测块的一部分重新配置为字对齐块。 帧检测块的另一部分被重新配置为监视每帧中的位以确保帧边界保持在相同位位置的块。 如果帧边界改变,则可编程电路元件被重新配置以再次实现帧检测块。