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1. 发明授权

US4085342A High voltage A.C. to low voltage D.C. switching interface circuit 失效
标题翻译：高电压A.C.到低电压D.C.开关接口电路
公开(公告)号：US4085342A
公开(公告)日：1978-04-18
申请号：US736854
申请日：1976-10-29
申请人： Derek J. Parkyn
发明人： Derek J. Parkyn
IPC分类号： H03G11/02 , D06F33/02 , G05B19/02 , H02M7/217 , H03K5/08 , H03K5/22 , H03K17/00 , H03K3/286
CPC分类号： H02M7/217 , D06F33/02 , H03K5/22 , D06F2210/00
摘要： An interface circuit for coupling a high voltage AC source to a bistable circuit for deriving a low voltage DC output signal at first and second voltage levels dependent on the condition of a switch. The AC voltage is coupled via the switch, a first voltage divider and first diode means to the set input of the bistable circuit and directly via a second voltage divider and second diode means to the reset input of the bistable circuit. The voltage ratios of the two dividers are chosen so that the bistable circuit is set and remains set when the switch is closed and is reset and remains reset when the switch is opened.
摘要翻译：一种用于将高压AC源耦合到双稳态电路的接口电路，用于根据开关的状况在第一和第二电压电平下导出低电压DC输出信号。 AC电压通过开关，第一分压器和第一二极管装置耦合到双稳态电路的设定输入，并且直接经由第二分压器和第二二极管装置耦合到双稳态电路的复位输入端。选择两个分频器的电压比，使得当开关闭合并且复位时双稳态电路被设置并保持置位，并且当开关断开时保持复位。

2. 发明授权

US4675725A Image superimposing system 失效
标题翻译：图像叠加系统
公开(公告)号：US4675725A
公开(公告)日：1987-06-23
申请号：US642867
申请日：1984-08-21
申请人： Derek J. Parkyn
发明人： Derek J. Parkyn
IPC分类号： G06T1/00 , G06T1/20 , G06T5/00 , H04N5/265 , H04N9/76 , H04N1/46
CPC分类号： H04N5/265 , G06T1/0007
摘要： This relates to the modification of the whole, or a substantial part, of an image, for example to the merging of two images or to applying a tint to an image. To achieve this, using only the normal data processing capability provided for handling a single image, two images (I.sub.1, I.sub.2) are stored in first and second portions of a normal image store; for example, if the normal image store has a capacity of 1024.sup.2 pixels, each image may be stored at a resolution of 512.sup.2 pixels. In a further 1-bit store there is stored a mask consisting of alternate 1's and 0's and the mask output is used to select pixels from the two portions of the image store alternately. The mask output also selects multiplying factors A and (1-A) alternately. Then each pixel from the first image, after multiplication by A, is added to an immediately succeeding pixel from the second image after its multiplication by (1-A). The resulting sum signals are used to control an image display (34). This achieves merging of two images within the normal data processing capability provided for one image. When a tint is to be applied to the first image, the same value is used for each pixel of the second "image".
摘要翻译：这涉及图像的整体或主要部分的修改，例如对两个图像的合并或对图像应用色调。为了实现这一点，仅使用为处理单个图像提供的正常数据处理能力，将两个图像（I1，I2）存储在正常图像存储器的第一和第二部分中; 例如，如果正常图像存储具有10242像素的容量，则每个图像可以以5122像素的分辨率存储。在另一个1位存储中存储由交替1和0组成的掩码，并且掩码输出用于交替地从图像存储的两个部分中选择像素。掩模输出也交替选择乘法因子A和（1-A）。然后，在乘以A之后，来自第一图像的每个像素被乘以A（1-A）后从第二个图像被加到紧随其后的像素上。所得到的和信号用于控制图像显示（34）。这实现了为一个图像提供的正常数据处理能力内的两个图像的合并。当将色调应用于第一图像时，对于第二“图像”的每个像素使用相同的值。

3. 发明授权

US4370747A Data transmission 失效
标题翻译：数据传输
公开(公告)号：US4370747A
公开(公告)日：1983-01-25
申请号：US216234
申请日：1980-12-15
申请人： Richard E. F. Bugg , Derek J. Parkyn
发明人： Richard E. F. Bugg , Derek J. Parkyn
IPC分类号： H04L27/10 , H04L27/12 , H03C3/04
CPC分类号： H04L27/12
摘要： A circuit arrangement for transmitting binary data elements `0` and `1` by frequency shift using two tone frequencies f0 and f1. The circuit arrangement comprises a modulator, an exclusive OR-gate and an integrator. A data signal DS produces from the modulator a digital signal DSS which by decoding of the integrator results in a tone signal TS comprising f0 or f1. The action of the OR-gate to which both signals DS and DSS are applied causes the amplitude of the tone signal TS to be substantially the same for each of the tone frequencies f0 and f1. The OR-gate may change either the effective resistive input into the integrator for each tone frequency or it may change the amplitude of the signal DSS for each tone frequency.
摘要翻译：一种通过使用两个音频f0和f1通过频移发送二进制数据元素“0”和“1”的电路装置。电路装置包括调制器，异或门和积分器。数据信号DS从调制器产生数字信号DSS，数字信号通过积分器的解码产生包括f0或f1的音调信号TS。同时施加信号DS和DSS的或门的动作导致音调信号TS的幅度对于每个音调频率f0和f1基本相同。 OR门可以将每个音调频率的有效电阻输入改变为积分器，或者可以改变每个音调频率的信号DSS的幅度。

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