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1. 发明授权

US07235859B2 Arrangement and process for protecting fuses/anti-fuses 有权
标题翻译：保险丝/防熔丝的安排和处理
公开(公告)号：US07235859B2
公开(公告)日：2007-06-26
申请号：US10957492
申请日：2004-10-01
申请人： Axel Brintzinger , Octavio Trovarelli , David Wallis , Wolfgang Leiberg
发明人： Axel Brintzinger , Octavio Trovarelli , David Wallis , Wolfgang Leiberg
IPC分类号： H01L29/00
CPC分类号： H01L23/5254 , H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： An arrangement for protecting fuses/anti-fuses on chips which serve to activate redundant circuits or chip functions includes a passivation layer (e.g., hard passivation) arranged on a fully processed chip with the exception of metal contacts of a metallization level and the fuses. The chip is provided with a redistribution layer that is electrically contact-connected to the metallization level, and to a process for protecting such fuses/anti-fuses. The invention is now based on the object of ensuring sufficient protection of fuses/anti-fuses on integrated circuits. This is achieved by virtue of the fact that a dielectric (3.1, 3.2), which covers at least the region of the fuses/anti-fuses (4) and to which the redistribution layer (2) comprising the combination of materials Cu/Ni/Au is applied, is arranged on the passivation layer (5).
摘要翻译：用于保护用于激活冗余电路或芯片功能的芯片上的熔断器/防熔丝的布置包括布置在完全处理的芯片上的钝化层（例如，硬钝化），除了金属化水平的金属触点和熔丝之外。该芯片设置有与金属化层电接触连接的再分布层，以及用于保护这种保险丝/防熔丝的工艺。本发明的目的在于确保集成电路上的保险丝/抗熔断器的充分保护。这通过以下事实来实现：电介质（3.1,3.2），其至少覆盖保险丝/抗熔丝（4）的区域，再分布层（2）包括材料Cu / Ni的组合 / Au被布置在钝化层（5）上。

2. 发明申请

US20050219044A1 Emergency, contingency and incident management system and method 审中-公开
标题翻译：应急，应变和事故管理制度和方法
公开(公告)号：US20050219044A1
公开(公告)日：2005-10-06
申请号：US11082189
申请日：2005-03-16
申请人： John Douglass , David Wallis , Nathan Martyn , Aaron Pearse
发明人： John Douglass , David Wallis , Nathan Martyn , Aaron Pearse
IPC分类号： G08B25/00 , G08B29/00
CPC分类号： G08B25/00 , G06Q10/10
摘要： A software system and associated method implements real-time management of events such as emergencies, contingencies and incidents by responding to user inputs and environmental detectors, carrying out defined and custom procedures, establishing communications channels with key personnel and emergency services, maintaining an audit trail of events, broadcasting appropriate instructions, tasks and graphical information to personnel, and providing monitoring, recording and communication facilities for local and/or remote coordinators and command centers.
摘要翻译：软件系统和相关方法通过响应用户输入和环境检测器，执行定义和定制过程，与关键人员和紧急服务建立通信渠道，实现对紧急情况，突发事件和事件等事件的实时管理，维护审计线索的活动，向人员广播适当的指示，任务和图形信息，并为当地和/或远程协调员和指挥中心提供监测，记录和通信设施。

3. 发明授权

US06914906B1 Method for RF network virtual end nodes 失效
标题翻译： RF网络虚拟端节点的方法
公开(公告)号：US06914906B1
公开(公告)日：2005-07-05
申请号：US09108463
申请日：1998-07-01
申请人： Lanny Joe Mullens , David Wallis , Gail Miyamoto , Michael Kronick
发明人： Lanny Joe Mullens , David Wallis , Gail Miyamoto , Michael Kronick
IPC分类号： H04L12/56 , H04L29/12
CPC分类号： H04L45/00 , H04L29/12009 , H04L29/12801 , H04L61/6004 , H04W40/00 , H04W80/04 , H04W88/08
摘要： A method for virtual end nodes indicates in routing information (51) that the data packet is for a “special access” to an end node with a virtual address (60). An RF network device then inserts the identity of the physical end node (virtual address) into user information (62). If an access point (14) determines that the user information is for the virtual address (66), then all virtual end nodes 41-43 receive the data packet and analyze the virtual end node identity from the user information (68).
摘要翻译：虚拟端节点的方法在路由信息（51）中指示数据分组用于对具有虚拟地址（60）的端节点进行“特殊访问”。 RF网络设备然后将物理端节点（虚拟地址）的身份插入到用户信息（62）中。如果接入点（14）确定用户信息是针对虚拟地址（66），则所有虚拟端节点41-43接收数据分组并且从用户信息（68）分析虚拟终端节点身份。

4. 发明申请

US20090041106A1 Variable equalizer apparatus 有权
标题翻译：可变均衡器装置
公开(公告)号：US20090041106A1
公开(公告)日：2009-02-12
申请号：US12213214
申请日：2008-06-16
申请人： Edward Perez , David Wallis
发明人： Edward Perez , David Wallis
IPC分类号： H03H7/30
CPC分类号： H04L25/03885 , H03F3/62 , H03F2200/63
摘要： A variable equalizer apparatus for forward and/or reverse equalizers in an amplifier. The system can include a structure to allow continuous contact of the signal flow as an equalizer is removed; jumpers with fixed resistors and associated capacitors and inductors to produce a variable range over many different values; and/or variable resistance potentiometers with fixed resistors and associated capacitors and inductors to produce a variable range over separate value equalizers.
摘要翻译：用于放大器中的正向和/或反向均衡器的可变均衡器装置。该系统可以包括当均衡器被去除时允许信号流的连续接触的结构; 具有固定电阻器和相关电容器和电感器的跳线器可产生许多不同值的可变范围; 和/或具有固定电阻器和相关电容器和电感器的可变电阻电位器，以在单独的值均衡器上产生可变范围。

5. 发明授权

US07390742B2 Method for producing a rewiring printed circuit board 有权
标题翻译：一种重新布线印刷电路板的制造方法
公开(公告)号：US07390742B2
公开(公告)日：2008-06-24
申请号：US11251594
申请日：2005-10-14
申请人： Axel Brintzinger , Stefan Ruckmich , Octavio Trovarelli , Fritz Uhlendorf, legal representative , David Wallis
发明人： Ingo Uhlendorf
IPC分类号： H01L21/44
CPC分类号： H01L23/49827 , H01L21/4846 , H01L21/486 , H01L2924/0002 , H05K1/0287 , H05K1/0306 , H05K2201/09609 , Y10S438/976 , Y10T428/24273 , Y10T428/24322 , Y10T428/24331 , Y10T428/24917 , H01L2924/00
摘要： The invention relates to a method for producing a rewiring printed circuit board with a substrate wafer having passage connections between a first and a second surface. One embodiment of the method comprises applying and patterning masking layers on the first and the second surfaces, thereby uncovering a first contact location on the first surface and a second contact location on the second surface; applying a protective layer to the second surface in order to protect the corresponding masking layer and the second contact location during subsequent method steps; applying a first conductor structure to the first surface, the first conductor structure on the first surface covering the first contact location; removing the protective layer on the second surface; and applying a second conductor structure to the second surface, the second conductor structure on the second surface covering the second contact location.
摘要翻译：本发明涉及一种用于生产具有在第一和第二表面之间具有通道连接的基底晶片的再布线印刷电路板的方法。该方法的一个实施例包括在第一和第二表面上施加和图案化掩模层，从而揭露第一表面上的第一接触位置和第二表面上的第二接触位置; 在第二表面施加保护层，以便在随后的方法步骤期间保护相应的掩蔽层和第二接触位置; 将第一导体结构施加到第一表面，第一表面上的第一导体结构覆盖第一接触位置; 去除第二表面上的保护层; 以及将第二导体结构施加到所述第二表面，所述第二表面上的所述第二导体结构覆盖所述第二接触位置。

6. 发明申请

US20050258506A1 Arrangement and process for protecting fuses/anti-fuses 有权
标题翻译：保险丝/防熔丝的安排和处理
公开(公告)号：US20050258506A1
公开(公告)日：2005-11-24
申请号：US10957492
申请日：2004-10-01
申请人： Axel Brintzinger , Octavio Trovarelli , David Wallis , Wolfgang Leiberg
发明人： Axel Brintzinger , Octavio Trovarelli , David Wallis , Wolfgang Leiberg
IPC分类号： H01L21/82 , H01L23/28 , H01L23/525 , H01L29/00
CPC分类号： H01L23/5254 , H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： An arrangement for protecting fuses/anti-fuses on chips which serve to activate redundant circuits or chip functions includes a passivation layer (e.g., hard passivation) arranged on a fully processed chip with the exception of metal contacts of a metallization level and the fuses. The chip is provided with a redistribution layer that is electrically contact-connected to the metallization level, and to a process for protecting such fuses/anti-fuses. The invention is now based on the object of ensuring sufficient protection of fuses/anti-fuses on integrated circuits. This is achieved by virtue of the fact that a dielectric (3.1, 3.2), which covers at least the region of the fuses/anti-fuses (4) and to which the redistribution layer (2) comprising the combination of materials Cu/Ni/Au is applied, is arranged on the passivation layer (5).
摘要翻译：用于保护用于激活冗余电路或芯片功能的芯片上的熔断器/防熔丝的布置包括布置在完全处理的芯片上的钝化层（例如，硬钝化），除了金属化水平的金属触点和熔丝之外。该芯片设置有与金属化层电接触连接的再分布层，以及用于保护这种保险丝/防熔丝的工艺。本发明的目的在于确保集成电路上的保险丝/抗熔断器的充分保护。这通过以下事实来实现：电介质（3.1,3.2），其至少覆盖保险丝/抗熔丝（4）的区域，再分布层（2）包括材料Cu / Ni的组合 / Au被布置在钝化层（5）上。

7. 发明授权

US06633379B2 Apparatus and method for measuring the degradation of a tool 失效
标题翻译：用于测量工具退化的装置和方法
公开(公告)号：US06633379B2
公开(公告)日：2003-10-14
申请号：US09877531
申请日：2001-06-08
申请人： Michael Roesner , Manfred Schneegans , David Wallis
发明人： Michael Roesner , Manfred Schneegans , David Wallis
IPC分类号： G01J328
CPC分类号： B24B37/005 , B23Q17/0909 , B23Q17/24 , B24B21/04 , B24B27/0683 , B24B49/12 , B24B49/183 , G01N21/65
摘要： A machining apparatus (10) comprises a material removing tool (12) movably mounted for removing material from a workpiece (14); means for illuminating (42, 54) a sample area upon a tool surface (34) with excitation radiation; means for receiving (42, 54) sample light emitted from the sample area; a spectral analyzer (54) for performing a spectral analysis of the sample light received; and means for determining (60) the condition of the tool at the sample area from the spectral analysis of the sample light. The wear of the tool (12) is determined as such a condition. Operation parameters of the machining apparatus (10) are adjusted according to the determined wear. An example application is a wafer dicing tool.
摘要翻译：加工装置（ 10 ）包括可移动地安装以从工件去除材料的材料去除工具（ 12 HIL> 14 ）; 用于通过激发辐射照射（ 42,54 ）工具表面上的样品区域（ 34 ）的装置; 用于从样品区域发射的样品光的装置（ 42,54 ）。用于对所接收的样本光进行光谱分析的光谱分析仪（ 54 ）以及用于从样本光的光谱分析中确定（ 60 ）样品区域中的工具的条件的装置。刀具的磨损（ 12 ）被确定为这样的条件。根据确定的磨损调整加工装置（ 10 ）的操作参数。示例应用是晶片切割工具。

8. 发明授权

US08077474B2 Variable equalizer apparatus 有权
标题翻译：可变均衡器装置
公开(公告)号：US08077474B2
公开(公告)日：2011-12-13
申请号：US12213214
申请日：2008-06-16
申请人： Edward Perez , David Wallis
发明人： Edward Perez , David Wallis
IPC分类号： H05K7/00
CPC分类号： H04L25/03885 , H03F3/62 , H03F2200/63
摘要： A variable equalizer apparatus for forward and/or reverse equalizers in an amplifier. The system can include a structure to allow continuous contact of the signal flow as an equalizer is removed; jumpers with fixed resistors and associated capacitors and inductors to produce a variable range over many different values; and/or variable resistance potentiometers with fixed resistors and associated capacitors and inductors to produce a variable range over separate value equalizers.
摘要翻译：用于放大器中的正向和/或反向均衡器的可变均衡器装置。该系统可以包括当均衡器被去除时允许信号流的连续接触的结构; 具有固定电阻器和相关电容器和电感器的跳线器可产生许多不同值的可变范围; 和/或具有固定电阻器和相关电容器和电感器的可变电阻电位器，以在单独的值均衡器上产生可变范围。

9. 发明授权

US06709953B2 Method of applying a bottom surface protective coating to a wafer, and wafer dicing method 有权
标题翻译：将底面保护涂层施加到晶片的方法，以及晶片切割方法
公开(公告)号：US06709953B2
公开(公告)日：2004-03-23
申请号：US10062942
申请日：2002-01-31
申请人： Barbara Vasquez , David Wallis , Sylvia Winter
发明人： Barbara Vasquez , David Wallis , Sylvia Winter
IPC分类号： H01L21301
CPC分类号： H01L21/6835 , H01L21/304 , H01L21/3043 , H01L21/6836 , H01L21/78 , H01L24/27 , H01L2221/68327 , H01L2221/6834 , H01L2224/274 , H01L2924/14 , H01L2924/3512 , H01L2924/00
摘要： The present invention provides a new backside treatment of the wafer. Trenches are cut into the top surface of the wafer by sawing or etching, and after grinding the wafer from the bottom side, a protective material is applied as a surface layer to the bottom surface while filling the trenches with this material. The material is hardened in order to accomplish the sawing process. In another embodiment of the present method, a double foil layer is applied to the rear side of the wafer including a mounting tape and a protective layer facing the wafer rear side.
摘要翻译：本发明提供了晶片的新的背面处理。通过锯切或蚀刻将沟槽切割成晶片的顶表面，并且在从底侧研磨晶片之后，将保护材料作为表面层施加到底表面，同时用该材料填充沟槽。材料硬化以完成锯切过程。在本方法的另一实施例中，将双层箔施加到晶片的后侧，其包括安装带和面向晶片后侧的保护层。

10. 发明申请

US20060121257A1 Method for producing a rewiring printed circuit board 有权
标题翻译：一种重新布线印刷电路板的制造方法
公开(公告)号：US20060121257A1
公开(公告)日：2006-06-08
申请号：US11251594
申请日：2005-10-14
申请人： Axel Brintzinger , Stefan Ruckmich , Octavio Trovarelli , David Wallis
发明人： Axel Brintzinger , Stefan Ruckmich , Octavio Trovarelli , David Wallis
IPC分类号： C23C26/00 , B05D5/12 , B32B3/10 , B32B3/00
CPC分类号： H01L23/49827 , H01L21/4846 , H01L21/486 , H01L2924/0002 , H05K1/0287 , H05K1/0306 , H05K2201/09609 , Y10S438/976 , Y10T428/24273 , Y10T428/24322 , Y10T428/24331 , Y10T428/24917 , H01L2924/00
摘要： The invention relates to a method for producing a rewiring printed circuit board with a substrate wafer having passage connections between a first and a second surface. One embodiment of the method comprises applying and patterning masking layers on the first and the second surfaces, thereby uncovering a first contact location on the first surface and a second contact location on the second surface; applying a protective layer to the second surface in order to protect the corresponding masking layer and the second contact location during subsequent method steps; applying a first conductor structure to the first surface, the first conductor structure on the first surface covering the first contact location; removing the protective layer on the second surface; and applying a second conductor structure to the second surface, the second conductor structure on the second surface covering the second contact location.
摘要翻译：本发明涉及一种用于生产具有在第一和第二表面之间具有通道连接的基底晶片的再布线印刷电路板的方法。该方法的一个实施例包括在第一和第二表面上施加和图案化掩模层，从而揭露第一表面上的第一接触位置和第二表面上的第二接触位置; 在第二表面施加保护层，以便在随后的方法步骤期间保护相应的掩蔽层和第二接触位置; 将第一导体结构施加到第一表面，第一表面上的第一导体结构覆盖第一接触位置; 去除第二表面上的保护层; 以及将第二导体结构施加到所述第二表面，所述第二表面上的所述第二导体结构覆盖所述第二接触位置。

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