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1. 发明授权

US08570072B2 Differential hysteresis comparator circuits and methods 失效
标题翻译：差分滞后比较器电路和方法
公开(公告)号：US08570072B2
公开(公告)日：2013-10-29
申请号：US12917802
申请日：2010-11-02
申请人： David Gozali , Hong Liang Zhang
发明人： David Gozali , Hong Liang Zhang
IPC分类号： H03K5/22
CPC分类号： H03K3/3565
摘要： A comparator circuit for providing hysteresis comprises first and second differentially coupled transistors. The first of the differentially coupled transistors provides drain current to first and second load transistors. The second of the differentially coupled transistors provides drain current to third and fourth load transistors. In one example embodiment, the drain of the first of the differentially coupled transistors also drives the gate of the first and third load transistors, while the drain of the second of the differentially coupled transistors drives the gate of the second and fourth transistors.
摘要翻译：用于提供滞后的比较器电路包括第一和第二差分耦合晶体管。第一个差分耦合晶体管为第一和第二负载晶体管提供漏极电流。差分耦合晶体管中的第二个为第三和第四负载晶体管提供漏极电流。在一个示例实施例中，第一差分耦合晶体管的漏极也驱动第一和第三负载晶体管的栅极，而第二个差分耦合晶体管的漏极驱动第二和第四晶体管的栅极。

2. 发明申请

US20110102021A1 Differential Hysteresis Comparator Circuits and Methods 失效
标题翻译：差分滞后比较器电路和方法
公开(公告)号：US20110102021A1
公开(公告)日：2011-05-05
申请号：US12917802
申请日：2010-11-02
申请人： David Gozali , Hong Liang Zhang
发明人： David Gozali , Hong Liang Zhang
IPC分类号： H03K5/22
CPC分类号： H03K3/3565
摘要： A comparator circuit for providing hysteresis comprises first and second differentially coupled transistors. The first of the differentially coupled transistors provides drain current to first and second load transistors. The second of the differentially coupled transistors provides drain current to third and fourth load transistors. In one example embodiment, the drain of the first of the differentially coupled transistors also drives the gate of the first and third load transistors, while the drain of the second of the differentially coupled transistors drives the gate of the second and fourth transistors.
摘要翻译：用于提供滞后的比较器电路包括第一和第二差分耦合晶体管。第一个差分耦合晶体管为第一和第二负载晶体管提供漏极电流。差分耦合晶体管中的第二个为第三和第四负载晶体管提供漏极电流。在一个示例实施例中，第一差分耦合晶体管的漏极也驱动第一和第三负载晶体管的栅极，而第二个差分耦合晶体管的漏极驱动第二和第四晶体管的栅极。

3. 发明授权

US07843230B1 Differential hysteresis comparator circuits and methods 有权
标题翻译：差分滞后比较器电路和方法
公开(公告)号：US07843230B1
公开(公告)日：2010-11-30
申请号：US12391200
申请日：2009-02-23
申请人： David Gozali , Hong Liang Zhang
发明人： David Gozali , Hong Liang Zhang
IPC分类号： H03K5/22
CPC分类号： H03K3/3565
摘要： A comparator circuit for providing hysteresis comprises first and second differentially coupled transistors. The first of the differentially coupled transistors provides drain current to first and second load transistors. The second of the differentially coupled transistors provides drain current to third and fourth load transistors. In one example embodiment, the drain of the first of the differentially coupled transistors also drives the gate of the first and third load transistors, while the drain of the second of the differentially coupled transistors drives the gate of the second and fourth transistors.
摘要翻译：用于提供滞后的比较器电路包括第一和第二差分耦合晶体管。第一个差分耦合晶体管为第一和第二负载晶体管提供漏极电流。差分耦合晶体管中的第二个为第三和第四负载晶体管提供漏极电流。在一个示例实施例中，第一差分耦合晶体管的漏极也驱动第一和第三负载晶体管的栅极，而第二个差分耦合晶体管的漏极驱动第二和第四晶体管的栅极。

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