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1. 发明授权

US09342352B2 Guest access to address spaces of adapter 有权
标题翻译：客人访问适配器的地址空间
公开(公告)号：US09342352B2
公开(公告)日：2016-05-17
申请号：US12821190
申请日：2010-06-23
申请人： David Craddock , Mark S. Farrell , Thomas A. Gregg , Dan F. Greiner , Damian L. Osisek , Gustav E. Sittmann, III
发明人： David Craddock , Mark S. Farrell , Thomas A. Gregg , Dan F. Greiner , Damian L. Osisek , Gustav E. Sittmann, III
IPC分类号： G06F7/04 , G06F9/46 , G06F9/455
CPC分类号： G06F9/468 , G06F9/45558 , G06F2009/45579 , G06F2213/0038
摘要： An authorization mechanism allows a host executing a guest operating system to grant permission for the guest to directly access an adapter function's address spaces without host intervention. This access is via instructions implemented based on the architecture of the adapter function. The host also has the capability to intervene in the execution of the instruction, if desired.
摘要翻译：授权机制允许执行客户机操作系统的主机授权客户端直接访问适配器功能的地址空间，而无需主机干预。该访问通过基于适配器功能的体系结构实现的指令。如果需要，主机还可以干预执行指令。

2. 发明授权

US09195623B2 Multiple address spaces per adapter with address translation 有权
标题翻译：每个适配器具有地址转换的多个地址空间
公开(公告)号：US09195623B2
公开(公告)日：2015-11-24
申请号：US12821174
申请日：2010-06-23
申请人： David Craddock , Thomas A. Gregg , Christoph Raisch
发明人： David Craddock , Thomas A. Gregg , Christoph Raisch
IPC分类号： G06F3/00 , G06F13/28 , G06F12/00 , G06F13/36 , G06F9/26 , G06F12/10
CPC分类号： G06F13/28 , G06F12/1081
摘要： A plurality of address spaces are assigned to an adapter. To select a particular address space for the adapter, a requestor identifier and address space identifier provided in a request by the adapter are used. Each address space may have a different address translation mechanism associated therewith.
摘要翻译：多个地址空间被分配给适配器。为了选择适配器的特定地址空间，使用在适配器的请求中提供的请求者标识符和地址空间标识符。每个地址空间可以具有与其相关联的不同的地址转换机制。

3. 发明授权

US08639858B2 Resizing address spaces concurrent to accessing the address spaces 有权
标题翻译：调整访问地址空间的地址空间的大小
公开(公告)号：US08639858B2
公开(公告)日：2014-01-28
申请号：US12821172
申请日：2010-06-23
申请人： David Craddock , Thomas A. Gregg , Dan F. Greiner , Donald W. Schmidt
发明人： David Craddock , Thomas A. Gregg , Dan F. Greiner , Donald W. Schmidt
IPC分类号： G06F13/28
CPC分类号： G06F13/28 , G06F12/1009 , G06F12/1081 , G06F2212/657
摘要： Address spaces are resized concurrent to accessing those address spaces. The size of an address space can be increased or decreased concurrent to performing read or write operations on the address space. Further, cache entries associated with an address space being decreased in size are purged.
摘要翻译：地址空间会同时调整大小，以访问这些地址空间。可以同时增加或减少地址空间的大小，以对地址空间执行读取或写入操作。此外，清除与尺寸减小的地址空间相关联的缓存条目。

4. 发明授权

US08589603B2 Delaying acknowledgment of an operation until operation completion confirmed by local adapter read operation 有权
标题翻译：延迟确认操作，直到操作完成通过本地适配器读取操作确认
公开(公告)号：US08589603B2
公开(公告)日：2013-11-19
申请号：US12871532
申请日：2010-08-30
申请人： David Craddock , Thomas A. Gregg
发明人： David Craddock , Thomas A. Gregg
IPC分类号： G06F3/00 , G06F13/28 , G06F13/00 , G06F13/42
CPC分类号： G06F13/28
摘要： A request to perform an operation, such as a remote direct memory access (RDMA) write operation or a send operation that writes to memory, is sent from a sending input/output (I/O) adapter (e.g., an RDMA-capable adapter) to a receiving I/O adapter. The receiving I/O adapter receives the request and initiates performance of the operation, but delays sending an acknowledgment for the operation. The acknowledgment is delayed until the operation is complete (i.e., until the memory is updated and the data is visible to the remote processor), as determined by a read operation initiated and performed by the receiving I/O adapter transparent to the sending I/O adapter.
摘要翻译：从发送输入/输出（I / O）适配器（例如，支持RDMA的适配器）发送执行诸如远程直接存储器访问（RDMA）写入操作或写入存储器的发送操作之类的操作的请求）到接收I / O适配器。接收I / O适配器接收请求并发起操作的性能，但延迟发送操作的确认。确认被延迟，直到操作完成（即，直到存储器被更新并且数据对于远程处理器可见），由接收I / O适配器发起和执行的读操作确定，该读操作对发送I / O适配器。

5. 发明授权

US08417911B2 Associating input/output device requests with memory associated with a logical partition 有权
标题翻译：将输入/输出设备请求与与逻辑分区关联的内存相关联
公开(公告)号：US08417911B2
公开(公告)日：2013-04-09
申请号：US12821224
申请日：2010-06-23
申请人： David Craddock , Thomas A. Gregg , Eric N. Lais
发明人： David Craddock , Thomas A. Gregg , Eric N. Lais
IPC分类号： G06F13/00 , G06F13/28 , G06F3/00
CPC分类号： G06F13/16 , G06F2213/0026
摘要： An address controller includes a bit selector that receives a first portion of a requester id and selects a bit from a vector that identifies whether a requesting function is an SR-IOV device or a standard PCIe device. The controller also includes a selector coupled to the bit selector that forms an output comprised of either a second portion of the RID or a first portion of the address portion based on an input received from the selector and an address control unit that receives the first portion of the RID and the output and determines the LPAR that owns the requesting function based thereon, the address control unit providing the corrected memory request to the memory.
摘要翻译：地址控制器包括位选择器，其接收请求者id的第一部分，并从标识请求功能是SR-IOV设备还是标准PCIe设备的向量中选择一个位。控制器还包括耦合到比特选择器的选择器，其基于从选择器接收的输入形成由RID的第二部分或地址部分的第一部分组成的输出，以及接收第一部分的地址控制单元的RID和输出，并且基于此来确定拥有请求功能的LPAR，地址控制单元向存储器提供校正的存储器请求。

6. 发明申请

US20110321061A1 CONVERTING A MESSAGE SIGNALED INTERRUPTION INTO AN I/O ADAPTER EVENT NOTIFICATION 有权
标题翻译：将消息信号中断转换为I / O适配器事件通知
公开(公告)号：US20110321061A1
公开(公告)日：2011-12-29
申请号：US12821175
申请日：2010-06-23
申请人： David Craddock , Janet R. Easton , Mark S. Farrell , Thomas A. Gregg , Eric N. Lais , Gustav E. Sittmann, III
发明人： David Craddock , Janet R. Easton , Mark S. Farrell , Thomas A. Gregg , Eric N. Lais , Gustav E. Sittmann, III
IPC分类号： G06F9/44 , G06F13/24
CPC分类号： G06F13/24 , G06F9/4812 , G06F2213/0026
摘要： One or more message signaled interruption requests from one or more input/output (I/O) adapters are converted to I/O adapter event notifications. Each I/O adapter event notification includes the setting of one or more specific indicators in system memory and an interruption request, the first of which results in a pending I/O adapter interruption request. While a request for an I/O adapter interruption is pending, subsequent message signaled interruption requests are converted to I/O adapter event notifications, but do not result in additional requests for I/O adapter interruptions.
摘要翻译：一个或多个来自一个或多个输入/输出（I / O）适配器的信号中断请求被转换为I / O适配器事件通知。每个I / O适配器事件通知包括系统内存中的一个或多个特定指示符的设置和中断请求，其中第一个会导致挂起的I / O适配器中断请求。当I / O适配器中断的请求处于待处理状态时，后续的消息信号中断请求将转换为I / O适配器事件通知，但不会导致对I / O适配器中断的其他请求。

7. 发明申请

US20110320764A1 LOAD INSTRUCTION FOR COMMUNICATING WITH ADAPTERS 有权
标题翻译：用于与适配器通信的负载指令
公开(公告)号：US20110320764A1
公开(公告)日：2011-12-29
申请号：US12821182
申请日：2010-06-23
申请人： David Craddock , Mark S. Farrell , Thomas A. Gregg , Dan F. Greiner
发明人： David Craddock , Mark S. Farrell , Thomas A. Gregg , Dan F. Greiner
IPC分类号： G06F12/06
CPC分类号： G06F9/30043
摘要： Communication with adapters of a computing environment is facilitated. Instructions are provided that explicitly target the adapters. Information provided in an instruction is used to steer the instruction to an appropriate location within the adapter.
摘要翻译：与计算环境的适配器通信便利。提供明确指定适配器的说明。指令中提供的信息用于将指令转向适配器内的适当位置。

8. 发明申请

US20110320663A1 CONVERTING A MESSAGE SIGNALED INTERRUPTION INTO AN I/O ADAPTER EVENT NOTIFICATION TO A GUEST OPERATING SYSTEM 有权
标题翻译：将消息信号中断转换为I / O适配器事件通知给用户操作系统
公开(公告)号：US20110320663A1
公开(公告)日：2011-12-29
申请号：US12821177
申请日：2010-06-23
申请人： Frank W. Brice, JR. , David Craddock , Janet R. Easton , Mark S. Farrell , Thomas A. Gregg , Damian L. Osisek , Gustav E. Sittmann, III
发明人： Frank W. Brice, JR. , David Craddock , Janet R. Easton , Mark S. Farrell , Thomas A. Gregg , Damian L. Osisek , Gustav E. Sittmann, III
IPC分类号： G06F13/24
CPC分类号： G06F9/4812 , G06F9/541 , G06F9/545 , G06F13/24 , G06F2213/0026
摘要： One or more message signaled interruption requests from one or more input/output (I/O) adapters are converted to I/O adapter event notifications while retaining the message vector indication. An I/O adapter event notification may be routed and presented to a host or to a guest that the host is executing. To present the notification to the correct host or to the correct guest, various data structures in host and/or guest memory are used.
摘要翻译：一个或多个来自一个或多个输入/输出（I / O）适配器的信号中断请求被转换为I / O适配器事件通知，同时保留消息向量指示。可以将I / O适配器事件通知路由并呈现给主机或主机正在执行的guest虚拟机。为了将通知呈现给正确的主机或正确的客户机，使用主机和/或来宾存储器中的各种数据结构。

9. 发明授权

US07876751B2 Reliable link layer packet retry 失效
标题翻译：可靠的链路层报文重试
公开(公告)号：US07876751B2
公开(公告)日：2011-01-25
申请号：US12035067
申请日：2008-02-21
申请人： Alan F. Benner , David Craddock , Thomas A. Gregg
发明人： Alan F. Benner , David Craddock , Thomas A. Gregg
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L1/188 , H04L49/90
摘要： Communication over a computer network with a node having a first port with a point-to-point link connection to a second node having a second port. The first port transmits to the second port a reliable link layer (RLL) packet over the link. The RLL packet comprises a first RLL header and a first data packet, the first RLL header preceding the first data packet, the first RLL header comprising an RLL start-of-frame (SOF) character and an RLL packet sequence number (PSN). If the first port receives an RLL acknowledgment control packet from the link, it acknowledges receipt of the first data packet, and the first port does not retain the first data packet in the buffer. If the first port does not receive the RLL acknowledgment packet from the link, acknowledging receipt of the first data packet, the first port re-transmits from the buffer the first data packet.
摘要翻译：通过计算机网络与具有具有到具有第二端口的第二节点的点对点链路连接的第一端口的节点进行通信。第一端口通过链路向第二端口传送可靠的链路层（RLL）分组。 RLL分组包括第一RLL头部和第一数据分组，在第一数据分组之前的第一RLL头部，第一RLL头部包括RLL开始帧（SOF）字符和RLL分组序列号（PSN）。如果第一端口从链路接收到RLL确认控制分组，则它确认接收到第一数据分组，并且第一端口不保留缓冲器中的第一数据分组。如果第一端口没有从链路接收到RLL确认分组，则确认接收到第一数据分组，则第一端口从缓冲器重新发送第一数据分组。

10. 发明申请

US20080168194A1 Low Latency Send Queues In I/O Adapter Hardware 失效
标题翻译： I / O适配器硬件中的低延迟发送队列
公开(公告)号：US20080168194A1
公开(公告)日：2008-07-10
申请号：US11621632
申请日：2007-01-10
申请人： Thomas A. Gregg , David Craddock , Thomas Schlipf
发明人： Thomas A. Gregg , David Craddock , Thomas Schlipf
IPC分类号： G06F3/00
CPC分类号： G06F3/067 , G06F3/0611 , G06F3/0659 , G06F3/0689 , G06F13/4059
摘要： Send queues provided in an InfiniBand hardware adapter receive a single transmission from a connected computer system which includes work request information, address vector, and message data. This information is sufficient for the adapter to generate packet header information and to send the requested message, thereby providing a low latency sending mechanism. The system stores completion information in tables each dedicated to one of the send queues.
摘要翻译： InfiniBand硬件适配器中提供的发送队列从连接的计算机系统接收单个传输，其中包括工作请求信息，地址向量和消息数据。该信息足以使适配器产生分组报头信息并发送所请求的消息，从而提供低延迟发送机制。系统将完成信息存储在专用于发送队列之一的表中。

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