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    • 1. 发明授权
    • Slow wave optical waveguide for velocity matched semiconductor modulators
    • 用于速度匹配半导体调制器的慢波光波导
    • US07068866B2
    • 2006-06-27
    • US10700245
    • 2003-11-03
    • Wenshen WangDavid C ScottElizabeth T Kunkee
    • Wenshen WangDavid C ScottElizabeth T Kunkee
    • G02F1/295G02B6/34G02B6/10
    • B82Y20/00B82Y10/00G02F1/025G02F2201/127G02F2201/307G02F2202/32
    • A PIN electro-optical traveling wave modulator (10) including diffraction gratings (34, 36) positioned at opposing sides of an optical waveguide (20) that act to change the propagation pattern of the waveguide (20). The modulator (10) includes an N-type layer (14), a P-type layer (18) and an intrinsic layer (16) acting as the waveguide (20). A metal electrode (26) is in electrical contact with the N-type layer (14), and a metal electrode (30) is in electrical contact with the P-type layer (18). The electrodes (26, 30) define an RF transmission line. An optical wave (22) propagates along the waveguide (20) and interacts with the gratings (34, 36) which slow the optical wave (22) to match its speed to the speed of the RF wave in the transmission line. In one embodiment, the gratings (34, 36) are 2-D gratings formed by vertical holes (38) in the waveguide (20).
    • 一种PIN电光行波调制器(10),其包括位于光波导(20)的相对侧的衍射光栅(34,36),其用于改变波导(20)的传播图案。 调制器(10)包括N型层(14),P型层(18)和用作波导(20)的本征层(16)。 金属电极(26)与N型层(14)电接触,金属电极(30)与P型层(18)电接触。 电极(26,30)限定RF传输线。 光波(22)沿着波导(20)传播并与光栅(34,36)相互作用,光栅(34,36)使光波(22)的速度与传输线中的RF波的速度相匹配。 在一个实施例中,光栅(34,36)是由波导(20)中的垂直孔(38)形成的2-D光栅。
    • 4. 发明授权
    • Variable electrode traveling wave metal-semiconductor-metal waveguide photodetector
    • 可变电极行波金属 - 半导体 - 金属波导光电探测器
    • US06239422B1
    • 2001-05-29
    • US09265913
    • 1999-03-10
    • Timothy A. VangDavid C. Scott
    • Timothy A. VangDavid C. Scott
    • G01J142
    • G02B6/42H01L31/022408
    • A metal-semiconductor-metal photodetector (18) is provided including an optical waveguide (22) disposed on a substrate (28) and an array of metal-semiconductor-metal photodiodes (20) coupled to the optical waveguide (22). An absorber (30) is disposed between the photodiodes (20) and the optical waveguide (22) and a transmission line (26) is coupled to the photodiodes (20). Each of the photodiodes (20) includes an electrode (24) having a plurality of interdigitated electrode fingers (31) wherein a width of each finger (31) and a gap between adjacent fingers (31) tapers from one end of the electrode (24) to the other. Preferably the rate of tapering corresponds to an exponential rate of optical power decay through the photodiode (20). In this way, both the photocurrent density in the fingers (31) and the uniformity of the electric field underneath the electrodes (24) are optimized.
    • 提供了一种金属 - 半导体 - 金属光电探测器(18),其包括设置在基板(28)上的光波导(22)和耦合到光波导(22)的金属 - 半导体 - 金属光电二极管阵列(20)。 吸收器(30)设置在光电二极管(20)和光波导(22)之间,传输线(26)耦合到光电二极管(20)。 每个光电二极管(20)包括具有多个交叉指状电极指(31)的电极(24),其中每个指状物(31)的宽度和相邻指状物(31)之间的间隙从电极(24)的一端逐渐变细 )到另一个 优选地,渐缩率对应于通过光电二极管(20)的光功率衰减的指数速率。 以这种方式,手指(31)中的光电流密度和电极(24)下面的电场的均匀性都被优化。
    • 6. 发明授权
    • Software state replay
    • 软件状态重播
    • US07480610B2
    • 2009-01-20
    • US11181036
    • 2005-07-12
    • David C. ScottCharles W. SelvidgeJoshua D. MarantzFrédéric Reblewski
    • David C. ScottCharles W. SelvidgeJoshua D. MarantzFrédéric Reblewski
    • G06F9/455
    • G06F17/5027G06F11/3636G06F11/3692
    • A tool for emulation systems that obtains the state values for only discrete partitions of a circuit design. When a partition is being emulated, the emulation system obtains the input values for the specified partition at each clock cycle and the state values for the specified partition at intervals. Using the state and input values with a software model of the specified circuit design partition, the tool calculates the state values for the partition at every clock cycle. The software model may correspond to the partitioning information used to implement the circuit design across multiple configurable logic element devices, such as FPGAs. Thus, each software model may correspond to the portion of a circuit design emulated on a discrete FPGA integrated circuit.
    • 用于仿真系统的工具,可以获得电路设计的独立分区的状态值。 当仿真分区时,仿真系统在每个时钟周期获取指定分区的输入值,并以间隔获取指定分区的状态值。 使用指定电路设计分区的软件模型的状态和输入值,该工具将在每个时钟周期计算分区的状态值。 软件模型可以对应于用于跨多个可配置逻辑元件设备(例如FPGA)实现电路设计的分区信息。 因此,每个软件模型可以对应于在离散FPGA集成电路上仿真的电路设计的部分。
    • 9. 发明授权
    • Two terminal edge illuminated epilayer waveguide phototransistor
    • 两个端边照明外延波导光电晶体管
    • US06525348B1
    • 2003-02-25
    • US09907318
    • 2001-07-17
    • David C. ScottTimothy A. VangSrinath Kalluri
    • David C. ScottTimothy A. VangSrinath Kalluri
    • H01L310328
    • H01L31/1105H01L31/03046Y02E10/544
    • An edge illuminated epilayer waveguide phototransistor including a subcollector layer formed from an epitaxially grown quaternary semiconductor material, such as heavily doped InGaAsP. A collector region of undoped InGaAs is epitaxially grown on the subcollector layer. A base region of moderately doped InGaAs is epitaxially grown on the collector layer. An emitter region, including a doped InGaAsP layer, a doped InP layer, and a heavily doped InGaAs emitter contact layer, is epitaxially grown on the base layer. The various layers and regions are formed so as to define an edge-illuminated facet for receiving incident light. Also, the base does not have an ohmic contact so that the base thickness can be minimized. Finally, the base doping concentration is minimized so that the gain-bandwidth product can be maximized.
    • 包括由外延生长的四元半导体材料(例如重掺杂的InGaAsP)形成的子集电极层的边缘照明外延波导光电晶体管。 未掺杂的InGaAs的集电极区域在子集电极层上外延生长。 中等掺杂的InGaAs的基极区域在集电极层上外延生长。 在基极层上外延生长包括掺杂的InGaAsP层,掺杂的InP层和重掺杂的InGaAs发射极接触层的发射极区域。 形成各种层和区域以限定用于接收入射光的边缘照明面。 此外,基座不具有欧姆接触,使得基底厚度可以最小化。 最后,使基极掺杂浓度最小化,使得增益带宽乘积可以最大化。