专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08082438B2 Systems and methods for booting a codec processor over a high definition audio bus 有权
标题翻译：通过高清晰度音频总线启动编解码器处理器的系统和方法
公开(公告)号：US08082438B2
公开(公告)日：2011-12-20
申请号：US12202359
申请日：2008-09-01
申请人： Daniel L. Chieng , Douglas D. Gephardt , Jeffrey M. Klaas , Adam Zaharias
发明人： Daniel L. Chieng , Douglas D. Gephardt , Jeffrey M. Klaas , Adam Zaharias
IPC分类号： G06F9/00 , G06F1/04 , G06F3/00 , G06F13/00 , G06F15/00 , G10L19/00 , G10L21/04 , H05K7/10
CPC分类号： G06F9/4401 , G06F9/4408
摘要： Systems and methods for booting a programmable processor such as a DSP that is incorporated into an HDA codec. The codec and a system memory containing boot program instructions are connected to an HDA bus. In a first mode, the DSP receives boot program instructions via the HDA bus and boots using these instructions. In a second mode, the DSP boots from instructions that are contained in a memory that is connected to the DSP. In one embodiment, the memory connected to the DSP is a component of a plug-in card, and the DSP is configured to determine whether the plug-in card is present, then boot from the memory on the plug-in card if it is present or boot from the system memory via the HDA bus if the plug-in card is not present.
摘要翻译：用于引导可编程处理器（例如并入HDA编解码器的DSP）的系统和方法。编解码器和包含引导程序指令的系统存储器连接到HDA总线。在第一种模式下，DSP通过HDA总线接收引导程序指令，并使用这些指令进行引导。在第二种模式下，DSP从包含在连接到DSP的存储器中的指令引导。在一个实施例中，连接到DSP的存储器是插件卡的组件，并且DSP被配置为确定插件卡是否存在，然后从插件卡上的存储器引导，如果它是如果插件卡不存在，则通过HDA总线从系统存储器中显示或引导。

2. 发明授权

US08224469B2 Systems and methods for controlling audio volume in the processor of a high definition audio codec 失效
标题翻译：用于控制高分辨率音频编解码器处理器中音频音量的系统和方法
公开(公告)号：US08224469B2
公开(公告)日：2012-07-17
申请号：US12202355
申请日：2008-09-01
申请人： Daniel L. Chieng , Douglas D. Gephardt , Larry E. Hand , Jeffrey M. Klaas , Adam Zaharias
发明人： Daniel L. Chieng , Douglas D. Gephardt , Larry E. Hand , Jeffrey M. Klaas , Adam Zaharias
IPC分类号： G06F17/00 , G06F9/30 , G06F9/40 , H03G3/00
CPC分类号： H03G3/3089 , G06F3/16 , G10L15/26 , G11B20/10527 , G11B2020/10574 , H03F3/217
摘要： Systems and methods for controlling the audio volume of an audio signal in an HDA codec having a programmable processor such as a DSP, wherein the codec receives digital audio signals and audio volume control verbs over an HDA bus, and the audio volume levels associated with the audio volume control verbs are used by the processor in the generation pulse width modulated (PWM) output signals, thereby controlling the audio volume levels of the output signals. The processor may be configured to adjust non-volume parameters such as PWM deadtime, in addition to adjusting audio volume, based on the audio volume levels. The codec may be implemented in a PC or other system that implements an HDA system that includes the HDA bus and HDA codec.
摘要翻译：用于控制具有诸如DSP的可编程处理器的HDA编解码器中的音频信号的音频音量的系统和方法，其中编解码器通过HDA总线接收数字音频信号和音频音量控制动词，以及与音频音量控制动词由处理器在生成脉宽调制（PWM）输出信号中使用，从而控制输出信号的音频音量。除了根据音频音量水平调整音频音量之外，处理器可以被配置为调整诸如PWM死时间之类的非体积参数。编解码器可以在实现包括HDA总线和HDA编解码器的HDA系统的PC或其他系统中实现。

3. 发明申请

US20090063843A1 Systems and Methods for Booting a Codec Processor over a High Definition Audio Bus 有权
标题翻译：通过高清晰度音频总线引导编解码器处理器的系统和方法
公开(公告)号：US20090063843A1
公开(公告)日：2009-03-05
申请号：US12202359
申请日：2008-09-01
申请人： Daniel L. Chieng , Douglas D. Gephardt , Jeffrey M. Klaas , Adam Zaharias
发明人： Daniel L. Chieng , Douglas D. Gephardt , Jeffrey M. Klaas , Adam Zaharias
IPC分类号： G06F15/177
CPC分类号： G06F9/4401 , G06F9/4408
摘要： Systems and methods for booting a programmable processor such as a DSP that is incorporated into an HDA codec. The codec and a system memory containing boot program instructions are connected to an HDA bus. In a first mode, the DSP receives boot program instructions via the HDA bus and boots using these instructions. In a second mode, the DSP boots from instructions that are contained in a memory that is connected to the DSP. In one embodiment, the memory connected to the DSP is a component of a plug-in card, and the DSP is configured to determine whether the plug-in card is present, then boot from the memory on the plug-in card if it is present or boot from the system memory via the HDA bus if the plug-in card is not present.
摘要翻译：用于引导可编程处理器（例如并入HDA编解码器的DSP）的系统和方法。编解码器和包含引导程序指令的系统存储器连接到HDA总线。在第一种模式下，DSP通过HDA总线接收引导程序指令，并使用这些指令进行引导。在第二种模式下，DSP从包含在连接到DSP的存储器中的指令引导。在一个实施例中，连接到DSP的存储器是插件卡的组件，并且DSP被配置为确定插件卡是否存在，然后从插件卡上的存储器引导，如果它是如果插件卡不存在，则通过HDA总线从系统存储器中显示或引导。

4. 发明授权

US08249730B2 Systems and methods for shadowing an HDA codec 失效
标题翻译：用于屏蔽HDA编解码器的系统和方法
公开(公告)号：US08249730B2
公开(公告)日：2012-08-21
申请号：US12202360
申请日：2008-09-01
申请人： Daniel L. Chieng , Douglas D. Gephardt , Jeffrey M. Klaas , Adam Zaharias
发明人： Daniel L. Chieng , Douglas D. Gephardt , Jeffrey M. Klaas , Adam Zaharias
IPC分类号： G06F17/00
CPC分类号： G06F3/162
摘要： Systems and methods for “shadowing” a target codec to provide additional features that are not available in the target codec. In one embodiment, an audio amplification system includes a High Definition Audio (HDA) bus, and an HDA controller, a conventional HDA codec and a shadow HDA codec coupled to the HDA bus. The conventional codec receives audio data and commands from the HDA controller via the bus and processes them to generate an output audio signal. The shadow codec snoops the audio data and commands on the HDA bus that are targeted to the conventional codec. The shadow codec processes the snooped audio data and commands to generate a second audio output. The shadow codec does not communicate with the HDA controller and is transparent to the controller. The shadow codec does not request enumeration from the HDA controller and does not receive an address from the HDA controller.
摘要翻译：用于“遮蔽”目标编解码器以提供目标编解码器中不可用的附加功能的系统和方法。在一个实施例中，音频放大系统包括高清晰度音频（HDA）总线和HDA控制器，传统的HDA编解码器和耦合到HDA总线的影子HDA编解码器。常规编解码器经由总线从HDA控制器接收音频数据和命令，并处理它们以产生输出音频信号。影子编解码器侦听HDA总线上的传统编解码器的音频数据和命令。影子编解码器处理窥探的音频数据和命令以产生第二个音频输出。影子编解码器不与HDA控制器通信，对控制器是透明的。影子编解码器不要求来自HDA控制器的枚举，也不会从HDA控制器接收地址。

5. 发明授权

US08219226B2 Systems and methods for overriding hardwired responses in an HDA codec 失效
标题翻译：用于覆盖HDA编解码器中的硬连线响应的系统和方法
公开(公告)号：US08219226B2
公开(公告)日：2012-07-10
申请号：US12202358
申请日：2008-09-01
申请人： Daniel L. Chieng , Douglas D. Gephardt , Jeffrey M. Klaas
发明人： Daniel L. Chieng , Douglas D. Gephardt , Jeffrey M. Klaas
IPC分类号： G06F17/00 , G06F13/00 , G06F9/30 , G06F9/40
CPC分类号： G06F3/162
摘要： Systems and methods for overriding hardwired responses of a codec to High Definition Audio (HDA) verbs that are received from an HDA controller. In one embodiment, an HDA codec is configured to store one or more overriding responses, each of which is associated with a corresponding HDA verb. When an HDA verb is received by the codec, the codec determines whether the verb is associated with one of the overriding responses. If the verb is associated with one of the overriding responses, the overriding response is returned to the HDA controller. If the first HDA verb is not associated with one of the stored overriding responses, provide a hardwired response associated with the first HDA verb to the HDA bus. Overriding responses can be returned for unsupported verbs only, or for any verbs that prompt responses.
摘要翻译：用于将编解码器的硬连线响应覆盖从HDA控制器接收的高清晰度音频（HDA）动词的系统和方法。在一个实施例中，HDA编解码器被配置为存储一个或多个覆盖的响应，每一个响应与相应的HDA动词相关联。当编解码器接收到HDA动词时，编解码器确定动词是否与其中一个重写的响应相关联。如果动词与其中一个覆盖的响应相关联，则覆盖的响应将返回给HDA控制器。如果第一HDA动词与存储的覆盖应答之一不相关联，则向HDA总线提供与第一HDA动词相关联的硬连线响应。可以仅针对不支持的动词或任何提示响应的动词返回重写响应。

6. 发明申请

US20090063828A1 Systems and Methods for Communication between a PC Application and the DSP in a HDA Audio Codec 审中-公开
标题翻译： PC应用程序与HDA音频编解码器中的DSP之间的通信系统和方法
公开(公告)号：US20090063828A1
公开(公告)日：2009-03-05
申请号：US12202356
申请日：2008-09-01
申请人： Daniel L. Chieng , Douglas D. Gephardt , Larry E. Hand , Jeffrey M. Klaas , Adam Zaharias
发明人： Daniel L. Chieng , Douglas D. Gephardt , Larry E. Hand , Jeffrey M. Klaas , Adam Zaharias
IPC分类号： G06F9/315
CPC分类号： G06F3/162
摘要： Systems and methods implemented in a PC for enabling communication between an application executing on the CPU and a DSP that is incorporated into a codec in the High Definition Audio (HDA) system, wherein the communication is carried out via the HDA bus. In one embodiment, an HDA codec includes one or more conventional HDA widgets coupled to a programmable processor such as a DSP. The codec includes a set of registers that are configured to store HDA verbs and data transmitted via the HDA bus. The programmable processor is configured to identify verbs that indicate associated information is a communication from an application executing on the CPU, read the associated information, and process the information according to the associated verbs. The information may be program instructions, parametric data, requests for information, etc.
摘要翻译：在PC中实现的用于实现在CPU上执行的应用程序与被并入高清晰度音频（HDA）系统中的编解码器的DSP之间的通信的系统和方法，其中通过HDA总线进行通信。在一个实施例中，HDA编解码器包括耦合到诸如DSP的可编程处理器的一个或多个常规HDA小部件。编解码器包括一组寄存器，用于存储通过HDA总线传输的HDA动词和数据。可编程处理器被配置为识别指示相关信息的动词是来自在CPU上执行的应用程序的通信，读取相关联的信息，以及根据相关联的动词处理信息。该信息可以是程序指令，参数数据，信息请求等。

7. 发明申请

US20090063738A1 Systems and Methods for Overriding Hardwired Responses in an HDA Codec 失效
标题翻译：用于覆盖HDA编解码器中的硬连线响应的系统和方法
公开(公告)号：US20090063738A1
公开(公告)日：2009-03-05
申请号：US12202358
申请日：2008-09-01
申请人： Daniel L. Chieng , Douglas D. Gephardt , Jeffrey M. Klaas
发明人： Daniel L. Chieng , Douglas D. Gephardt , Jeffrey M. Klaas
IPC分类号： G06F13/42
CPC分类号： G06F3/162
摘要： Systems and methods for overriding hardwired responses of a codec to High Definition Audio (HDA) verbs that are received from an HDA controller. In one embodiment, an HDA codec is configured to store one or more overriding responses, each of which is associated with a corresponding HDA verb. When an HDA verb is received by the codec, the codec determines whether the verb is associated with one of the overriding responses. If the verb is associated with one of the overriding responses, the overriding response is returned to the HDA controller. If the first HDA verb is not associated with one of the stored overriding responses, provide a hardwired response associated with the first HDA verb to the HDA bus. Overriding responses can be returned for unsupported verbs only, or for any verbs that prompt responses.
摘要翻译：用于将编解码器的硬连线响应覆盖从HDA控制器接收的高清晰度音频（HDA）动词的系统和方法。在一个实施例中，HDA编解码器被配置为存储一个或多个覆盖的响应，每一个响应与相应的HDA动词相关联。当编解码器接收到HDA动词时，编解码器确定动词是否与其中一个重写的响应相关联。如果动词与其中一个覆盖的响应相关联，则覆盖的响应将返回给HDA控制器。如果第一HDA动词与存储的覆盖应答之一不相关联，则向HDA总线提供与第一HDA动词相关联的硬连线响应。可以仅针对不支持的动词或任何提示响应的动词返回重写响应。

8. 发明申请

US20090062948A1 Systems and Methods for Controlling Audio Volume in the Processor of a High Definition Audio Codec 失效
标题翻译：用于控制高分辨率音频编解码器处理器中音频音量的系统和方法
公开(公告)号：US20090062948A1
公开(公告)日：2009-03-05
申请号：US12202355
申请日：2008-09-01
申请人： Daniel L. Chieng , Douglas D. Gephardt , Larry E. Hand , Jeffrey M. Klaas , Adam Zaharias
发明人： Daniel L. Chieng , Douglas D. Gephardt , Larry E. Hand , Jeffrey M. Klaas , Adam Zaharias
IPC分类号： G06F17/00
CPC分类号： H03G3/3089 , G06F3/16 , G10L15/26 , G11B20/10527 , G11B2020/10574 , H03F3/217
摘要： Systems and methods for controlling the audio volume of an audio signal in an HDA codec having a programmable processor such as a DSP, wherein the codec receives digital audio signals and audio volume control verbs over an HDA bus, and the audio volume levels associated with the audio volume control verbs are used by the processor in the generation pulse width modulated (PWM) output signals, thereby controlling the audio volume levels of the output signals. The processor may be configured to adjust non-volume parameters such as PWM deadtime, in addition to adjusting audio volume, based on the audio volume levels. The codec may be implemented in a PC or other system that implements an HDA system that includes the HDA bus and HDA codec.
摘要翻译：用于控制具有诸如DSP的可编程处理器的HDA编解码器中的音频信号的音频音量的系统和方法，其中编解码器通过HDA总线接收数字音频信号和音频音量控制动词，以及与音频音量控制动词由处理器在生成脉宽调制（PWM）输出信号中使用，从而控制输出信号的音频音量。除了根据音频音量水平调整音频音量之外，处理器可以被配置为调整诸如PWM死时间之类的非体积参数。编解码器可以在实现包括HDA总线和HDA编解码器的HDA系统的PC或其他系统中实现。

9. 发明申请

US20090060228A1 Systems and Methods for Shadowing an HDA Codec 失效
标题翻译：用于影像HDA编解码器的系统和方法
公开(公告)号：US20090060228A1
公开(公告)日：2009-03-05
申请号：US12202360
申请日：2008-09-01
申请人： Daniel L. Chieng , Douglas D. Gephardt , Jeffrey M. Klaas , Adam Zaharias
发明人： Daniel L. Chieng , Douglas D. Gephardt , Jeffrey M. Klaas , Adam Zaharias
IPC分类号： H03F21/00 , G06F3/00
CPC分类号： G06F3/162
摘要： Systems and methods for “shadowing” a target codec to provide additional features that are not available in the target codec. In one embodiment, an audio amplification system includes a High Definition Audio (HDA) bus, and an HDA controller, a conventional HDA codec and a shadow HDA codec coupled to the HDA bus. The conventional codec receives audio data and commands from the HDA controller via the bus and processes them to generate an output audio signal. The shadow codec snoops the audio data and commands on the HDA bus that are targeted to the conventional codec. The shadow codec processes the snooped audio data and commands to generate a second audio output. The shadow codec does not communicate with the HDA controller and is transparent to the controller. The shadow codec does not request enumeration from the HDA controller and does not receive an address from the HDA controller.
摘要翻译：用于“遮蔽”目标编解码器以提供目标编解码器中不可用的附加功能的系统和方法。在一个实施例中，音频放大系统包括高清晰度音频（HDA）总线和HDA控制器，传统的HDA编解码器和耦合到HDA总线的影子HDA编解码器。常规编解码器经由总线从HDA控制器接收音频数据和命令，并处理它们以产生输出音频信号。影子编解码器侦听HDA总线上的传统编解码器的音频数据和命令。影子编解码器处理窥探的音频数据和命令以产生第二个音频输出。影子编解码器不与HDA控制器通信，对控制器是透明的。影子编解码器不要求来自HDA控制器的枚举，也不会从HDA控制器接收地址。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式