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1. 发明授权

US09135131B2 Customizing operation of a test instrument based on information from a system under test 有权
标题翻译：根据被测系统的信息定制测试仪器的操作
公开(公告)号：US09135131B2
公开(公告)日：2015-09-15
申请号：US13398529
申请日：2012-02-16
申请人： Charles G. Schroeder , Christopher F. Graf , Ciro T. Nishiguchi , Nigel G. D'Souza , Daniel J. Baker , Thomas D. Magruder
发明人： Charles G. Schroeder , Christopher F. Graf , Ciro T. Nishiguchi , Nigel G. D'Souza , Daniel J. Baker , Thomas D. Magruder
IPC分类号： G06F11/00 , G06F11/263 , G06F11/30
CPC分类号： G06F11/263
摘要： Customizing a test instrument. A plurality of pairs of code modules may be provided. Each pair of code modules may include a first code module having program instructions for execution by a processor of the test instrument and a second code module for implementation on a programmable hardware element of the test instrument. For each pair of code modules, the first code module and the second code module may collectively implement a function in the test instrument. User input may be received specifying modification of a second code module of at least one of the plurality of pairs of code modules. Accordingly, a hardware description may be generated for the programmable hardware element of the test instrument based on the modified second code module.
摘要翻译：定制测试仪器。可以提供多对代码模块。每对代码模块可以包括具有用于由测试仪器的处理器执行的程序指令的第一代码模块和用于在测试仪器的可编程硬件元件上实现的第二代码模块。对于每对代码模块，第一代码模块和第二代码模块可以共同地实现测试仪器中的功能。可以接收指定多对代码模块中的至少一个代码模块的第二代码模块的修改的用户输入。因此，可以基于修改的第二代码模块为测试仪器的可编程硬件元件生成硬件描述。

2. 发明授权

US08813032B2 Customizing synchronization of custom code among multiple programmable hardware elements within a system 有权
标题翻译：定制系统内多个可编程硬件元素之间的自定义代码同步
公开(公告)号：US08813032B2
公开(公告)日：2014-08-19
申请号：US13527132
申请日：2012-06-19
申请人： Christopher F. Graf , Ryan H. Brown , Daniel J. Baker , Matthew J. DeVoe , Sarvesh V. Nagarajan
发明人： Christopher F. Graf , Ryan H. Brown , Daniel J. Baker , Matthew J. DeVoe , Sarvesh V. Nagarajan
IPC分类号： G06F9/44
CPC分类号： G06F8/71 , G05B19/05 , G06F8/34 , G06F11/3696
摘要： Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.
摘要翻译：定制目标系统。目标系统可以包括具有第一可编程硬件元件（PHE）的第一设备和具有第二PHE的第二设备。可以提供同步模块用于在第一和第二PHE上实现。同步模块可以提供用于与其他代码交互的标准接口。用户可以为利用同步模块的第一和第二PHE指定用户创建的代码。用户创建的代码可以使用标准接口与同步模块交互。因此，可以为目标系统的第一和第二PHE生成硬件描述。不同的模块可以用于不同的互连。此外，在目标系统的操作期间，可以例如动态地使用多个同步模块。

3. 发明授权

US08788882B2 Customizing code modules of software and programmable hardware for a test instrument 有权
标题翻译：定制测试仪器的软件和可编程硬件的代码模块
公开(公告)号：US08788882B2
公开(公告)日：2014-07-22
申请号：US13398580
申请日：2012-02-16
申请人： Charles G. Schroeder , Christopher F. Graf , Ciro T. Nishiguchi , Nigel G. D'Souza , Daniel J. Baker , Thomas D. Magruder
发明人： Charles G. Schroeder , Christopher F. Graf , Ciro T. Nishiguchi , Nigel G. D'Souza , Daniel J. Baker , Thomas D. Magruder
IPC分类号： G06F11/00
CPC分类号： G06F11/263
摘要： Customizing a test instrument. A plurality of pairs of code modules may be provided. Each pair of code modules may include a first code module having program instructions for execution by a processor of the test instrument and a second code module for implementation on a programmable hardware element of the test instrument. For each pair of code modules, the first code module and the second code module may collectively implement a function in the test instrument. User input may be received specifying modification of a second code module of at least one of the plurality of pairs of code modules. Accordingly, a hardware description may be generated for the programmable hardware element of the test instrument based on the modified second code module.
摘要翻译：定制测试仪器。可以提供多对代码模块。每对代码模块可以包括具有用于由测试仪器的处理器执行的程序指令的第一代码模块和用于在测试仪器的可编程硬件元件上实现的第二代码模块。对于每对代码模块，第一代码模块和第二代码模块可以共同地实现测试仪器中的功能。可以接收指定多对代码模块中的至少一个代码模块的第二代码模块的修改的用户输入。因此，可以基于修改的第二代码模块为测试仪器的可编程硬件元件生成硬件描述。

4. 发明申请

US20130218509A1 Customizing Operation of a Test Instrument Based on Information from a System Under Test 有权
标题翻译：根据被测系统的信息定制测试仪器的操作
公开(公告)号：US20130218509A1
公开(公告)日：2013-08-22
申请号：US13398529
申请日：2012-02-16
申请人： Charles G. Schroeder , Christopher F. Graf , Ciro T. Nishiguchi , Nigel G. D'Souza , Daniel J. Baker , Thomas D. Magruder
发明人： Charles G. Schroeder , Christopher F. Graf , Ciro T. Nishiguchi , Nigel G. D'Souza , Daniel J. Baker , Thomas D. Magruder
IPC分类号： G06F19/00
CPC分类号： G06F11/263
摘要： Customizing a test instrument. A plurality of pairs of code modules may be provided. Each pair of code modules may include a first code module having program instructions for execution by a processor of the test instrument and a second code module for implementation on a programmable hardware element of the test instrument. For each pair of code modules, the first code module and the second code module may collectively implement a function in the test instrument. User input may be received specifying modification of a second code module of at least one of the plurality of pairs of code modules. Accordingly, a hardware description may be generated for the programmable hardware element of the test instrument based on the modified second code module.
摘要翻译：定制测试仪器。可以提供多对代码模块。每对代码模块可以包括具有用于由测试仪器的处理器执行的程序指令的第一代码模块和用于在测试仪器的可编程硬件元件上实现的第二代码模块。对于每对代码模块，第一代码模块和第二代码模块可以共同地实现测试仪器中的功能。可以接收指定多对代码模块中的至少一个代码模块的第二代码模块的修改的用户输入。因此，可以基于修改的第二代码模块为测试仪器的可编程硬件元件生成硬件描述。

5. 发明授权

US07574762B2 Multilayered mattress component 有权
标题翻译：多层床垫组件
公开(公告)号：US07574762B2
公开(公告)日：2009-08-18
申请号：US11259797
申请日：2005-10-27
申请人： Daniel J. Baker
发明人： Daniel J. Baker
IPC分类号： A47C17/00
CPC分类号： A47C27/144 , A47C27/001 , A47C27/056 , A47C27/07 , A47C27/148 , A47C27/15
摘要： A mattress component includes first and second layers to be assembled in a mattress over which a user will lie. The first layer of a first material has different properties than the second layer of a second material. The second layer has a surface underlying the surface of the first layer. Mating patterns are formed in the surfaces of the first and second layers. The mating patterns in the first and second layers are designed to substantially match the surfaces of the first and second layers with each other. The mating patterns in the first and second layers result in a greater effective thickness in one of the layers in areas corresponding to a position where hips and shoulders of the user will rest on the mattress, and a lesser effective thickness in other areas.
摘要翻译：床垫部件包括要组装在床垫上的第一和第二层，用户将躺在床垫上。第一材料的第一层具有与第二材料的第二层不同的性质。第二层具有位于第一层表面下方的表面。在第一和第二层的表面上形成配合图案。第一和第二层中的配合图案被设计成基本上使第一和第二层的表面彼此匹配。第一层和第二层中的配合图案在对应于使用者的臀部和肩部将搁置在床垫上的位置的区域中的一个层中产生更大的有效厚度，并且在其它区域中具有较小的有效厚度。

6. 发明授权

US07434124B2 Reduced pattern memory in digital test equipment 有权
标题翻译：减少数字测试设备中的模式记忆
公开(公告)号：US07434124B2
公开(公告)日：2008-10-07
申请号：US11391009
申请日：2006-03-28
申请人： Daniel J. Baker , J. Christopher White , Ciro T. Nishiguchi
发明人： Daniel J. Baker , J. Christopher White , Ciro T. Nishiguchi
IPC分类号： G01R31/28
CPC分类号： G01R31/31919
摘要： A test system and method of configuring therefor. A test system includes a plurality of interface circuits for communicating with a device under test (DUT). The test system further includes a first memory for storing test vectors, a second memory for storing selection codes, and a third memory for storing configuration sets. Each selection code indicates an association between a test vector and a configuration set. Each configuration set may be associated with one or more of the test vectors. The configuration sets include information for configuring the interface circuits during communications between the test system and the DUT for each test vector. Each configuration set in the third memory is unique with respect to the other configuration sets, and the number of configuration sets may be less than the number of test vectors.
摘要翻译：一种测试系统及其配置方法。测试系统包括用于与被测设备（DUT）进行通信的多个接口电路。测试系统还包括用于存储测试向量的第一存储器，用于存储选择代码的第二存储器和用于存储配置集的第三存储器。每个选择代码指示测试向量和配置集之间的关联。每个配置集可以与一个或多个测试向量相关联。配置集包括用于在每个测试向量的测试系统和DUT之间的通信期间配置接口电路的信息。在第三存储器中设置的每个配置相对于其他配置集是唯一的，并且配置集合的数量可以小于测试向量的数量。

7. 发明申请

US20130223571A1 Mechanisms for the Correction of I/Q Impairments 有权
标题翻译：纠正I / Q损伤的机制
公开(公告)号：US20130223571A1
公开(公告)日：2013-08-29
申请号：US13404851
申请日：2012-02-24
申请人： Stephen L. Dark , Daniel J. Baker
发明人： Stephen L. Dark , Daniel J. Baker
IPC分类号： H04B1/10 , H04B15/00
CPC分类号： H04L27/3863 , H04B1/0028 , H04B1/30
摘要： Various embodiments of communication devices and associated methods for reducing I/Q impairments in signals used by the communication devices are described. A transmitter device 206 may perform filtering (or matrix multiplication) on digital I and Q signals to pre-correct them before converting them into analog I and Q signals. The pre-correction may pre-compensate for I/Q impairments which have not been introduced yet, but which will subsequently be introduced during digital to analog conversion, I/Q modulation, or other processing that occurs to produce a transmission signal from the original digital I and Q signals. A receiver device may receive a transmission signal, produce digital I and Q signals from it, and perform filtering on the digital I and Q signals to correct I/Q impairments at a plurality of frequency offsets.
摘要翻译：描述了用于减少由通信设备使用的信号中的I / Q损伤的通信设备和相关方法的各种实施例。发射机设备206可以对数字I和Q信号执行滤波（或矩阵乘法），以便在将它们转换成模拟I和Q信号之前对其进行预校正。预校正可以预补偿尚未引入的I / Q损伤，但是随后将在数模转换，I / Q调制或其他处理期间引入以产生来自原始信号的传输信号数字I和Q信号。接收机设备可以接收传输信号，从其产生数字I和Q信号，并且对数字I和Q信号执行滤波以校正多个频率偏移处的I / Q损伤。

8. 发明申请

US20130219360A1 Customizing Synchronization of Custom Code among Multiple Programmable Hardware Elements within a System 有权
标题翻译：定制系统中多个可编程硬件元素之间的自定义代码同步
公开(公告)号：US20130219360A1
公开(公告)日：2013-08-22
申请号：US13527132
申请日：2012-06-19
申请人： Christopher F. Graf , Ryan H. Brown , Daniel J. Baker , Matthew J. DeVoe , Sarvesh V. Nagarajan
发明人： Christopher F. Graf , Ryan H. Brown , Daniel J. Baker , Matthew J. DeVoe , Sarvesh V. Nagarajan
IPC分类号： G06F9/44
CPC分类号： G06F8/71 , G05B19/05 , G06F8/34 , G06F11/3696
摘要： Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.
摘要翻译：定制目标系统。目标系统可以包括具有第一可编程硬件元件（PHE）的第一设备和具有第二PHE的第二设备。可以提供同步模块用于在第一和第二PHE上实现。同步模块可以提供用于与其他代码交互的标准接口。用户可以为利用同步模块的第一和第二PHE指定用户创建的代码。用户创建的代码可以使用标准接口与同步模块交互。因此，可以为目标系统的第一和第二PHE生成硬件描述。不同的模块可以用于不同的互连。此外，在目标系统的操作期间，可以例如动态地使用多个同步模块。

9. 发明授权

US07478256B2 Coordinating data synchronous triggers on multiple devices 有权
标题翻译：在多个设备上协调数据同步触发
公开(公告)号：US07478256B2
公开(公告)日：2009-01-13
申请号：US11338923
申请日：2006-01-24
申请人： Craig M. Conway , Jeff A. Bergeron , Daniel J. Baker
发明人： Craig M. Conway , Jeff A. Bergeron , Daniel J. Baker
IPC分类号： G06F1/12
CPC分类号： G01R31/3016 , G01R31/31726
摘要： System and method for synchronizing multiple devices coupled to a system timing module (STM) via respective first transmission media, wherein two or more of the respective first transmission media have different respective transmission times. The STM and devices share a common clock, in phase and with respect to a common reference. Each device is configured to transmit respective signals to the STM within a common clock cycle. Respective delays corresponding to the devices are determined based on the respective transmission times, where the respective delays are applicable to respective signals received from the devices to synchronize received corresponding pulses in the signals to within a common clock cycle. The respective delays are applied to respective signals received from the plurality of devices to synchronize received corresponding pulses in the signals to within the common clock cycle, after which the STM is operable to trigger the devices as a single device.
摘要翻译：用于经由相应的第一传输介质来同步耦合到系统定时模块（STM）的多个设备的系统和方法，其中相应的第一传输介质中的两个或更多个具有不同的相应传输时间。 STM和器件同时共享公共时钟，并且相对于公共参考。每个设备被配置为在公共时钟周期内将相应的信号发送到STM。基于相应的传输时间来确定与设备相对应的相应延迟，其中相应的延迟适用于从设备接收的相应信号，以将信号中的接收到的相应脉冲同步到公共时钟周期内。相应的延迟被施加到从多个设备接收的相应信号，以将信号中的接收到的相应脉冲同步到公共时钟周期内，之后STM可操作以将设备触发为单个设备。

10. 发明申请

US20130219356A1 Modifying a Target System Configuration to Utilize a Different Synchronization Module for Performing Synchronization among Multiple Programmable Hardware Elements 有权
标题翻译：修改目标系统配置以利用不同的同步模块来执行多个可编程硬件元素之间的同步
公开(公告)号：US20130219356A1
公开(公告)日：2013-08-22
申请号：US13527208
申请日：2012-06-19
申请人： Christopher F. Graf , Ryan H. Brown , Daniel J. Baker , Matthew J. DeVoe
发明人： Christopher F. Graf , Ryan H. Brown , Daniel J. Baker , Matthew J. DeVoe
IPC分类号： G06F9/44
CPC分类号： G06F8/71 , G05B19/05 , G06F8/34 , G06F11/3696
摘要： Customizing a target system. The target system may include a first device with a first programmable hardware element (PHE) and a second device with a second PHE. Synchronization modules may be provided for implementation on the first and second PHEs. The synchronization modules may provide a standard interface for interacting with other code. A user may specify user-created code for the first and second PHEs which utilizes the synchronization modules. The user-created code may interact with the synchronization modules using the standard interface. Accordingly, hardware descriptions may be generated for the first and second PHEs of the target system. Different modules may be used for different interconnects. Additionally, multiple synchronization modules may be used, e.g., dynamically, during operation of the target system.
摘要翻译：定制目标系统。目标系统可以包括具有第一可编程硬件元件（PHE）的第一设备和具有第二PHE的第二设备。可以提供同步模块用于在第一和第二PHE上实现。同步模块可以提供用于与其他代码交互的标准接口。用户可以为利用同步模块的第一和第二PHE指定用户创建的代码。用户创建的代码可以使用标准接口与同步模块交互。因此，可以为目标系统的第一和第二PHE生成硬件描述。不同的模块可以用于不同的互连。此外，在目标系统的操作期间，可以例如动态地使用多个同步模块。

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