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    • 1. 发明授权
    • Frequency domain reflectometry system for testing wires and cables utilizing in-situ connectors, passive connectivity, cable fray detection, and live wire testing
    • 用于测试使用原位连接器,被动连接,电缆磨损检测和有线测试的电线和电缆的频域反射系统
    • US06868357B2
    • 2005-03-15
    • US10190314
    • 2002-07-05
    • Cynthia M. Furse
    • Cynthia M. Furse
    • G01R27/04G01R31/00G01R31/02G01R31/11
    • G01R31/021G01R27/04G01R31/008G01R31/11
    • A frequency domain reflectometer that is in electrical communication with a cable under test in order to determine cable characteristics including cable length and load characteristics such as capacitance, inductance, resistance, impedance (which is characterized as an open or short circuit condition), and the location of an open or short circuit, wherein the FDR cable testing is performed in-situ when the system is installed at the time of installation of the cable to thereby enable testing of cable without having to remove it and risk damage, wherein FDR cable testing is performed passively so as not to interfere with normal operation of the cable even if the FDR cable testing system should fail, wherein a system is taught that can detect faults that are difficult to detect out of an operating environment, and wherein FDR cable testing is performed to detect cable fray conditions, wherein the cable may be grounded or coupled to air.
    • 与被测电缆电通信的频域反射计,以确定包括电缆长度和电容,电感,电阻,阻抗(其特征在于开路或短路状况)的电缆长度和负载特性的电缆特性,以及 开路或短路的位置,其中当安装电缆时系统安装时,现场执行FDR电缆测试,从而能够对电缆进行测试,而无需将其拆除并造成风险损害,其中FDR电缆测试 被动执行,以便即使FDR电缆测试系统出现故障,也不会干扰电缆的正常操作,其中教导了可以检测到难以在操作环境中检测到的故障的系统,并且其中FDR电缆测试是 执行以检测电缆磨损状况,其中电缆可以接地或耦合到空气。
    • 4. 发明授权
    • System and method for characterizing a signal path using a sub-chip sampler
    • 使用子芯片采样器来表征信号路径的系统和方法
    • US07165200B2
    • 2007-01-16
    • US11124458
    • 2005-05-05
    • Nilay D. JaniAnurag NigamCynthia M. Furse
    • Nilay D. JaniAnurag NigamCynthia M. Furse
    • G01R31/28
    • G01R31/088G01R31/007G01R31/024G01R31/11
    • A system and method are disclosed for characterizing a signal path. The system includes a system clock configured to produce a system clock signal at a sample frequency. A frequency divider is configured to divide the sample frequency of the system clock signal by a factor of N to produce a chip clock signal at a chip frequency. The system further includes a pseudo-noise (PN) sequence generator configured to produce a PN sequence at the chip frequency and couple the PN sequence to the signal path while the signal path is carrying an operational signal. A sub-chip sampler is configured to correlate the PN sequence and a reflected PN sequence which has been reflected within the signal path to form a correlated signal and to sample the correlated signal at the sample frequency of the system clock signal.
    • 公开了用于表征信号路径的系统和方法。 该系统包括被配置为以采样频率产生系统时钟信号的系统时钟。 分频器被配置为将系统时钟信号的采样频率除以因子N以产生芯片频率的芯片时钟信号。 所述系统还包括伪噪声(PN)序列发生器,其被配置为产生芯片频率的PN序列,并且在信号路径携带操作信号时将PN序列耦合到信号路径。 子芯片采样器被配置为使PN序列和已经在信号路径中反射的反射PN序列相关联,以形成相关信号并且以系统时钟信号的采样频率对相关信号进行采样。