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    • 2. 发明授权
    • Apparatus and method for optical interference fringe based integrated circuit processing
    • 用于光干涉条纹集成电路处理的装置和方法
    • US07697146B2
    • 2010-04-13
    • US11362240
    • 2006-02-24
    • Erwan Le RoyChun-Cheng TsaoTheodore R. Lundquist
    • Erwan Le RoyChun-Cheng TsaoTheodore R. Lundquist
    • G01B11/02
    • H01J37/3174B23K26/03B23K26/032B82Y10/00B82Y40/00
    • An apparatus and method for processing an integrated circuit employing optical interference fringes. During processing, light is directed on the integrated circuit and based upon the detection of interference fringes, further processing may be controlled. One implementation involves charged particle beam processing of an integrated circuit as function of detection of interference fringes. A charged particle beam trench milling operation is performed in or on the substrate of an integrated circuit. Light is directed on the floor of the trench. When the floor approaches the underlying circuit structures, some light is reflected from the floor of the trench and some light penetrates the substrate and is reflected off the underlying circuit structures. Interference fringes may be formed from the constructive or destructive interference between the light reflected from the floor and the light from the circuit structures. Processing may be controlled as function of the detection of interference fringes.
    • 一种使用光学干涉条纹处理集成电路的装置和方法。 在处理期间,光被引导到集成电路上,并且基于干涉条纹的检测,可以控制进一步的处理。 一种实施方案涉及集成电路的带电粒子束处理作为干涉条纹检测的功能。 在集成电路的衬底中或其上执行带电粒子束沟槽铣削操作。 光照在沟槽的地板上。 当地板接近下面的电路结构时,一些光从沟槽的底部反射,并且一些光穿透衬底并从下面的电路结构反射。 干涉条纹可以由从地板反射的光与来自电路结构的光之间的建构性或破坏性干扰形成。 作为检测干涉条纹的功能,可以控制处理。
    • 5. 发明授权
    • Method for determining thickness of a semiconductor substrate at the floor of a trench
    • 确定沟槽底部的半导体衬底的厚度的方法
    • US06955930B2
    • 2005-10-18
    • US10161272
    • 2002-05-30
    • Erwan Le RoyChun-Cheng Tsao
    • Erwan Le RoyChun-Cheng Tsao
    • H01J37/30H01J37/305H01L21/3065H01L21/66
    • H01J37/3005H01J37/3056H01J2237/30466H01L21/3065
    • Apparatus and method for exposing a selected feature of an integrated circuit device such as a selected portion of the metallization layer, from the backside of the integrated circuit substrate without disturbing adjacent features of the device such as the active semiconductor regions. This is performed using an FIB (focused ion beam) etching process in conjunction with observation by an optical microscope to form a trench through the substrate. The process includes a precise optical endpointing technique to monitor the remaining thickness of the semiconductor substrate at the floor of the trench. It is important to terminate etching of the trench so that the trench floor extends as close to the active semiconductor structures as desired and yet is not detrimental to device operation. This is done without introducing a need for any additional tool. This is carried out using an infra-red optical technique which observes the interference fringes generated by the reflections from the silicon substrate surface and from semiconductor device circuitry layers to quantify the remaining semiconductor substrate thickness in the trench.
    • 用于从集成电路衬底的背面暴露诸如金属化层的选定部分的集成电路器件的选定特征的装置和方法,而不干扰诸如有源半导体区域的器件的相邻特征。 这是通过FIB(聚焦离子束)蚀刻工艺结合光学显微镜的观察来进行的,以通过衬底形成沟槽。 该方法包括精确的光学终点技术,以监测沟槽底部的半导体衬底的剩余厚度。 重要的是终止沟槽的蚀刻,使得沟槽底板根据需要延伸到接近有源半导体结构,并且不会对器件操作产生不利影响。 这不需要任何额外的工具就可以完成。 这使用红外光学技术进行,该技术观察由硅衬底表面和半导体器件电路层的反射产生的干涉条纹,以量化沟槽中剩余的半导体衬底厚度。