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1. 发明申请

US20090259786A1 DATA TRANSFER SYSTEM AND METHOD FOR HOST-SLAVE INTERFACE WITH AUTOMATIC STATUS REPORT 审中-公开
标题翻译：具有自动状态报告的主机接口的数据传输系统和方法
公开(公告)号：US20090259786A1
公开(公告)日：2009-10-15
申请号：US12339072
申请日：2008-12-19
申请人： Chu-Ming Lin , Chien-Kuang Lin , Chuan-Hung Wang , Chin-Tai Liu
发明人： Chu-Ming Lin , Chien-Kuang Lin , Chuan-Hung Wang , Chin-Tai Liu
IPC分类号： G06F13/40
CPC分类号： G06F13/4027
摘要： In a host-slave data transfer system, the slave device transmits data regarding its status and buffer conditions to the host using tailers inserted into the data being transferred to the host. The slave device has a plurality of buffers, a buffer management circuit which manages the buffers and obtains buffer condition information (e.g. amount of available buffer space, amount of buffered data to be transferred to the host), a detection circuit which collects interrupt status of the slave, a processing circuit which generates headers or tailers containing the buffer conditions information and interrupt status, and a merging circuit which merges multiple data segments received from the data-source/data-destination device and associated headers and tailers to generate a stream of merged data. The host obtains the buffer condition information from the tailers, and uses it to determine the amount of data to transmit or receive from the slave.
摘要翻译：在主从数据传输系统中，从设备使用插入到正在传送给主机的数据中的分机向宿主发送关于其状态和缓冲器条件的数据。从设备具有多个缓冲器，缓冲器管理电路管理缓冲器并获得缓冲器条件信息（例如可用缓冲器空间量，要传送到主机的缓冲数据量），检测电路，其收集中断状态从设备，产生包含缓冲器条件信息和中断状态的报头或分机的处理电路，以及合并电路，其合并从数据源/数据 - 目的地设备和相关联的报头和分配器接收的多个数据段，以产生流合并数据。主机从尾随机获取缓冲条件信息，并使用它来确定从从站发送或接收的数据量。

2. 发明授权

US08302182B2 Embedded system with authentication, and associated authentication method 失效
标题翻译：具有认证的嵌入式系统及相关认证方式
公开(公告)号：US08302182B2
公开(公告)日：2012-10-30
申请号：US12202423
申请日：2008-09-01
申请人： Chuan-Hung Wang , Chin-Tai Liu , Ken-Hao Liu
发明人： Chuan-Hung Wang , Chin-Tai Liu , Ken-Hao Liu
IPC分类号： G06F12/00
CPC分类号： G06F9/4401 , G06F9/4416 , G06F21/51 , G06F21/575
摘要： An embedded system with authentication includes: a system read only memory (ROM), a processing circuit and an authentication circuit. The system ROM is arranged to store a boot code. In addition, the processing circuit is arranged to process at least according to the boot code in order to perform operations of the embedded system. Additionally, the authentication circuit is arranged to perform authentication on a command script in order to determine whether the command script is authenticated, and is arranged to prevent the command script from being executed by the processing circuit when the authentication circuit determines that the command script is not authenticated, wherein the command script is received from outside a chip where the system ROM, the processing circuit and the authentication circuit are positioned.
摘要翻译：具有认证的嵌入式系统包括：系统只读存储器（ROM），处理电路和认证电路。系统ROM被安排为存储引导代码。此外，处理电路被布置为至少根据引导代码进行处理，以便执行嵌入式系统的操作。此外，认证电路被配置为对命令脚本执行认证，以便确定命令脚本是否被认证，并且被布置成当认证电路确定命令脚本是否为命令脚本时，防止命令脚本被处理电路执行未认证，其中从系统ROM，处理电路和认证电路所在的芯片外部接收命令脚本。

3. 发明申请

US20100058461A1 EMBEDDED SYSTEM WITH AUTHENTICATION, AND ASSOCIATED AUTHENTICATION METHOD 失效
标题翻译：具有认证的嵌入式系统和相关认证方法
公开(公告)号：US20100058461A1
公开(公告)日：2010-03-04
申请号：US12202423
申请日：2008-09-01
申请人： Chuan-Hung Wang , Chin-Tai Liu , Ken-Hao Liu
发明人： Chuan-Hung Wang , Chin-Tai Liu , Ken-Hao Liu
IPC分类号： G06F21/00
CPC分类号： G06F9/4401 , G06F9/4416 , G06F21/51 , G06F21/575
摘要： An embedded system with authentication includes: a system read only memory (ROM), a processing circuit and an authentication circuit. The system ROM is arranged to store a boot code. In addition, the processing circuit is arranged to process at least according to the boot code in order to perform operations of the embedded system. Additionally, the authentication circuit is arranged to perform authentication on a command script in order to determine whether the command script is authenticated, and is arranged to prevent the command script from being executed by the processing circuit when the authentication circuit determines that the command script is not authenticated, wherein the command script is received from outside a chip where the system ROM, the processing circuit and the authentication circuit are positioned.
摘要翻译：具有认证的嵌入式系统包括：系统只读存储器（ROM），处理电路和认证电路。系统ROM被安排为存储引导代码。此外，处理电路被布置为至少根据引导代码进行处理，以便执行嵌入式系统的操作。此外，认证电路被配置为对命令脚本执行认证，以便确定命令脚本是否被认证，并且被布置成当认证电路确定命令脚本是否为命令脚本时，防止命令脚本被处理电路执行未认证，其中从系统ROM，处理电路和认证电路所在的芯片外部接收命令脚本。

4. 发明申请

US20100014437A1 METHODS FOR BUS DATA TRANSMISSION AND SYSTEMS UTILIZING THE SAME 有权
标题翻译：用于总线数据传输的方法和使用该数据传输的系统
公开(公告)号：US20100014437A1
公开(公告)日：2010-01-21
申请号：US12407186
申请日：2009-03-19
申请人： Chuan-Hung Wang , Chien-Kuang Lin , Chin-Tai Liu , Chu-Ming Lin
发明人： Chuan-Hung Wang , Chien-Kuang Lin , Chin-Tai Liu , Chu-Ming Lin
IPC分类号： H04L12/56 , H04L12/26
CPC分类号： H04L47/10 , G06F11/0745 , G06F11/0793 , G06F11/1004 , H04L1/0052 , H04L1/0061 , H04L1/188 , H04L49/90 , H04L2001/0094
摘要： A method for data transmission in a device coupled to a host via a bus is provided. A sequence of data packets are received from the host and the received data packets are stored into a buffering unit of the device. It is then determined whether a predetermined error has occurred. When the predetermined error has occurred, the buffering unit of the device is locked to stop receiving the data packets. Thereafter, the buffering unit of the device is unlocked according to an unlock request from the host to resume receiving subsequent data packets.
摘要翻译：提供了一种通过总线耦合到主机的设备中的数据传输方法。从主机接收到数据分组序列，并将接收的数据分组存储到设备的缓冲单元中。然后确定是否发生了预定的错误。当发生预定错误时，设备的缓冲单元被锁定以停止接收数据分组。此后，设备的缓冲单元根据来自主机的解锁请求解锁，以恢复接收后续数据分组。

5. 发明授权

US08867344B2 Methods for bus data transmission and systems utilizing the same 有权
标题翻译：总线数据传输方法及其使用方法
公开(公告)号：US08867344B2
公开(公告)日：2014-10-21
申请号：US12407186
申请日：2009-03-19
申请人： Chuan-Hung Wang , Chien-Kuang Lin , Chin-Tai Liu , Chu-Ming Lin
发明人： Chuan-Hung Wang , Chien-Kuang Lin , Chin-Tai Liu , Chu-Ming Lin
IPC分类号： H04L12/26 , H04L12/801 , H04L12/861 , H04L1/18
CPC分类号： H04L47/10 , G06F11/0745 , G06F11/0793 , G06F11/1004 , H04L1/0052 , H04L1/0061 , H04L1/188 , H04L49/90 , H04L2001/0094
摘要： A method for data transmission in a device coupled to a host via a bus is provided. A sequence of data packets are received from the host and the received data packets are stored into a buffering unit of the device. It is then determined whether a predetermined error has occurred. When the predetermined error has occurred, the buffering unit of the device is locked to stop receiving the data packets. Thereafter, the buffering unit of the device is unlocked according to an unlock request from the host to resume receiving subsequent data packets.
摘要翻译：提供了一种通过总线耦合到主机的设备中的数据传输方法。从主机接收到数据分组序列，并将接收的数据分组存储到设备的缓冲单元中。然后确定是否发生了预定的错误。当发生预定错误时，设备的缓冲单元被锁定以停止接收数据分组。此后，设备的缓冲单元根据来自主机的解锁请求解锁，以恢复接收后续数据分组。

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