专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20080162793A1 MANAGEMENT METHOD FOR REDUCING UTILIZATION RATE OF RANDOM ACCESS MEMORY (RAM) USED IN FLASH MEMORY 有权
标题翻译：用于降低FLASH存储器中使用的随机存取存储器（RAM）的使用率的管理方法
公开(公告)号：US20080162793A1
公开(公告)日：2008-07-03
申请号：US11961136
申请日：2007-12-20
申请人： Yuan-sheng Chu , Jen-wei Hsieh , Yuan-hao Chang , Tei-wei Kuo , Cheng-chih Yang
发明人： Yuan-sheng Chu , Jen-wei Hsieh , Yuan-hao Chang , Tei-wei Kuo , Cheng-chih Yang
IPC分类号： G06F12/02
CPC分类号： G06F12/0246
摘要： A management method for reducing the utilization rate of random access memory (RAM) while reading data from or writing data to the flash memory is disclosed. A physical memory set is constructed from a plurality of physical memory blocks in the flash memory. A logical set is constructed from a plurality of logical blocks wherein the data stored in the logical set are stored in the physical memory set. Further, the data stored in each of the logical blocks are stored in one number of physical memory blocks. A mapping table is constructed and includes a hash function, a logical set table, a physical memory set table, and a set status table for managing the relationship among the physical memory sets, physical memory blocks, and logical blocks while reading data from or writing data to the flash memory. Further, the management method operates and maintains the physical memory sets, the physical memory blocks, and the logical blocks at a set level so that the utilization rate of random access memory is reduced to decrease the access capacity of the random access memory while operating the physical memory blocks and the logical blocks of the flash memory.
摘要翻译：公开了一种在从闪速存储器读取数据或向闪速存储器写入数据时降低随机存取存储器（RAM）利用率的管理方法。物理存储器组由闪速存储器中的多个物理存储器块构成。从存储在逻辑集合中的数据存储在物理存储器集合中的多个逻辑块构成逻辑集合。此外，存储在每个逻辑块中的数据被存储在一个数量的物理存储块中。构建映射表并且包括散列函数，逻辑集表，物理存储器集表和用于在从或写入数据时管理物理存储器组，物理存储器块和逻辑块之间的关系的设置状态表数据到闪存。此外，管理方法将物理存储器组，物理存储器块和逻辑块操作并维持在设定电平，从而降低随机存取存储器的利用率，以减小随机存取存储器的存取容量，同时操作物理存储器块和闪存的逻辑块。

2. 发明申请

US20070300010A1 APPARATUS FOR FAST ACCESSES TO FLASH MEMORY 审中-公开
标题翻译：快速访问闪存的设备
公开(公告)号：US20070300010A1
公开(公告)日：2007-12-27
申请号：US11764920
申请日：2007-06-19
申请人： Cheng-chih Yang , Fong-hsu Wei , Che-wei Chang
发明人： Cheng-chih Yang , Fong-hsu Wei , Che-wei Chang
IPC分类号： G06F12/00
CPC分类号： G06F13/28
摘要： An apparatus for fast access to flash memory is provided, including a flash memory and an access controller. A system data reserved region is configured in the flash memory to provide temporary storage for data and instruction used in the flash memory access. The access controller includes a flash memory control interface, a RAM, a RAM DMA unit, and an ECC unit. The flash memory control interface is connected to the flash memory. The DMA unit and the ECC unit are connected between the RAM and the flash memory control interface to provide direct access and error correction functions, as well as allowing, during the data access to the flash memory, the data and the system instruction of the system data reserved region in the flash memory to go through the flash memory control interface, the DMA unit and the ECC unit to load into the RAM for acting as an extended memory for the RAM to effect fast access to the flash memory and extending the RAM capacity.
摘要翻译：提供了一种用于快速访问闪存的装置，包括闪存和访问控制器。在闪速存储器中配置系统数据保留区域，以提供用于闪存存取访问中的数据和指令的临时存储。访问控制器包括闪存控制接口，RAM，RAM DMA单元和ECC单元。闪存控制接口连接到闪存。 DMA单元和ECC单元连接在RAM和闪存控制接口之间，以提供直接访问和纠错功能，以及允许在数据访问闪存期间数据和系统的系统指令闪存中的数据保留区域通过闪存控制接口，DMA单元和ECC单元加载到RAM中，用作RAM的扩展存储器，以实现快速访问闪存并扩展RAM容量。

3. 发明申请

US20080162796A1 METHOD FOR PERFORMING STATIC WEAR LEVELING ON FLASH MEMORY 有权
标题翻译：用于在闪速存储器上执行静态磨损水平的方法
公开(公告)号：US20080162796A1
公开(公告)日：2008-07-03
申请号：US11963262
申请日：2007-12-21
申请人： Yuan-hao Chang , Jen-wei Hsieh , Tei-wei Kuo , Cheng-chih Yang
发明人： Yuan-hao Chang , Jen-wei Hsieh , Tei-wei Kuo , Cheng-chih Yang
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F3/0688 , G06F12/00 , G06F2212/1036 , G06F2212/2022 , G06F2212/222 , G06F2212/7201 , G06F2212/7202 , G06F2212/7205 , G06F2212/7211
摘要： A method for performing a static wear leveling on a flash memory is disclosed. Accordingly, a static wear leveling unit is disposed with a block reclamation unit of either a flash translation layer or a native file system in the flash memory, and utilizes less memory space to trace a distribution status of block leveling cycles of each physical block of the flash memory. Based on the distribution record of the block leveling cycles, the number of the leveling cycles less than a premeditated threshold would be found while the system idles. Then the static wear leveling unit requests the block reclamation unit to level the found blocks. Before leveling the found block, the rarely updated data is compelled to move from one block to another block which is leveled frequently, whereby accurate wear leveling cycles for the blocks can be averaged extremely.
摘要翻译：公开了一种用于在闪速存储器上执行静态损耗均衡的方法。因此，静态损耗均衡单元在闪速存储器中设置有闪存转换层或本地文件系统的块回收单元，并且利用较少的存储空间来跟踪每个物理块的块调平周期的分布状态闪存根据块调平周期的分布记录，当系统空转时，会发现小于预谋阈值的调平周期数。然后，静态磨损均衡单元请求块回收单元对找到的块进行调平。在调平找到的块之前，很少更新的数据被迫从一个块移动到另一个频繁调平的块，从而可以极大地平均块的精确损耗平衡周期。

4. 发明申请

US20080059693A1 METHOD FOR IMPROVING LIFESPAN OF FLASH MEMORY 审中-公开
标题翻译：改进闪存存储器寿命的方法
公开(公告)号：US20080059693A1
公开(公告)日：2008-03-06
申请号：US11844355
申请日：2007-08-24
申请人： Cheng-chih Yang , Fong-hsu Wei , Che-wei Chang
发明人： Cheng-chih Yang , Fong-hsu Wei , Che-wei Chang
IPC分类号： G06F12/06
CPC分类号： G06F12/0246 , G06F2212/1036 , G06F2212/7211
摘要： A method for improving the lifespan of flash memory is provided. By defining and configuring a plurality of memory block counters, the method assigns a counter to each memory block to record the number of writes to the memory block. With configuring a threshold for the counter, the counter is compared to the threshold for each write to the memory block so as to determine the priority update, data erase, update and move. The counter is also synchronously erased, updated, and moved so that the number of the writes to the flash memory blocks can be controlled by the configuration. Hence, the object of prolonging lifespan and reliability of the flash memory access is achieved.
摘要翻译：提供了一种提高闪速存储器寿命的方法。通过定义和配置多个存储器块计数器，该方法为每个存储器块分配计数器以将写入次数记录到存储器块。通过配置计数器的阈值，将计数器与每次写入存储器块的阈值进行比较，以确定优先级更新，数据擦除，更新和移动。计数器也被同步擦除，更新和移动，以便可以通过配置控制对闪存块的写入次数。因此，实现了延长闪存访问寿命和可靠性的目的。

5. 发明授权

US08392690B2 Management method for reducing utilization rate of random access memory (RAM) used in flash memory 有权
标题翻译：用于降低闪存中使用的随机存取存储器（RAM）利用率的管理方法
公开(公告)号：US08392690B2
公开(公告)日：2013-03-05
申请号：US11961136
申请日：2007-12-20
申请人： Yuan-sheng Chu , Jen-wei Hsieh , Yuan-hao Chang , Tei-wei Kuo , Cheng-chih Yang
发明人： Yuan-sheng Chu , Jen-wei Hsieh , Yuan-hao Chang , Tei-wei Kuo , Cheng-chih Yang
IPC分类号： G06F12/00
CPC分类号： G06F12/0246
摘要： A management method for reducing the utilization rate of random access memory (RAM) while reading data from or writing data to the flash memory is disclosed. A physical memory set is constructed from a plurality of physical memory blocks in the flash memory. A logical set is constructed from a plurality of logical blocks wherein the data stored in the logical set are stored in the physical memory set. Further, the data stored in each of the logical blocks are stored in one number of physical memory blocks. A mapping table is constructed and includes a hash function, a logical set table, a physical memory set table, and a set status table for managing the relationship among the physical memory sets, physical memory blocks, and logical blocks while reading data from or writing data to the flash memory. Further, the management method operates and maintains the physical memory sets, the physical memory blocks, and the logical blocks at a set level so that the utilization rate of random access memory is reduced to decrease the access capacity of the random access memory while operating the physical memory blocks and the logical blocks of the flash memory.
摘要翻译：公开了一种在从闪速存储器读取数据或向闪速存储器写入数据时降低随机存取存储器（RAM）利用率的管理方法。物理存储器组由闪速存储器中的多个物理存储器块构成。从存储在逻辑集合中的数据存储在物理存储器集合中的多个逻辑块构成逻辑集合。此外，存储在每个逻辑块中的数据被存储在一个数量的物理存储块中。构建映射表并且包括散列函数，逻辑集表，物理存储器集表和用于在从或写入数据时管理物理存储器组，物理存储器块和逻辑块之间的关系的设置状态表数据到闪存。此外，管理方法将物理存储器组，物理存储器块和逻辑块操作并维持在设定电平，从而降低随机存取存储器的利用率，以减小随机存取存储器的存取容量，同时操作物理存储器块和闪存的逻辑块。

6. 发明授权

US08700839B2 Method for performing static wear leveling on flash memory 有权
标题翻译：在闪存上执行静态损耗均衡的方法
公开(公告)号：US08700839B2
公开(公告)日：2014-04-15
申请号：US11963262
申请日：2007-12-21
申请人： Yuan-Hao Chang , Jen-Wei Hsieh , Tei-Wei Kuo , Cheng-Chih Yang
发明人： Yuan-Hao Chang , Jen-Wei Hsieh , Tei-Wei Kuo , Cheng-Chih Yang
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F12/02 , G06F3/06
CPC分类号： G06F12/0246 , G06F3/0688 , G06F12/00 , G06F2212/1036 , G06F2212/2022 , G06F2212/222 , G06F2212/7201 , G06F2212/7202 , G06F2212/7205 , G06F2212/7211
摘要： A method for performing a static wear leveling on a flash memory is disclosed. Accordingly, a static wear leveling unit is disposed with a block reclamation unit of either a flash translation layer or a native file system in the flash memory, and utilizes less memory space to trace a distribution status of block leveling cycles of each physical block of the flash memory. Based on the distribution record of the block leveling cycles, the number of the leveling cycles less than a premeditated threshold would be found while the system idles. Then the static wear leveling unit requests the block reclamation unit to level the found blocks. Before leveling the found block, the rarely updated data is compelled to move from one block to another block which is leveled frequently, whereby accurate wear leveling cycles for the blocks can be averaged extremely.
摘要翻译：公开了一种用于在闪速存储器上执行静态损耗均衡的方法。因此，静态损耗均衡单元在闪速存储器中设置有闪存转换层或本地文件系统的块回收单元，并且利用较少的存储空间来跟踪每个物理块的块调平周期的分布状态闪存根据块调平周期的分布记录，当系统空转时，会发现小于预谋阈值的调平周期数。然后，静态磨损均衡单元请求块回收单元对找到的块进行调平。在调平找到的块之前，很少更新的数据被迫从一个块移动到另一个频繁调平的块，从而可以极大地平均块的精确损耗平衡周期。

7. 发明授权

US07975095B2 Device and method for using a flash memory as a hard disk cache 有权
标题翻译：使用闪存作为硬盘缓存的设备和方法
公开(公告)号：US07975095B2
公开(公告)日：2011-07-05
申请号：US11963173
申请日：2007-12-21
申请人： Jen-Wei Hsieh , Po-Liang Wu , Yuan-Hao Chang , Tei-Wei Kuo , Cheng-Chih Yang
发明人： Jen-Wei Hsieh , Po-Liang Wu , Yuan-Hao Chang , Tei-Wei Kuo , Cheng-Chih Yang
IPC分类号： G06F12/00
CPC分类号： G06F12/0866 , G06F2212/222
摘要： A cache device comprises a hard disk, cache control unit and at least one flash memory, whereby the cache control unit controlling and regulating the flash memory as the hard disk cache device. The present invention method is defined by setting up a management table to manage each corresponding logical block address of the flash memory through a cache data read-out step and cache data write-in step in order to manage the cache read or write action of the flash memory on the hard disk. In addition, the step of recycling a cache space and replacing cache temporary data storage is to remove and replace temporary cache and storage space within the flash memory on the hard disk. Moreover, the step of reconstruction management table is provided to reconstruct management table loss or damage caused by power outage or irregular shut-down of the computer and will be able to provide flash memory on the hard disk cache control.
摘要翻译：缓存装置包括硬盘，高速缓存控制单元和至少一个闪速存储器，由此高速缓存控制单元控制和调节闪存作为硬盘高速缓存设备。通过设置管理表来定义本发明的方法，以通过高速缓存数据读出步骤和高速缓存数据写入步骤来管理闪存的每个对应的逻辑块地址，以便管理高速缓存读取或写入动作闪存在硬盘上。此外，回收高速缓存空间和替换高速缓存临时数据存储的步骤是删除和替换硬盘中的闪存中的临时高速缓存和存储空间。此外，重建管理表提供了重建管理表丢失或由电源中断或计算机不规则关闭造成的损坏，并能够在硬盘缓存控制上提供闪存。

8. 发明授权

US07890693B2 Flash translation layer apparatus 有权
标题翻译：闪存转换层设备
公开(公告)号：US07890693B2
公开(公告)日：2011-02-15
申请号：US12018346
申请日：2008-01-23
申请人： Cheng-chih Yang , Tei-wei Kuo , Chin-hsien Wu
发明人： Cheng-chih Yang , Tei-wei Kuo , Chin-hsien Wu
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7201
摘要： A flash translation layer apparatus is disclosed. The flash translation layer apparatus coupled to a flash memory and a reading and writing controller, respectively. The flash translation layer apparatus includes an instruction register, a logical address register, a data register, a first auxiliary controller, a microprocessor, an address converting unit, a second auxiliary controller, a flash address register and an adjustable translation layer unit. Furthermore, the adjustable translation layer unit regards the block as a unit for a coarse-grained address translation table and regards the pages as a unit for a fine-grained address translation table, respectively. Therefore, the present invention can provide capabilities of reducing the spaces and the times of a null data collection procedure and increasing the efficiency when a logical address corresponds to a physical address.
摘要翻译：公开了一种闪光转换层设备。闪存转换层设备分别耦合到闪速存储器和读写控制器。闪存转换层装置包括指令寄存器，逻辑地址寄存器，数据寄存器，第一辅助控制器，微处理器，地址转换单元，第二辅助控制器，闪存地址寄存器和可调平移层单元。此外，可调翻译层单元将块视为粗粒度地址转换表的单位，并将页面分别视为细粒度地址转换表的单位。因此，本发明可以提供减少空数据收集过程的空间和时间的能力，并且当逻辑地址对应于物理地址时提高效率。

9. 发明申请

US20080183955A1 FLASH TRANSLATION LAYER APPARATUS 有权
标题翻译：闪存翻译层设备
公开(公告)号：US20080183955A1
公开(公告)日：2008-07-31
申请号：US12018346
申请日：2008-01-23
申请人： Cheng-chih Yang , Tei-wei Kuo , Chin-hsien Wu
发明人： Cheng-chih Yang , Tei-wei Kuo , Chin-hsien Wu
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7201
摘要： A flash translation layer apparatus is disclosed. The flash translation layer apparatus coupled to a flash memory and a reading and writing controller, respectively. The flash translation layer apparatus includes an instruction register, a logical address register, a data register, a first auxiliary controller, a microprocessor, an address converting unit, a second auxiliary controller, a flash address register and an adjustable translation layer unit. Furthermore, the adjustable translation layer unit regards the block as a unit for a coarse-grained address translation table and regards the pages as a unit for a fine-grained address translation table, respectively. Therefore, the present invention can provide capabilities of reducing the spaces and the times of a null data collection procedure and increasing the efficiency when a logical address corresponds to a physical address.
摘要翻译：公开了一种闪光转换层设备。闪存转换层设备分别耦合到闪速存储器和读写控制器。闪存转换层装置包括指令寄存器，逻辑地址寄存器，数据寄存器，第一辅助控制器，微处理器，地址转换单元，第二辅助控制器，闪存地址寄存器和可调平移层单元。此外，可调翻译层单元将块视为粗粒度地址转换表的单位，并将页面分别视为细粒度地址转换表的单位。因此，本发明可以提供减少空数据收集过程的空间和时间的能力，并且当逻辑地址对应于物理地址时提高效率。

10. 发明申请

US20080162795A1 HARD DISK CACHE DEVICE AND METHOD 有权
标题翻译：硬盘高速缓存设备和方法
公开(公告)号：US20080162795A1
公开(公告)日：2008-07-03
申请号：US11963173
申请日：2007-12-21
申请人： Jen-wei Hsieh , Po-liang Wu , Yuan-hao Chang , Tei-wei Kuo , Cheng-chih Yang
发明人： Jen-wei Hsieh , Po-liang Wu , Yuan-hao Chang , Tei-wei Kuo , Cheng-chih Yang
IPC分类号： G06F12/08 , G06F12/02
CPC分类号： G06F12/0866 , G06F2212/222
摘要： A cache device comprises a hard disk, cache control unit and at least one flash memory, whereby the cache control unit controlling and regulating the flash memory as the hard disk cache device. The present invention method is defined by setting up a management table to manage each corresponding logical block address of the flash memory through a cache data read-out step and cache data write-in step in order to manage the cache read or write action of the flash memory on the hard disk. In addition, the step of recycling a cache space and replacing cache temporary data storage is to remove and replace temporary cache and storage space within the flash memory on the hard disk. Moreover, the step of reconstruction management table is provided to reconstruct management table loss or damage caused by power outage or irregular shut-down of the computer and will be able to provide flash memory on the hard disk cache control.
摘要翻译：缓存装置包括硬盘，高速缓存控制单元和至少一个闪速存储器，由此高速缓存控制单元控制和调节闪存作为硬盘高速缓存设备。通过设置管理表来定义本发明的方法，以通过高速缓存数据读出步骤和高速缓存数据写入步骤来管理闪存的每个对应的逻辑块地址，以便管理高速缓存读取或写入动作闪存在硬盘上。此外，回收高速缓存空间和替换高速缓存临时数据存储的步骤是删除和替换硬盘中的闪存中的临时高速缓存和存储空间。此外，重建管理表提供了重建管理表丢失或由电源中断或计算机不规则关闭造成的损坏，并能够在硬盘缓存控制上提供闪存。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式