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1. 发明申请

US20130283300A1 TRAY LOCKING DEVICE OF OPTICAL DISC DRIVE 审中-公开
标题翻译：光盘驱动器托盘锁定装置
公开(公告)号：US20130283300A1
公开(公告)日：2013-10-24
申请号：US13551585
申请日：2012-07-17
申请人： Cheng-Chung Hsu , Yung-Han Wu , Sz-Shian He , Ming-Chun Tsao , In-Shuen Lee
发明人： Cheng-Chung Hsu , Yung-Han Wu , Sz-Shian He , Ming-Chun Tsao , In-Shuen Lee
IPC分类号： G11B17/03
CPC分类号： G11B17/056
摘要： A tray locking device of an optical disc drive adapted to lock and release a tray is provided. The optical disc drive has an optical head engaged with a lead screw and driven to move by the lead screw. The tray locking device includes a pushing member disposed on the optical head, a latching hook for latching and releasing a pin, and a transmission assembly disposed between the pushing member and the latching hook. The transmission assembly includes first and second lever elements. The first lever element pivoted in the tray has a slide slot having a first protrusion portion therein. The second lever element has a second protrusion portion adapted to move within the slide slot. When the tray is to be ejected, the lead screw drives the pushing member to push the second lever element, such that the second protrusion portion is aligned with the first protrusion portion.
摘要翻译：提供适于锁定和释放托盘的光盘驱动器的托盘锁定装置。光盘驱动器具有与导螺杆啮合的光头，并通过导螺杆驱动。托盘锁定装置包括设置在光学头上的推动构件，用于锁定和释放销的闩锁钩以及设置在推动构件和闩锁钩之间的变速组件。传动组件包括第一和第二杠杆元件。枢转在托盘中的第一杠杆元件具有其中具有第一突出部分的滑动槽。第二杠杆元件具有适于在滑槽内移动的第二突出部分。当托盘被排出时，导螺杆驱动推动构件推动第二杠杆元件，使得第二突起部分与第一突出部对准。

2. 发明授权

US08424027B1 Optical disc drive and tray locking device thereof 有权
标题翻译：光盘驱动器和托盘锁定装置
公开(公告)号：US08424027B1
公开(公告)日：2013-04-16
申请号：US13517601
申请日：2012-06-14
申请人： Cheng-Chung Hsu , Yung-Han Wu , Sz-Shian He , Ming-Chun Tsao , In-Shuen Lee
发明人： Cheng-Chung Hsu , Yung-Han Wu , Sz-Shian He , Ming-Chun Tsao , In-Shuen Lee
IPC分类号： G11B17/04
CPC分类号： G11B17/056
摘要： An optical disc drive is provided. The optical disc drive includes a housing having a protruding pin, an optical head engaged to a lead screw, a tray slidably disposed in the housing and a tray locking device disposed on the tray. The tray locking device includes a pushing member, wherein the pushing member and the optical head are driven by the lead screw to move, a latching hook used to latch and release the protruding pin, and a transmission assembly disposed between the pushing member and the latching hook. The transmission assembly has a driving portion disposed on a moving path of the pushing member, wherein the pushing member pushes the driving portion so that the transmission assembly is actuated and drives the latching hook to release the protruding pin.
摘要翻译：提供光盘驱动器。光盘驱动器包括具有突出销的外壳，与引导螺钉啮合的光学头，可滑动地设置在外壳中的托盘和设置在托盘上的托盘锁定装置。托盘锁定装置包括推动构件，其中推动构件和光学头由导螺杆驱动移动，用于闩锁和释放突出销的闩锁钩以及设置在推动构件和闩锁之间的传动组件钩。变速器组件具有设置在推动构件的移动路径上的驱动部分，其中推动构件推动驱动部分，使得变速器组件被致动并驱动闩锁钩以释放突出的销。

3. 发明申请

US20120227062A1 OPTICAL PICK-UP HEAD MODULE 审中-公开
标题翻译：光学拾取头模块
公开(公告)号：US20120227062A1
公开(公告)日：2012-09-06
申请号：US13075184
申请日：2011-03-30
申请人： Cheng-Chung Hsu , Chia-Yuan Lin , Chun-Lung Ho
发明人： Cheng-Chung Hsu , Chia-Yuan Lin , Chun-Lung Ho
IPC分类号： G11B7/085
CPC分类号： G11B7/082
摘要： An optical pick-up head module includes a base, an optical pick-up head adjusting mechanism, two guiding rods, a spring and an optical pick-up head slidably disposed on the guiding rods. The optical pick-up head adjusting mechanism includes a protrusion, a pillar and an adjusting element. The protrusion connected to the base has a sliding slot. The pillar having first and second flat surfaces is slidably disposed in the sliding slot. The first flat surface contacts an inner wall of the sliding slot. The adjusting element is screwed on the base. The spring disposed on the base pushes the pillar to contact the adjusting element by the second flat surface. When the adjusting element is rotated, the adjusting element pushes the pillar toward the base.
摘要翻译：光学拾取头模块包括基座，光学拾取头调节机构，两个引导杆，可滑动地设置在引导杆上的弹簧和光学拾取头。光学拾取头调节机构包括突起，柱和调节元件。连接到基座的突起具有滑动槽。具有第一和第二平坦表面的支柱可滑动地设置在滑动槽中。第一平坦表面接触滑动槽的内壁。调节元件拧在基座上。设置在基座上的弹簧推动支柱以通过第二平坦表面接触调节元件。当调节元件旋转时，调节元件将支柱推向基座。

4. 发明授权

US08080982B2 Low drop-out voltage regulator with efficient frequency compensation 有权
标题翻译：低压差稳压器，具有高效的频率补偿
公开(公告)号：US08080982B2
公开(公告)日：2011-12-20
申请号：US12357382
申请日：2009-01-21
申请人： Ying-Yao Lin , Cheng-Chung Hsu
发明人： Ying-Yao Lin , Cheng-Chung Hsu
IPC分类号： G05F1/565
CPC分类号： G05F1/56
摘要： A low drop-out (LDO) voltage regulator with efficient frequency compensation is disclosed. The LDO voltage regulator includes an error amplifier, a transmission element, a voltage divider and a pole control unit. The error amplifier generates a control signal according to a reference voltage and a feedback voltage. The transmission element is coupled to the error amplifier, and adjusts an input voltage to generate an output voltage according to the control signal. The voltage divider is coupled to the transmission element, and performs a voltage division operation on the output voltage to generate the feedback voltage. The pole control unit is coupled to the transmission element, and provides and adjusts an output capacitor of the LDO voltage regulator to fix a frequency of a pole according to variation of an output impedance of the transmission element, so as to maintain loop stability.
摘要翻译：公开了一种具有高效频率补偿的低压差（LDO）稳压器。 LDO稳压器包括误差放大器，传输元件，分压器和极点控制单元。误差放大器根据参考电压和反馈电压产生控制信号。传输元件耦合到误差放大器，并根据控制信号调整输入电压以产生输出电压。分压器耦合到传输元件，并对输出电压进行分压操作以产生反馈电压。极控制单元耦合到传输元件，并且提供并调节LDO电压调节器的输出电容器，以根据变速器元件的输出阻抗的变化来固定极点的频率，从而保持环路的稳定性。

5. 发明申请

US20110102217A1 Analog-to-digital Converter and Related Calibrating Comparator 有权
标题翻译：模数转换器和相关校准比较器
公开(公告)号：US20110102217A1
公开(公告)日：2011-05-05
申请号：US12817133
申请日：2010-06-16
申请人： Cheng-Chung Hsu
发明人： Cheng-Chung Hsu
IPC分类号： H03M1/10 , H03M1/12
CPC分类号： H03M1/1042 , H03M1/466
摘要： An analog-to-digital converter includes a sample and hold unit, a successive control unit, a look-up memory, and a calibrating comparator, which further includes a positive input end, a negative input end, a timing signal input end, a data port, a latch unit, an enable switch, a first controllable resistor, a second controllable resistor, a reset switch assembly, a controllable capacitive device, and an output end.
摘要翻译：模数转换器包括采样和保持单元，连续控制单元，查找存储器和校准比较器，其还包括正输入端，负输入端，定时信号输入端，数据端口，锁存单元，使能开关，第一可控电阻器，第二可控电阻器，复位开关组件，可控电容器件和输出端。

6. 发明授权

US07936857B2 Phase selector for data transmitting device 有权
标题翻译：数据传输设备的相位选择器
公开(公告)号：US07936857B2
公开(公告)日：2011-05-03
申请号：US11737758
申请日：2007-04-20
申请人： Cheng-Chung Hsu
发明人： Cheng-Chung Hsu
IPC分类号： H04L7/00
CPC分类号： H04L7/0338
摘要： A phase selector is disclosed. The phase selector is utilized for outputting an output clock to a flip-flop according to an input data signal latched by the flip-flop. The phase selector includes: a clock phase adjustor, for adjusting the delay of an input clock to generate a first clock and a second clock, wherein the clock phases of the first clock and the second clock are different; a phase detector, for detecting phase relation between the input data signal and the first clock to generate a detecting signal; a decision circuit, coupled to the phase detector, for generating a selecting signal according to the detecting signal; and a selection circuit, coupled to the decision circuit, for selecting the input clock or the second clock to generate the output clock to the flip-flop according to the selecting signal.
摘要翻译：公开了一种相位选择器。相位选择器用于根据由触发器锁存的输入数据信号将输出时钟输出到触发器。相位选择器包括：时钟相位调节器，用于调整输入时钟的延迟以产生第一时钟和第二时钟，其中第一时钟和第二时钟的时钟相位是不同的; 相位检测器，用于检测输入数据信号和第一时钟之间的相位关系，以产生检测信号; 耦合到所述相位检测器的判定电路，用于根据所述检测信号产生选择信号; 以及耦合到判定电路的选择电路，用于根据选择信号选择输入时钟或第二时钟以向触发器产生输出时钟。

7. 发明申请

US20100306790A1 OPTICAL DISC DRIVE 失效
标题翻译：光盘驱动器
公开(公告)号：US20100306790A1
公开(公告)日：2010-12-02
申请号：US12546764
申请日：2009-08-25
申请人： Shih-Lin YEH , Cheng-Chung HSU , Ming-Ping Lai
发明人： Shih-Lin YEH , Cheng-Chung HSU , Ming-Ping Lai
IPC分类号： G11B33/06
CPC分类号： G11B33/122 , G11B7/08582 , G11B7/0933
摘要： An optical disc drive including a chassis, a circuit board and a traverse is provided. The traverse includes a carrier, a pick-up head module, a spindle motor module and a flexible flat cable. The carrier has an opening. The pick-up head module is movably disposed in the opening. The spindle motor module disposed on the carrier is located at one side of the pick-up head module. The flexible flat cable disposed in the opening has two connection ends respectively connected to the pick-up head module and the circuit board. The pick-up head module located at a first position enables the flexible flat cable to have a bending portion protruding towards a direction opposite to the position of the spindle motor module. The pick-up head module located at a second position extends the bending portion. The first position is closer to the spindle motor module than the second position is.
摘要翻译：提供了包括底盘，电路板和横动的光盘驱动器。横移包括载体，拾取头模块，主轴电机模块和柔性扁平电缆。承运人有一个开口。拾取头模块可移动地设置在开口中。设置在载体上的主轴电机模块位于拾取头模块的一侧。设置在开口中的柔性扁平电缆具有分别连接到拾取头模块和电路板的两个连接端。位于第一位置的拾取头模块使得柔性扁平电缆具有朝向与主轴电动机模块的位置相反的方向突出的弯曲部分。位于第二位置的拾取头模块延伸弯曲部分。第一个位置比第二个位置更靠近主轴电机模块。

8. 发明授权

US07830190B2 Data latch circuit with a phase selector 有权
标题翻译：具有相位选择器的数据锁存电路
公开(公告)号：US07830190B2
公开(公告)日：2010-11-09
申请号：US11861317
申请日：2007-09-26
申请人： Cheng-Chung Hsu
发明人： Cheng-Chung Hsu
IPC分类号： H03K3/356
CPC分类号： H03K5/135
摘要： The present invention provides a data latch circuit. The data latch circuit includes a first data latch unit, a second data latch unit, a third data latch unit, and a phase selector. The first data latch unit is used for latching a first input data according to a first clock signal and outputting a first output data. The second data latch unit is used for latching the first output data according to a second clock signal and outputting a second output data. The third data latch unit is used for latching the second output data according to a third clock signal and outputting an output data. The phase selector is coupled to the second data latch unit for generating the second clock signal to the second data latch unit according to phase relation between the first clock signal and the third clock signal.
摘要翻译：本发明提供一种数据锁存电路。数据锁存电路包括第一数据锁存单元，第二数据锁存单元，第三数据锁存单元和相位选择器。第一数据锁存单元用于根据第一时钟信号锁存第一输入数据并输出第一输出数据。第二数据锁存单元用于根据第二时钟信号锁存第一输出数据并输出第二输出数据。第三数据锁存单元用于根据第三时钟信号锁存第二输出数据并输出输出数据。相位选择器被耦合到第二数据锁存单元，用于根据第一时钟信号和第三时钟信号之间的相位关系向第二数据锁存单元产生第二时钟信号。

9. 发明授权

US07535390B2 Time-interleaved analog-to-digital converter and self-calibration method thereof 有权
标题翻译：时间交织的模数转换器及其自校准方法
公开(公告)号：US07535390B2
公开(公告)日：2009-05-19
申请号：US12017348
申请日：2008-01-22
申请人： Cheng-Chung Hsu
发明人： Cheng-Chung Hsu
IPC分类号： H03M1/06
CPC分类号： H03M1/1061 , H03M1/1215
摘要： The present invention discloses a time-interleaved analog-to-digital converter (ADC), which includes a first and a second sub-ADC and a calibration module. The calibration module includes a switch module and a calibration engine. The switch module selectively provides one of a set of reference voltage levels, which are provided by a resistor series of the first sub-ADC, onto an input signal line, which is shared by the first and the second sub-ADCs. The calibration engine calibrates pre-amplifying units of the first and the second sub-ADCs according to digital signals generated by the first and the second sub-ADCs.
摘要翻译：本发明公开了一种时间交织的模数转换器（ADC），其包括第一和第二子ADC和校准模块。校准模块包括开关模块和校准引擎。开关模块选择性地将由第一子ADC的电阻器系列提供的一组参考电压电平中的一个提供到由第一和第二子ADC共享的输入信号线上。校准引擎根据由第一和第二子ADC产生的数字信号校准第一和第二子ADC的预放大单元。

10. 发明申请

US20080024338A1 Calibration apparatus for mismatches of time-interleaved analog-to-digital converter 有权
标题翻译：时间交错模数转换器不匹配的校准装置
公开(公告)号：US20080024338A1
公开(公告)日：2008-01-31
申请号：US11701466
申请日：2007-02-02
申请人： Fong-Ching Huang , Cheng-Chung Hsu
发明人： Fong-Ching Huang , Cheng-Chung Hsu
IPC分类号： H03M1/10
CPC分类号： H03M1/1028 , H03M1/1215
摘要： A calibration device for calibrating an ADC comprising: an error estimator for estimating an error of a digital signal outputted from the ADC, the error estimator includes: a digital filter for filtering the digital signal to generate a filtered signal; and a least-mean-square module for performing a least-mean-square operation according to the filtered signal to generate an estimated error; and an error correction module for correcting the digital signal according to the estimated error.
摘要翻译：一种用于校准ADC的校准装置，包括：误差估计器，用于估计从ADC输出的数字信号的误差，误差估计器包括：数字滤波器，用于对数字信号进行滤波以产生滤波信号; 以及最小均方块，用于根据滤波信号进行最小均方运算以产生估计误差; 以及用于根据所估计的误差校正数字信号的纠错模块。

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