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1. 发明授权

US07793036B2 Method and arrangements for utilizing NAND memory 有权
标题翻译：利用NAND存储器的方法和布置
公开(公告)号：US07793036B2
公开(公告)日：2010-09-07
申请号：US11807694
申请日：2007-05-30
申请人： Chee How Goh , Eric Thian Aun Tan , Chai Huat Gan
发明人： Chee How Goh , Eric Thian Aun Tan , Chai Huat Gan
IPC分类号： G06F12/10
CPC分类号： G06F12/0875 , G06F12/0246 , G06F12/0292 , G06F2212/7201 , G06F2212/7203
摘要： A method of utilizing NAND type memory is disclosed herein. Operating system type instructions executable by a processor can be stored in a NAND based memory. The instructions can have logical addresses that can be utilized by the processor to fetch the operating system instructions. The method can store address conversions in the NAND based memory, where the address conversions can relate logical addresses to a physical address. At least one validity flag can be assigned to the address conversions. The processor can perform a direct read of the operating system instructions from the NAND based memory in response to a first setting of a validity flag and the processor can perform an indirect read of the operating system instructions by fetching an address conversion from the NAND based memory in response to a second setting of the at least one validity flag.
摘要翻译：这里公开了利用NAND型存储器的方法。可由处理器执行的操作系统类型指令可以存储在基于NAND的存储器中。指令可以具有可由处理器利用以获取操作系统指令的逻辑地址。该方法可以将地址转换存储在基于NAND的存储器中，其中地址转换可将逻辑地址与物理地址相关联。至少一个有效标志可以分配给地址转换。响应于有效标志的第一设置，处理器可以执行来自基于NAND的存储器的操作系统指令的直接读取，并且处理器可以通过从基于NAND的存储器获取地址转换来执行操作系统指令的间接读取响应于所述至少一个有效性标志的第二设置。

2. 发明授权

US07694049B2 Rate control of flow control updates 有权
标题翻译：流量控制更新的速率控制
公开(公告)号：US07694049B2
公开(公告)日：2010-04-06
申请号：US11321362
申请日：2005-12-28
申请人： Chee How Goh , Thian Aun Tan , Mikal C. Hunsaker
发明人： Chee How Goh , Thian Aun Tan , Mikal C. Hunsaker
IPC分类号： G06F13/00 , G06F12/00 , G06F1/00
CPC分类号： G06F1/3203 , G06F1/324 , Y02D10/126 , Y02D50/20
摘要： Various embodiments adjust the rate at which periodic flow control updates are transmitted when in a lower power or power saving state. One embodiment transmits flow control updates across a bus based upon a first rate in response to a normal power mode and transmits second flow control updates across the bus based upon a second rate in response to a power saving mode.
摘要翻译：各种实施例调节在处于较低功率或省电状态时周期性流量控制更新被传送的速率。一个实施例基于响应于正常功率模式的第一速率跨总线传输流量控制更新，并且基于响应于省电模式的第二速率跨总线发送第二流控制更新。

3. 发明申请

US20080301397A1 Method and arrangements for utilizing NAND memory 有权
标题翻译：利用NAND存储器的方法和布置
公开(公告)号：US20080301397A1
公开(公告)日：2008-12-04
申请号：US11807694
申请日：2007-05-30
申请人： Chee How Goh , Eric Thian Aun Tan , Chai Huat Gan
发明人： Chee How Goh , Eric Thian Aun Tan , Chai Huat Gan
IPC分类号： G06F12/00
CPC分类号： G06F12/0875 , G06F12/0246 , G06F12/0292 , G06F2212/7201 , G06F2212/7203
摘要： A method of utilizing NAND type memory is disclosed herein. Operating system type instructions executable by a processor can be stored in a NAND based memory. The instructions can have logical addresses that can be utilized by the processor to fetch the operating system instructions. The method can store address conversions in the NAND based memory, where the address conversions can relate logical addresses to a physical address. At least one validity flag can be assigned to the address conversions. The processor can perform a direct read of the operating system instructions from the NAND based memory in response to a first setting of a validity flag and the processor can perform an indirect read of the operating system instructions by fetching an address conversion from the NAND based memory in response to a second setting of the at least one validity flag.
摘要翻译：这里公开了利用NAND型存储器的方法。可由处理器执行的操作系统类型指令可以存储在基于NAND的存储器中。指令可以具有可由处理器利用以获取操作系统指令的逻辑地址。该方法可以将地址转换存储在基于NAND的存储器中，其中地址转换可将逻辑地址与物理地址相关联。至少一个有效标志可以分配给地址转换。响应于有效标志的第一设置，处理器可以执行来自基于NAND的存储器的操作系统指令的直接读取，并且处理器可以通过从基于NAND的存储器获取地址转换来执行操作系统指令的间接读取响应于所述至少一个有效性标志的第二设置。

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