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1. 发明授权

US07868676B2 Hybrid on-chip regulator for limited output high voltage 有权
标题翻译：用于有限输出高电压的混合片上稳压器
公开(公告)号：US07868676B2
公开(公告)日：2011-01-11
申请号：US12860449
申请日：2010-08-20
申请人： Yun-Hak Koh , Charles Qingle Wu
发明人： Yun-Hak Koh , Charles Qingle Wu
IPC分类号： H03K5/12
CPC分类号： G05F1/56
摘要： A driver circuit includes a pre-driver and an output driver. The pre-driver is coupled to receive an input signal and to generate first and second pre-driver output signals in response to the input signal. The output driver generates a driver output signal and includes first and second switches, a native mode transistor, and a driver output. The first switch has a first control terminal coupled to receive the first pre-driver output signal. The second switch has a second control terminal coupled to receive the second pre-driver output signal. The native mode transistor is coupled in series between the first switch and the second switch and has a third control terminal coupled to receive the voltage reference signal. The driver output is coupled between the native mode transistor and the second switch to output the driver output signal.
摘要翻译：驱动器电路包括预驱动器和输出驱动器。所述预驱动器被耦合以接收输入信号并且响应于所述输入信号产生第一和第二预驱动器输出信号。输出驱动器产生驱动器输出信号并且包括第一和第二开关，天线模式晶体管和驱动器输出。第一开关具有耦合以接收第一预驱动器输出信号的第一控制端。第二开关具有耦合以接收第二预驱动器输出信号的第二控制端。本体模式晶体管串联耦合在第一开关和第二开关之间，并具有耦合以接收电压参考信号的第三控制端。驱动器输出耦合在本体模式晶体管和第二开关之间以输出驱动器输出信号。

2. 发明申请

US20090180570A1 HYBRID ON-CHIP REGULATOR FOR LIMITED OUTPUT HIGH VOLTAGE 有权
标题翻译：用于有限输出高电压的混合型片内调节器
公开(公告)号：US20090180570A1
公开(公告)日：2009-07-16
申请号：US12014712
申请日：2008-01-15
申请人： Yun-Hak Koh , Charles Qingle Wu
发明人： Yun-Hak Koh , Charles Qingle Wu
IPC分类号： H04L27/00 , H03B1/00
CPC分类号： G05F1/56
摘要： A driver circuit provides fast settling times, slew rate control, and power efficiency, while reducing the need for large external capacitors. A voltage reference circuit generates a voltage reference signal. A comparator compares the voltage reference signal and a driver output signal and generates an output high voltage control signal. An output driver includes a first and a second switch that are coupled together. The first and second switches are further coupled to generate the driver output signal in response to coupling the output high voltage control signal to the control terminal of the first switch and coupling an input signal to the control terminal of the second switch.
摘要翻译：驱动电路提供快速建立时间，转换速率控制和功率效率，同时减少对大型外部电容器的需求。电压基准电路产生电压参考信号。比较器比较电压参考信号和驱动器输出信号，并产生输出高电压控制信号。输出驱动器包括耦合在一起的第一和第二开关。第一和第二开关还被耦合以响应于将输出高电压控制信号耦合到第一开关的控制端并将输入信号耦合到第二开关的控制端而产生驱动器输出信号。

3. 发明申请

US20120307122A1 LOW COMMON MODE DRIVER 有权
标题翻译：低通用模式驱动器
公开(公告)号：US20120307122A1
公开(公告)日：2012-12-06
申请号：US13154302
申请日：2011-06-06
申请人： Min Liu , Xin Wang , Charles Qingle Wu
发明人： Min Liu , Xin Wang , Charles Qingle Wu
IPC分类号： H04L25/49 , H04N3/10
CPC分类号： H03F3/45237 , G05F1/56 , H03F3/45654 , H03F2200/411 , H03F2200/453 , H03F2200/555 , H03F2203/45112 , H03F2203/45154 , H03F2203/45292 , H03F2203/45352 , H03F2203/45374 , H03F2203/45418 , H03K19/018528 , H04L25/0276
摘要： Techniques to provide a replica bias circuit for a high speed and low voltage common mode driver. In an embodiment, a pre-driver is coupled to provide driver input voltages to the driver, which driver includes a set of circuit elements coupled to provide, based on the driver input voltages, an output signal of a differential output. In another embodiment, a regulator circuit is coupled to provide regulated power to the pre-driver and driver, where the regulator circuit includes a scale replica circuit having a replica of the first set of circuit elements.
摘要翻译：为高速和低压共模驱动器提供复制偏置电路的技术。在一个实施例中，预驱动器被耦合以向驱动器提供驱动器输入电压，该驱动器包括一组电路元件，其被耦合以基于驱动器输入电压提供差分输出的输出信号。在另一个实施例中，调节器电路被耦合以向预驱动器和驱动器提供调节功率，其中调节器电路包括具有第一组电路元件的复制品的标度复制电路。

4. 发明授权

US07646220B2 Reduced voltage subLVDS receiver 有权
标题翻译：降低电压subLVDS接收机
公开(公告)号：US07646220B2
公开(公告)日：2010-01-12
申请号：US11904652
申请日：2007-09-27
申请人： Charles Qingle Wu
发明人： Charles Qingle Wu
IPC分类号： H03K19/0175 , H03K19/094 , H03K19/082
CPC分类号： H03F3/45708
摘要： A rail-to-rail high speed subLVDS receiver demonstrates good jitter and duty cycle performance for high-speed signals at low power supply levels. A sample receiver includes a voltage shifter for shifting the voltage levels of a differential input signal so that a shifted differential input signal is produced. The shifted differential input signal can be applied to a first differential pair, and the differential input signal can be applied to a second differential pair. The outputs of the first and second differential pairs can be summed together to produce a differential output signal. The differential output signal can be output using an output block. A clamp circuit can be used to adjust the gain of the first differential pair responsive to a common mode voltage of the first and second differential input signals.
摘要翻译：轨到轨高速subLVDS接收器在低电源电平下为高速信号显示出良好的抖动和占空比性能。采样接收机包括用于移位差分输入信号的电压电平的电压移位器，从而产生偏移的差分输入信号。移位的差分输入信号可以被施加到第一差分对，并且差分输入信号可以被施加到第二差分对。第一和第二差分对的输出可以相加在一起以产生差分输出信号。差分输出信号可以使用输出块输出。可以使用钳位电路来响应于第一和第二差分输入信号的共模电压来调节第一差分对的增益。

5. 发明授权

US07804345B2 Hybrid on-chip regulator for limited output high voltage 有权
标题翻译：用于有限输出高电压的混合片上稳压器
公开(公告)号：US07804345B2
公开(公告)日：2010-09-28
申请号：US12014712
申请日：2008-01-15
申请人： Yun-Hak Koh , Charles Qingle Wu
发明人： Yun-Hak Koh , Charles Qingle Wu
IPC分类号： H03K5/12
CPC分类号： G05F1/56
摘要： A driver circuit provides fast settling times, slew rate control, and power efficiency, while reducing the need for large external capacitors. A voltage reference circuit generates a voltage reference signal. A comparator compares the voltage reference signal and a driver output signal and generates an output high voltage control signal. An output driver includes a first and a second switch that are coupled together. The first and second switches are further coupled to generate the driver output signal in response to coupling the output high voltage control signal to the control terminal of the first switch and coupling an input signal to the control terminal of the second switch.
摘要翻译：驱动电路提供快速建立时间，转换速率控制和功率效率，同时减少对大型外部电容器的需求。电压基准电路产生电压参考信号。比较器比较电压参考信号和驱动器输出信号，并产生输出高电压控制信号。输出驱动器包括耦合在一起的第一和第二开关。第一和第二开关还被耦合以响应于将输出高电压控制信号耦合到第一开关的控制端并将输入信号耦合到第二开关的控制端而产生驱动器输出信号。

6. 发明授权

US07619448B2 Replica bias circuit for high speed low voltage common mode driver 有权
标题翻译：用于高速低压共模驱动器的复制偏置电路
公开(公告)号：US07619448B2
公开(公告)日：2009-11-17
申请号：US12002618
申请日：2007-12-17
申请人： Charles Qingle Wu , Yun-Hak Koh
发明人： Charles Qingle Wu , Yun-Hak Koh
IPC分类号： H03B1/00 , H03K19/094
CPC分类号： H03K19/018528 , H03F1/0205 , H03F3/45179 , H03F3/45632 , H03F2200/453 , H03F2200/513
摘要： A transmitter provides fast settling times, slew rate control, and power efficiency while reducing the need for large external capacitors. The transmitter typically includes a pre-driver, driver, and replica circuit. The pre-driver can shift the voltage level of an input signal to produce a shifted signal. The pre-driver can shift the voltage level in response to a selectable load resistance circuit and a voltage regulation feedback signal. The driver receives the shifted signal and generates a driver output signal in response to the received shifted signal. The replica circuit can be a scaled replica of the pre-driver and the driver using scaled components from the pre-driver and driver circuits. The scaled components can be used to generate the voltage regulation feedback signal. The generated voltage regulation feedback signal represents, for example, whether the output voltage of the driver output is above a reference voltage.
摘要翻译：发射机提供快速建立时间，转换速率控制和功率效率，同时减少对大型外部电容器的需求。发射机通常包括预驱动器，驱动器和复制电路。预驱动器可以移位输入信号的电压电平以产生移位信号。预驱动器可以响应于可选择的负载电阻电路和电压调节反馈信号来移位电压电平。驱动器接收移位的信号并响应于接收到的移位信号产生驱动器输出信号。复制电路可以是使用来自预驱动器和驱动器电路的缩放组件的预驱动器和驱动器的缩放复本。缩放的组件可用于产生电压调节反馈信号。所产生的电压调节反馈信号例如表示驱动器输出的输出电压是否高于参考电压。

7. 发明申请

US20090153219A1 Replica bias circuit for high speed low voltage common mode driver 有权
公开(公告)号：US20090153219A1
公开(公告)日：2009-06-18
申请号：US12002618
申请日：2007-12-17
申请人： Charles Qingle Wu , Yun-Hak Koh
发明人： Charles Qingle Wu , Yun-Hak Koh
IPC分类号： H03L5/00
CPC分类号： H03K19/018528 , H03F1/0205 , H03F3/45179 , H03F3/45632 , H03F2200/453 , H03F2200/513
摘要： A transmitter provides fast settling times, slew rate control, and power efficiency while reducing the need for large external capacitors. The transmitter typically includes a pre-driver, driver, and replica circuit. The pre-driver can shift the voltage level of an input signal to produce a shifted signal. The pre-driver can shift the voltage level in response to a selectable load resistance circuit and a voltage regulation feedback signal. The driver receives the shifted signal and generates a driver output signal in response to the received shifted signal. The replica circuit can be a scaled replica of the pre-driver and the driver using scaled components from the pre-driver and driver circuits. The scaled components can be used to generate the voltage regulation feedback signal. The generated voltage regulation feedback signal represents, for example, whether the output voltage of the driver output is above a reference voltage.

8. 发明授权

US08466982B2 Low common mode driver 有权
标题翻译：低共模驱动
公开(公告)号：US08466982B2
公开(公告)日：2013-06-18
申请号：US13154302
申请日：2011-06-06
申请人： Min Liu , Xin Wang , Charles Qingle Wu
发明人： Min Liu , Xin Wang , Charles Qingle Wu
IPC分类号： H04N5/228 , H03B1/00 , H03K3/00
CPC分类号： H03F3/45237 , G05F1/56 , H03F3/45654 , H03F2200/411 , H03F2200/453 , H03F2200/555 , H03F2203/45112 , H03F2203/45154 , H03F2203/45292 , H03F2203/45352 , H03F2203/45374 , H03F2203/45418 , H03K19/018528 , H04L25/0276
摘要： Techniques to provide a replica bias circuit for a high speed and low voltage common mode driver. In an embodiment, a pre-driver is coupled to provide driver input voltages to the driver, which driver includes a set of circuit elements coupled to provide, based on the driver input voltages, an output signal of a differential output. In another embodiment, a regulator circuit is coupled to provide regulated power to the pre-driver and driver, where the regulator circuit includes a scale replica circuit having a replica of the first set of circuit elements.
摘要翻译：为高速和低压共模驱动器提供复制偏置电路的技术。在一个实施例中，预驱动器被耦合以向驱动器提供驱动器输入电压，该驱动器包括一组电路元件，其被耦合以基于驱动器输入电压提供差分输出的输出信号。在另一个实施例中，调节器电路被耦合以向预驱动器和驱动器提供调节功率，其中调节器电路包括具有第一组电路元件的复制品的标度复制电路。

9. 发明申请

US20100315053A1 HYBRID ON-CHIP REGULATOR FOR LIMITED OUTPUT HIGH VOLTAGE 有权
标题翻译：用于有限输出高电压的混合型片内调节器
公开(公告)号：US20100315053A1
公开(公告)日：2010-12-16
申请号：US12860449
申请日：2010-08-20
申请人： Yun-Hak Koh , Charles Qingle Wu
发明人： Yun-Hak Koh , Charles Qingle Wu
IPC分类号： G05F1/10
CPC分类号： G05F1/56
摘要： A driver circuit includes a pre-driver and an output driver. The pre-driver is coupled to receive an input signal and to generate first and second pre-driver output signals in response to the input signal. The output driver generates a driver output signal and includes first and second switches, a native mode transistor, and a driver output. The first switch has a first control terminal coupled to receive the first pre-driver output signal. The second switch has a second control terminal coupled to receive the second pre-driver output signal. The native mode transistor is coupled in series between the first switch and the second switch and has a third control terminal coupled to receive the voltage reference signal. The driver output is coupled between the native mode transistor and the second switch to output the driver output signal.
摘要翻译：驱动器电路包括预驱动器和输出驱动器。所述预驱动器被耦合以接收输入信号并且响应于所述输入信号产生第一和第二预驱动器输出信号。输出驱动器产生驱动器输出信号并且包括第一和第二开关，天线模式晶体管和驱动器输出。第一开关具有耦合以接收第一预驱动器输出信号的第一控制端。第二开关具有耦合以接收第二预驱动器输出信号的第二控制端。本体模式晶体管串联耦合在第一开关和第二开关之间，并具有耦合以接收电压参考信号的第三控制端。驱动器输出耦合在本体模式晶体管和第二开关之间以输出驱动器输出信号。

10. 发明申请

US20090086857A1 Reduced voltage subLVDS receiver 有权
标题翻译：降低电压subLVDS接收机
公开(公告)号：US20090086857A1
公开(公告)日：2009-04-02
申请号：US11904652
申请日：2007-09-27
申请人： Charles Qingle Wu
发明人： Charles Qingle Wu
IPC分类号： H04B1/16 , H03F3/45
CPC分类号： H03F3/45708
摘要： A rail-to-rail high speed subLVDS receiver demonstrates good jitter and duty cycle performance for high-speed signals at low power supply levels. A sample receiver includes a voltage shifter for shifting the voltage levels of a differential input signal so that a shifted differential input signal is produced. The shifted differential input signal can be applied to a first differential pair, and the differential input signal can be applied to a second differential pair. The outputs of the first and second differential pairs can be summed together to produce a differential output signal. The differential output signal can be output using an output block. A clamp circuit can be used to adjust the gain of the first differential pair responsive to a common mode voltage of the first and second differential input signals.
摘要翻译：轨到轨高速subLVDS接收器在低电源电平下为高速信号显示出良好的抖动和占空比性能。采样接收机包括用于移位差分输入信号的电压电平的电压移位器，从而产生偏移的差分输入信号。移位的差分输入信号可以被施加到第一差分对，并且差分输入信号可以被施加到第二差分对。第一和第二差分对的输出可以相加在一起以产生差分输出信号。差分输出信号可以使用输出块输出。可以使用钳位电路来响应于第一和第二差分输入信号的共模电压来调节第一差分对的增益。

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