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    • 4. 发明授权
    • Units for analog signal processing
    • 用于模拟信号处理的单位
    • US08279020B2
    • 2012-10-02
    • US12795610
    • 2010-06-07
    • Ching-Kuang TzuangChao-Wei WangShian-Shun Wu
    • Ching-Kuang TzuangChao-Wei WangShian-Shun Wu
    • H01P1/22
    • H01P1/227H01P1/20345H03F3/19H03G1/0023H03G1/0029H03H7/25
    • The invention discloses the variable attenuator with characteristics, comprising wide attenuation ranges; syntheses on group delays, and low variation of the group delay. The building blocks, which construct the variable attenuator, comprise internal matching networks, external matching networks, delay networks, protecting networks, biasing network, a power combining network, and variable impedance networks. The elements, which realize the internal matching networks, external matching networks, signal combining networks, comprise resistor, inductor, capacitor, and transmission lines. The elements, which realize the variable impedance networks, comprise n-channel field-effect transistor (FET), p-channel FET, n-type bipolar junction transistor (BJT), and p-type BJT. The elements of the variable attenuator can be either integrated on a semiconductor chip by using system-on-chip (SOC) technologies. The building blocks of the variable attenuator can be realized on different substrates and integrated in a module by using multi-chip module (MCM) technologies.
    • 本发明公开了具有广泛衰减范围的特征的可变衰减器; 对群延迟进行合成,群延迟变化较小。 构建可变衰减器的构建块包括内部匹配网络,外部匹配网络,延迟网络,保护网络,偏置网络,功率组合网络和可变阻抗网络。 实现内部匹配网络,外部匹配网络,信号组合网络的元件包括电阻器,电感器,电容器和传输线。 实现可变阻抗网络的元件包括n沟道场效应晶体管(FET),p沟道FET,n型双极结型晶体管(BJT)和p型BJT。 可变衰减器的元件可以通过使用片上系统(SOC)技术集成在半导体芯片上。 可变衰减器的构建块可以在不同的基板上实现,并通过使用多芯片模块(MCM)技术集成到模块中。
    • 5. 发明申请
    • Units for Analog Signal Processing
    • 模拟信号处理单位
    • US20110298569A1
    • 2011-12-08
    • US12795610
    • 2010-06-07
    • Ching-Kuang TzuangChao-Wei WangShian-Shun Wu
    • Ching-Kuang TzuangChao-Wei WangShian-Shun Wu
    • H01P1/22
    • H01P1/227H01P1/20345H03F3/19H03G1/0023H03G1/0029H03H7/25
    • The invention discloses the variable attenuator with characteristics, comprising wide attenuation ranges; syntheses on group delays, and low variation of the group delay. The building blocks, which construct the variable attenuator, comprise internal matching networks, external matching networks, delay networks, protecting networks, biasing network, a power combining network, and variable impedance networks. The elements, which realize the internal matching networks, external matching networks, signal combining networks, comprise resistor, inductor, capacitor, and transmission lines. The elements, which realize the variable impedance networks, comprise n-channel field-effect transistor (FET), p-channel FET, n-type bipolar junction transistor (BJT), and p-type BJT. The elements of the variable attenuator can be either integrated on a semiconductor chip by using system-on-chip (SOC) technologies. The building blocks of the variable attenuator can be realized on different substrates and integrated in a module by using multi-chip module (MCM) technologies.
    • 本发明公开了具有广泛衰减范围的特征的可变衰减器; 对群延迟进行合成,群延迟变化较小。 构建可变衰减器的构建块包括内部匹配网络,外部匹配网络,延迟网络,保护网络,偏置网络,功率组合网络和可变阻抗网络。 实现内部匹配网络,外部匹配网络,信号组合网络的元件包括电阻器,电感器,电容器和传输线。 实现可变阻抗网络的元件包括n沟道场效应晶体管(FET),p沟道FET,n型双极结型晶体管(BJT)和p型BJT。 可变衰减器的元件可以通过使用片上系统(SOC)技术集成在半导体芯片上。 可变衰减器的构建块可以在不同的基板上实现,并通过使用多芯片模块(MCM)技术集成到模块中。