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1. 发明申请

US20140048927A1 METHOD TO IMPROVE FINE CU LINE RELIABILITY IN AN INTEGRATED CIRCUIT DEVICE 有权
标题翻译：在集成电路设备中提高精细线路可靠性的方法
公开(公告)号：US20140048927A1
公开(公告)日：2014-02-20
申请号：US13587998
申请日：2012-08-17
申请人： Chad M. Burke , Baozhen Li , Keith Kwong Hon Wong , Chih-Chao Yang
发明人： Chad M. Burke , Baozhen Li , Keith Kwong Hon Wong , Chih-Chao Yang
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L21/76847 , H01L21/76838 , H01L21/76843 , H01L21/76844 , H01L21/76877 , H01L23/5226 , H01L23/528 , H01L23/5283 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Structure and methods for forming a semiconductor structure. The semiconductor structure includes a plurality of layers comprising at least one copper interconnect layer. The copper interconnect layer provides an electrical conduit between one of physically adjacent layers in the semiconductor structure and an integrated circuit in the semiconductor structure and an electronic device. A plurality of studs is positioned within the at least one copper interconnect layer. The studs are spaced apart by a distance less than or equal to a Blech length of the at least one copper interconnect layer. The Blech length is a length below which damage due to electromigration of metal atoms within the at least one copper interconnect layer does not occur. The plurality of studs comprises copper atom diffusion barriers.
摘要翻译：用于形成半导体结构的结构和方法。半导体结构包括包括至少一个铜互连层的多个层。铜互连层在半导体结构中的物理相邻层之一和半导体结构中的集成电路和电子器件之间提供电导体。多个螺柱被定位在所述至少一个铜互连层内。螺栓间隔开小于或等于至少一个铜互连层的Blech长度的距离。漂浮长度是低于该值的长度，在该长度之下不会发生由于至少一个铜互连层内的金属原子的电迁移而导致的损伤。多个螺柱包括铜原子扩散阻挡层。

2. 发明授权

US09224640B2 Method to improve fine Cu line reliability in an integrated circuit device 有权
标题翻译：提高集成电路器件中Cu线可靠性的方法
公开(公告)号：US09224640B2
公开(公告)日：2015-12-29
申请号：US13587998
申请日：2012-08-17
申请人： Chad M. Burke , Baozhen Li , Keith Kwong Hon Wong , Chih-Chao Yang
发明人： Chad M. Burke , Baozhen Li , Keith Kwong Hon Wong , Chih-Chao Yang
IPC分类号： H01L21/768 , H01L23/532 , H01L23/528 , H01L23/522
CPC分类号： H01L21/76847 , H01L21/76838 , H01L21/76843 , H01L21/76844 , H01L21/76877 , H01L23/5226 , H01L23/528 , H01L23/5283 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Structure and methods for forming a semiconductor structure. The semiconductor structure includes a plurality of layers comprising at least one copper interconnect layer. The copper interconnect layer provides an electrical conduit between one of physically adjacent layers in the semiconductor structure and an integrated circuit in the semiconductor structure and an electronic device. A plurality of studs is positioned within the at least one copper interconnect layer. The studs are spaced apart by a distance less than or equal to a Blech length of the at least one copper interconnect layer. The Blech length is a length below which damage due to electromigration of metal atoms within the at least one copper interconnect layer does not occur. The plurality of studs comprises copper atom diffusion barriers.
摘要翻译：用于形成半导体结构的结构和方法。半导体结构包括包括至少一个铜互连层的多个层。铜互连层在半导体结构中的物理相邻层之一和半导体结构中的集成电路和电子器件之间提供电导体。多个螺柱被定位在所述至少一个铜互连层内。螺栓间隔开小于或等于至少一个铜互连层的Blech长度的距离。漂浮长度是低于该值的长度，在该长度之下不会发生由于至少一个铜互连层内的金属原子的电迁移而导致的损伤。多个螺柱包括铜原子扩散阻挡层。

3. 发明授权

US08232809B2 Determining critical current density for interconnect 失效
标题翻译：确定互连的临界电流密度
公开(公告)号：US08232809B2
公开(公告)日：2012-07-31
申请号：US12620955
申请日：2009-11-18
申请人： Chad M. Burke , Cathryn J. Christiansen , Baozhen Li
发明人： Chad M. Burke , Cathryn J. Christiansen , Baozhen Li
IPC分类号： G01R31/02 , G01R31/26
CPC分类号： G01R31/2858
摘要： Solutions for determining a critical current density of a line are disclosed. In one embodiment a method of determining a critical current density in a line includes: applying a temperature condition to each of a plurality of samples including the line; calculating a cross-sectional area of the line for each of the plurality samples using data about an electrical resistance of the line over each of the temperature conditions; measuring an electrical current reading through the line for each of the plurality of samples; determining a current density through the line for each of the plurality of samples by dividing each electrical current reading by each corresponding cross-sectional area; determining an electromigration (EM) failure time for each of the plurality of samples; and determining the critical current density of the line using the current density and the plurality of EM failure times.
摘要翻译：公开了用于确定线的临界电流密度的解决方案。在一个实施例中，确定线路中的临界电流密度的方法包括：将温度条件应用于包括线路的多个样本中的每一个; 使用关于在每个温度条件下的线的电阻的数据来计算多个样本中的每个样本的线的横截面面积; 测量所述多个样本中的每一个的所述线的电流读数; 通过将每个电流读数除以每个对应的横截面积来确定通过所述多个样品中的每一个的所述线的电流密度; 确定所述多个样本中的每一个的电迁移（EM）故障时间; 以及使用电流密度和多个EM故障时间确定线路的临界电流密度。

4. 发明申请

US20110115508A1 DETERMINING CRITICAL CURRENT DENSITY FOR INTERCONNECT 失效
标题翻译：确定互连的关键电流密度
公开(公告)号：US20110115508A1
公开(公告)日：2011-05-19
申请号：US12620955
申请日：2009-11-18
申请人： Chad M. Burke , Cathryn J. Christiansen , Baozhen Li
发明人： Chad M. Burke , Cathryn J. Christiansen , Baozhen Li
IPC分类号： G01R31/02
CPC分类号： G01R31/2858
摘要： Solutions for determining a critical current density of a line are disclosed. In one embodiment a method of determining a critical current density in a line includes: applying a temperature condition to each of a plurality of samples including the line; calculating a cross-sectional area of the line for each of the plurality samples using data about an electrical resistance of the line over each of the temperature conditions; measuring an electrical current reading through the line for each of the plurality of samples; determining a current density through the line for each of the plurality of samples by dividing each electrical current reading by each corresponding cross-sectional area; determining an electromigration (EM) failure time for each of the plurality of samples; and determining the critical current density of the line using the current density and the plurality of EM failure times.
摘要翻译：公开了用于确定线的临界电流密度的解决方案。在一个实施例中，确定线中的临界电流密度的方法包括：对包括线的多个样本中的每一个施加温度条件; 使用关于在每个温度条件下的线的电阻的数据来计算多个样本中的每个样本的线的横截面面积; 测量所述多个样本中的每一个的所述线的电流读数; 通过将每个电流读数除以每个对应的横截面积来确定通过所述多个样品中的每一个的所述线的电流密度; 确定所述多个样本中的每一个的电迁移（EM）故障时间; 以及使用电流密度和多个EM故障时间确定线路的临界电流密度。

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