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1. 发明授权

US09716196B2 Self-bypass diode function for gallium arsenide photovoltaic devices 有权
公开(公告)号：US09716196B2
公开(公告)日：2017-07-25
申请号：US13023733
申请日：2011-02-09
申请人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
发明人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
IPC分类号： H01L31/0304 , H01L27/142 , H01L31/0735 , H01L31/0443
CPC分类号： H01L31/03046 , H01L27/142 , H01L31/0304 , H01L31/0443 , H01L31/0735 , Y02E10/544 , Y02P70/521
摘要： Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect.

2. 发明申请

US20120103406A1 METALLIC CONTACTS FOR PHOTOVOLTAIC DEVICES AND LOW TEMPERATURE FABRICATION PROCESSES THEREOF 审中-公开
标题翻译：用于光伏器件的金属接触及其低温制造工艺
公开(公告)号：US20120103406A1
公开(公告)日：2012-05-03
申请号：US12939050
申请日：2010-11-03
申请人： Brendan M. KAYES , Isik C. KIZILYALLI , Hui NIE , Melissa J. ARCHER
发明人： Brendan M. KAYES , Isik C. KIZILYALLI , Hui NIE , Melissa J. ARCHER
IPC分类号： H01L31/0216 , H01L31/18 , H01L31/0304
CPC分类号： H01L31/022425 , H01L31/022441 , H01L31/0735 , H01L31/1892 , Y02E10/544
摘要： Embodiments of the invention generally relate to photovoltaic devices and more specifically, to the metallic contacts disposed on photovoltaic devices, such as photovoltaic cells, and to the fabrication processes for forming such metallic contacts. The metallic contacts contain a palladium germanium alloy formed at low temperatures during an anneal process. In some embodiments, the photovoltaic cell may be heated to a temperature within a range from about 20° C. to about 275° C. during the anneal process, for example, at about 150° C. for about 30 minutes. In other embodiments, the photovoltaic cell may be heated to a temperature within a range from about 150° C. to about 275° C. for a time period of at least about 0.5 minutes during the anneal process.
摘要翻译：本发明的实施例一般涉及光伏器件，更具体地说，涉及设置在诸如光伏电池的光伏器件上的金属触点，以及用于形成这种金属触点的制造工艺。金属触点含有在退火过程中在低温下形成的钯锗合金。在一些实施方案中，在退火过程期间，例如在约150℃下，光伏电池可以被加热至约20℃至约275℃范围内的温度约30分钟。在其它实施例中，在退火过程中，光伏电池可以被加热至约150℃至约275℃的温度至少约0.5分钟的时间。

3. 发明申请

US20120199184A1 SELF-BYPASS DIODE FUNCTION FOR GALLIUM ARSENIDE PHOTOVOLTAIC DEVICES 有权
标题翻译：自对偶二极管功能用于阿拉伯光伏器件
公开(公告)号：US20120199184A1
公开(公告)日：2012-08-09
申请号：US13023733
申请日：2011-02-09
申请人： Hui NIE , Brendan M. Kayes , Isik C. Kizilyalli
发明人： Hui NIE , Brendan M. Kayes , Isik C. Kizilyalli
IPC分类号： H01L31/06 , H01L31/0352
CPC分类号： H01L31/03046 , H01L27/142 , H01L31/0304 , H01L31/0443 , H01L31/0735 , Y02E10/544 , Y02P70/521
摘要： Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect.
摘要翻译：本发明的实施例一般涉及光伏器件。在一个实施例中，一种用于形成基于砷化镓的光电器件的方法包括提供半导体结构，该结构包括包含砷化镓的吸收层。在半导体结构的p-n结中提供旁路功能，其中在反向偏压条件下，p-n结以受齐次性的齐纳击穿效应而分解。

4. 发明申请

US20090020853A1 STRUCTURES OF AND METHODS FOR FORMING VERTICALLY ALIGNED Si WIRE ARRAYS 有权
标题翻译：形成垂直对准Si线阵列的结构和方法
公开(公告)号：US20090020853A1
公开(公告)日：2009-01-22
申请号：US12176099
申请日：2008-07-18
申请人： Brendan M. KAYES , Michael A. Filler , Nathan S. Lewis , Harry A. Atwater
发明人： Brendan M. KAYES , Michael A. Filler , Nathan S. Lewis , Harry A. Atwater
IPC分类号： H01L21/20 , H01L29/06
CPC分类号： H01L31/1804 , B82Y30/00 , H01L21/02381 , H01L21/02532 , H01L21/02603 , H01L21/0262 , H01L21/02639 , H01L21/02645 , H01L21/02653 , H01L27/1446 , H01L31/035272 , H01L31/04 , Y02E10/547 , Y02P70/521
摘要： A structure consisting of vertically aligned wire arrays on a Si substrate and a method for producing such wire arrays. The wire arrays are fabricated and positioned on a substrate with an orientation and density particularly adapted for conversion of received light to energy. A patterned oxide layer is used to provide for wire arrays that exhibit narrow diameter and length distribution and provide for controlled wire position.
摘要翻译：由Si衬底上的垂直排列的线阵列组成的结构和用于制造这种线阵列的方法。线阵列被制造并定位在具有特别适于将接收的光转换成能量的取向和密度的基底上。图案化氧化物层用于提供呈现窄直径和长度分布并提供受控导线位置的线阵列。

5. 发明授权

US09136418B2 Optoelectronic devices including heterojunction and intermediate layer 有权
标题翻译：包括异质结和中间层的光电器件
公开(公告)号：US09136418B2
公开(公告)日：2015-09-15
申请号：US13451455
申请日：2012-04-19
申请人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
发明人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
IPC分类号： H01L21/04 , H01L31/0735 , H01L31/0224 , H01L31/18
CPC分类号： H01L31/0735 , H01L31/022441 , H01L31/1896 , Y02E10/52 , Y02E10/544
摘要： Embodiments generally relate to optoelectronic semiconductor devices such as solar cells. In one aspect, a device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device and is made of a different material and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. An intermediate layer is located between the absorber layer and the emitter layer and provides the offset of the p-n junction from the heterojunction, and includes a graded layer and an ungraded back window layer.
摘要翻译：实施例通常涉及诸如太阳能电池的光电半导体器件。在一个方面，器件包括由砷化镓（GaAs）制成并且仅具有一种掺杂类型的吸收层。发射极层位于比器件的背面靠近吸收体层，并且由不同的材料制成并具有比吸收层更高的带隙。在发射极层和吸收层之间形成异质结，并且在偏离异质结的位置处，在发射极层和吸收层之间形成p-n结，并且至少部分地在不同的材料内形成p-n结。中间层位于吸收层和发射极层之间，并且提供p-n结与异质结的偏移，并且包括渐变层和未分级的后窗层。

6. 发明授权

US09136417B2 Methods for forming optoelectronic devices including heterojunction 有权
公开(公告)号：US09136417B2
公开(公告)日：2015-09-15
申请号：US13451439
申请日：2012-04-19
申请人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
发明人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
IPC分类号： H01L31/0304 , H01L31/0735 , H01L31/0224 , H01L31/18
摘要： Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side.

7. 发明申请

US20130270589A1 OPTOELECTRONIC DEVICE WITH NON-CONTINUOUS BACK CONTACTS 审中-公开
标题翻译：具有非连续反向接触的光电器件
公开(公告)号：US20130270589A1
公开(公告)日：2013-10-17
申请号：US13446876
申请日：2012-04-13
申请人： Brendan M. KAYES , Sylvia SPRYUTTE , I-Kang DING , Rose TWIST , Gregg HIGASHI
发明人： Brendan M. KAYES , Sylvia SPRYUTTE , I-Kang DING , Rose TWIST , Gregg HIGASHI
IPC分类号： H01L33/10 , H01L31/0304 , H01L31/0232 , H01L33/22
CPC分类号： H01L31/056 , H01L31/02167 , H01L31/02168 , H01L31/022425 , H01L31/02363 , H01L31/0684 , H01L31/0725 , H01L31/0735 , H01L33/38 , H01L33/52 , Y02E10/52 , Y02E10/547
摘要： An optoelectronic device is disclosed. The optoelectronic device comprises a semiconductor structure; a plurality of contacts on the front side of the semiconductor structure; and a plurality of non-continuous metal contacts on a back side of the semiconductor structure. In an embodiment, a plurality of non-continuous back contacts on an optoelectronic device improve the reflectivity and reduce the losses associated with the back surface of the device.
摘要翻译：公开了一种光电子器件。该光电器件包括半导体结构; 在半导体结构的正面上的多个触点; 以及在半导体结构的背侧上的多个非连续金属触点。在一个实施例中，光电子器件上的多个非连续背接触提高了反射率并减少了与器件背面相关的损耗。

8. 发明授权

US08530338B2 Structures of and methods for forming vertically aligned Si wire arrays 有权
标题翻译：用于形成垂直排列的Si线阵列的结构和方法
公开(公告)号：US08530338B2
公开(公告)日：2013-09-10
申请号：US12176099
申请日：2008-07-18
申请人： Brendan M. Kayes , Michael A. Filler , Nathan S. Lewis , Harry A. Atwater
发明人： Brendan M. Kayes , Michael A. Filler , Nathan S. Lewis , Harry A. Atwater
IPC分类号： H01L29/72
CPC分类号： H01L31/1804 , B82Y30/00 , H01L21/02381 , H01L21/02532 , H01L21/02603 , H01L21/0262 , H01L21/02639 , H01L21/02645 , H01L21/02653 , H01L27/1446 , H01L31/035272 , H01L31/04 , Y02E10/547 , Y02P70/521
摘要： A structure consisting of vertically aligned wire arrays on a Si substrate and a method for producing such wire arrays. The wire arrays are fabricated and positioned on a substrate with an orientation and density particularly adapted for conversion of received light to energy. A patterned oxide layer is used to provide for wire arrays that exhibit narrow diameter and length distribution and provide for controlled wire position.
摘要翻译：由Si衬底上的垂直排列的线阵列组成的结构和用于制造这种线阵列的方法。线阵列被制造并定位在具有特别适于将接收的光转换成能量的取向和密度的基底上。图案化氧化物层用于提供呈现窄直径和长度分布并提供受控导线位置的线阵列。

9. 发明申请

US20120252159A1 METHODS FOR FORMING OPTOELECTRONIC DEVICES INCLUDING HETEROJUNCTION 有权
标题翻译：用于形成包括异位的光电器件的方法
公开(公告)号：US20120252159A1
公开(公告)日：2012-10-04
申请号：US13451439
申请日：2012-04-19
申请人： Hui NIE , Brendan M. KAYES , Isik C. KIZILYALLI
发明人： Hui NIE , Brendan M. KAYES , Isik C. KIZILYALLI
IPC分类号： H01L31/0304
CPC分类号： H01L31/0735 , H01L31/022441 , H01L31/1896 , Y02E10/52 , Y02E10/544
摘要： Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side.
摘要翻译：实施例通常涉及诸如光伏电池的光电半导体器件。一方面，用于形成器件的方法包括形成由砷化镓（GaAs）制成并具有一种类型的掺杂的吸收层，并形成由不同材料制成并具有比吸收层更高的带隙的发射极层。可以在发射极和吸收层之间形成中间层。在发射极层和吸收层之间形成异质结和p-n结，其中在与异质结偏离的位置处至少部分地在不同的材料内形成p-n结。吸收层的大部分可以在由p-n结形成的耗尽区的外部。 p-n结导致电池响应于电池暴露于正面的光而产生电压。

10. 发明授权

US09178099B2 Methods for forming optoelectronic devices including heterojunction 有权
标题翻译：用于形成包括异质结的光电器件的方法
公开(公告)号：US09178099B2
公开(公告)日：2015-11-03
申请号：US13451439
申请日：2012-04-19
申请人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
发明人： Hui Nie , Brendan M. Kayes , Isik C. Kizilyalli
IPC分类号： H01L31/0304 , H01L31/0735 , H01L31/0224 , H01L31/18
CPC分类号： H01L31/0735 , H01L31/022441 , H01L31/1896 , Y02E10/52 , Y02E10/544
摘要： Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side.
摘要翻译：实施例通常涉及诸如光伏电池的光电半导体器件。一方面，用于形成器件的方法包括形成由砷化镓（GaAs）制成并具有一种类型的掺杂的吸收层，并形成由不同材料制成并具有比吸收层更高的带隙的发射极层。可以在发射极和吸收层之间形成中间层。在发射极层和吸收层之间形成异质结和p-n结，其中在与异质结偏离的位置处至少部分地在不同的材料内形成p-n结。吸收层的大部分可以在由p-n结形成的耗尽区的外部。 p-n结导致电池响应于电池暴露于正面的光而产生电压。

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