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1. 发明授权

US07158426B2 Method for testing an integrated semiconductor memory 有权
标题翻译：用于测试集成半导体存储器的方法
公开(公告)号：US07158426B2
公开(公告)日：2007-01-02
申请号：US11121175
申请日：2005-05-04
申请人： Koen van der Zanden , Manfred Pröll , Jörg Kliewer , Björn Wirker
发明人： Koen van der Zanden , Manfred Pröll , Jörg Kliewer , Björn Wirker
IPC分类号： G11C7/00 , G11C8/00
CPC分类号： G11C29/50 , G11C11/401 , G11C29/12015 , G11C29/50012 , G11C2029/1204 , G11C2029/2602
摘要： An integrated semiconductor memory can be operated in a normal operating state synchronously with a control clock. In the test operating state, the integrated semiconductor memory is driven synchronously with a clock edge of the control clock with a first control signal and starts a test run independent of the control clock. Driving with the first control signal, selection transistors in a memory bank that can be selected by a memory bank address are turned off. Afterward, bit lines in the selected memory bank are interconnected and driven with a predetermined precharge potential. After a precharge time has elapsed, one of the word lines is selected by an applied word line address and the selection transistors in the selected memory bank connected to the selected word line are turned on. Precharge times are set and tested independently of the clock period of the control clock.
摘要翻译：集成半导体存储器可以在与控制时钟同步的正常操作状态下操作。在测试操作状态下，集成半导体存储器与第一控制信号的控制时钟的时钟边沿同步地驱动，并独立于控制时钟启动测试运行。利用第一控制信号驱动，可以由存储体地址选择的存储体中的选择晶体管截止。之后，所选择的存储体中的位线被互连并以预定的预充电势驱动。在预充电时间过去之后，通过应用的字线地址选择一个字线，并且连接到所选字线的所选存储体中的选择晶体管导通。独立于控制时钟的时钟周期设置和测试预充电时间。

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