会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Circuit and method for rapid reading of an image cell
    • 用于快速读取图像单元的电路和方法
    • US06665011B1
    • 2003-12-16
    • US09147945
    • 1999-06-08
    • Ulrich SegerUwe ApelBernd HofflingerHeinz-Gerd Graf
    • Ulrich SegerUwe ApelBernd HofflingerHeinz-Gerd Graf
    • H04N5335
    • H04N9/045H04N5/374
    • A circuitry for high-speed reading of a video cell for a video pickup chip including a plurality of such video cells disposed in the form of a two-dimensional array, and a read-out logic designed for imaging a high input signal dynamic volume onto a reduced output signal dynamic volume, wherein the photosensitive element of the video cell is connected to the first main electrode of a first MOS transistor (M0) and to the gate of a second MOS transistor (M1) such that the gate and the other main electrode of the first MOS transistor (M0) are short-circuited and applied to an invariable potential (Vpp) so as to achieve a logarithmic characteristic line, and that an output signal amplifier is connected to the second main electrode of the second MOS transistor (M1). Moreover, a method of high speed reading of this video cell is described. The invention excels itself by the provision that a further MOS transistor (Mr1) of the same charge carrier type, which is connected in parallel with the first MOS transistor (M0), is provided and has a main electrode short-circuited to the first main electrode of the first MOS transistor (M0), and that a reset voltage pulse is applicable to the gate electrode of this further MOS transistor (Mr1).
    • 一种用于高速读取用于视频拾取芯片的视频单元的电路,包括以二维阵列的形式设置的多个这样的视频单元,以及设计用于将高输入信号动态体积成像到 减小的输出信号动态音量,其中视频单元的感光元件连接到第一MOS晶体管(M0)的第一主电极并连接到第二MOS晶体管(M1)的栅极,使得栅极和另一个主体 第一MOS晶体管(M0)的电极短路并施加到不变电位(Vpp),以实现对数特性线,并且输出信号放大器连接到第二MOS晶体管的第二主电极( M1)。 此外,描述了该视频单元的高速读取的方法。 本发明的优点在于提供了与第一MOS晶体管(M0)并联连接的另一个同样的载流子型的MOS晶体管(Mr1),并且具有与第一主体短路的主电极 第一MOS晶体管(M0)的电极,并且复位电压脉冲可应用于该另一MOS晶体管(Mr1)的栅电极。
    • 2. 发明授权
    • Integrated circuit
    • 集成电路
    • US5635753A
    • 1997-06-03
    • US256237
    • 1994-09-02
    • Bernd HofflingerVolker Dudek
    • Bernd HofflingerVolker Dudek
    • H01L21/762H01L21/761H01L21/822H01L21/8234H01L27/04H01L27/088H01L27/092H01L29/04
    • H01L27/0922H01L2924/0002
    • Disclosed is an integrated circuit having at least two active components, such as transistors, having the following features:a highly conductive substrate is provided which is connected to one pole of a voltage supply source,a semiconductor layer, which is electrically isolated from the substrate and divided into individual sections by lateral isolation regions, is disposed on a main surface of the substrate,placed in each section is at least one active component, e.g., a transistor of any type performance, andlateral deep diffusion regions which are accommodated in the semiconductor layer create a conductive connection between the highly conductive substrate and the corresponding regions of the active components.
    • PCT No.PCT / DE92 / 01090 Sec。 371日期:1994年9月2日 102(e)日期1994年9月2日PCT提交1992年12月30日PCT公布。 第WO93 / 13547号公报 日期:1993年7月8日公开是具有至少两个有源元件(例如晶体管)的集成电路,其具有以下特征:提供高导电性基板,其连接到电压源的一个极,半导体层 与衬底电隔离并通过横向隔离区域分隔成单个部分,设置在衬底的主表面上,放置在每个部分中的是至少一个有源部件,例如任何类型性能的晶体管,以及横向深扩散区域 其被容纳在半导体层中,在高导电性基板与有源部件的相应区域之间形成导电连接。