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1. 发明授权

US4084228A Process management structures and hardware/firmware control 失效
标题翻译：过程管理结构和硬件/固件控制
公开(公告)号：US4084228A
公开(公告)日：1978-04-11
申请号：US529012
申请日：1974-12-02
申请人： Patrick Dufond , Jean-Claude Cassonnet , Jean-Louis Bogaert , Philippe-Hubert DE Rivet , John J. Bradley , Benjamin S. Franklin
发明人： Patrick Dufond , Jean-Claude Cassonnet , Jean-Louis Bogaert , Philippe-Hubert DE Rivet , John J. Bradley , Benjamin S. Franklin
IPC分类号： G06F9/48 , G06F15/16 , G06F9/18
CPC分类号： G06F9/4881
摘要： A system and method for computer process dispatching in a multiprogramming/multiprocessing environment is disclosed. Each process in the multiprogramming/multiprocessing computer system may be in one of four states at any given time as follows:1. Running -- the process is in control of the computer system and is directing the operation of the central processing unit (CPU);2. ready -- the process is ready to run as soon as it is given control of the CPU;3. waiting -- the process is waiting for an external event to occur so it can either resume running or enter the ready state;4. Suspended -- the process has been temporarily stopped (from a source external to the process).The dispatcher is a firmware/hardware structure that controls the first three states of the process--i.e. running, ready and waiting states.

2. 发明授权

US4024508A Database instruction find serial 失效
标题翻译：数据库指令查找序列号
公开(公告)号：US4024508A
公开(公告)日：1977-05-17
申请号：US588435
申请日：1975-06-19
申请人： Charles W. Bachman , Benjamin S. Franklin
发明人： Charles W. Bachman , Benjamin S. Franklin
IPC分类号： G06F9/30 , G06F17/30 , G06F9/20 , G06F9/16 , G06F13/00
CPC分类号： G06F17/30958 , Y10S707/99931
摘要： One of a series of hardware/firmware primitives is disclosed for converting a general purpose digital computer into a database machine. The invention comprises a hardware/firmware implemented machine instruction which sequentially checks each database record in a database area beginning at the page/line number address (database address) contained in a register, until the next active record is located. The database address of that active record is then loaded into a register.
摘要翻译：公开了一系列硬件/固件原语之一，用于将通用数字计算机转换成数据库机。本发明包括一个硬件/固件实现的机器指令，其顺序地检查从包含在寄存器中的页/行号地址（数据库地址）开始的数据库区域中的每个数据库记录，直到下一个活动记录被定位。然后将该活动记录的数据库地址加载到一个寄存器中。

3. 发明授权

US4432051A Process execution time accounting system 失效
标题翻译：流程执行时间计帐系统
公开(公告)号：US4432051A
公开(公告)日：1984-02-14
申请号：US202423
申请日：1980-10-30
申请人： Jean-Louis Bogaert , Philippe-Hubert deRivet , Benjamin S. Franklin
发明人： Jean-Louis Bogaert , Philippe-Hubert deRivet , Benjamin S. Franklin
IPC分类号： G06F9/46 , G06F9/48 , G06F3/00 , G06F9/22
CPC分类号： G06F9/4843 , G06F9/52
摘要： A time accounting system for accounting for the time a process spends in a ready state, a wait state, or a running state. The system includes a time-of-day clock coupled to a central processing unit for outputting the time-of-day whenever a process changes state. A memory also coupled to the central processing unit stores the contents of a plurality of addressable process control blocks and each process control block includes first, second, and third storage locations for storing indications of the amount of time an associated process has been in the running, ready, and wait states, respectively. The central processor unit accesses the process control blocks and updates the process times stored therein in accordance with control signals generated by decoding a string of microinstructions stored in a control store memory. The time-of-day clock is accessed each time a process enters one of the running, ready, or wait states and each time the execution of a process is completed. The process control blocks are accessed and updated with the differences in the access times of the time-of-day clock to accumulate in the appropriate storage locations in each process control block the amount of time the associated process was in the running, ready, or wait states.
摘要翻译：用于计算进程在就绪状态，等待状态或运行状态中花费的时间的计时系统。该系统包括时钟时钟，其耦合到中央处理单元，用于每当进程改变状态时输出时间。还耦合到中央处理单元的存储器存储多个可寻址过程控制块的内容，并且每个过程控制块包括第一，第二和第三存储位置，用于存储相关进程已经在运行的时间量的指示，准备好和等待状态。中央处理器单元根据存储在控制存储器存储器中的一系列微指令产生的控制信号访问过程控制块并更新其中存储的处理时间。每次进程进入运行状态，就绪状态或等待状态之一，并且每次执行进程完成时，都会访问时钟。过程控制块被访问和更新，其中日历时钟的访问时间的差异在每个过程控制块中的相应存储位置中累积在相关进程在运行，就绪或等待状态

4. 发明授权

US4316245A Apparatus and method for semaphore initialization in a multiprocessing computer system for process synchronization 失效
标题翻译：用于进程同步的多处理计算机系统中信号量初始化的装置和方法
公开(公告)号：US4316245A
公开(公告)日：1982-02-16
申请号：US967515
申请日：1978-12-07
申请人： Duc Luu , Philippe-Hubert deRivet , John J. Bradley , Benjamin S. Franklin
发明人： Duc Luu , Philippe-Hubert deRivet , John J. Bradley , Benjamin S. Franklin
IPC分类号： G06F9/46
CPC分类号： G06F9/52
摘要： Apparatus in a data processing system to initialize a semaphore held in a memory field of the data processing system or, alternatively, to restore the semaphore to a previous predetermined state. A count field, or tally field, provided in the semaphore is initialized by a particular instruction. The semaphore can be either a non-message semaphore or a message semaphore. The instruction initializes the semaphore count field of a non message semaphore to zero or a preloaded positive value. For a message semaphore, this instruction initializes the count field to zero. If the message semaphore previously had a positive count, the messages tied to the semaphore are released and the message links holding the messages are transferred to a free message link queue tied to the free link semaphore in the same semaphore descriptor segment. The apparatus includes a retrieving member for reading the content of the semaphore in the memory of the data processing system, a testing member for testing the count field of the semaphore for generating a first signal when the count field represents the number of processes in queue and a second signal when the count field represents the number of times a particular kind of event has occurred, a changing unit responsive to the second signal and controlled by the particular instruction for changing the number inside the count field to a predetermined number and a control member responsive to the first signal and controlled by the particular instruction for controlling the data processing system to cease execution of the particular instruction and to begin to execute a different instruction.
摘要翻译：数据处理系统中的装置，用于初始化保持在数据处理系统的存储器字段中的信号量，或者备选地，将信号量恢复到先前的预定状态。在信号量中提供的计数字段或计数字段由特定指令初始化。信号量可以是非消息信号量或消息信号量。该指令将非消息信号量的信号量计数字段初始化为零或预加载的正值。对于消息信号量，该指令将计数字段初始化为零。如果消息信号量先前具有正数，则释放与信号量相关联的消息，并且将保留消息的消息链接传递到与同一信号量描述符段中的自由链接信号量相连的空闲消息链接队列。该装置包括用于读取数据处理系统的存储器中的信号量的内容的检索构件，测试构件，用于当计数字段表示队列中的进程数时，测试信号量的计数字段以产生第一信号; 当计数字段表示特定类型的事件发生的次数时的第二信号;响应于第二信号并由用于将计数字段内的数目改变为预定数量的特定指令控制的改变单元，以及控制部件响应于第一信号并由用于控制数据处理系统的特定指令控制以停止特定指令的执行并开始执行不同的指令。

5. 发明授权

US4177510A Protection of data in an information multiprocessing system by implementing a concept of rings to represent the different levels of privileges among processes 失效
标题翻译：通过实施环的概念来表示流程中不同级别的权限，保护信息多处理系统中的数据
公开(公告)号：US4177510A
公开(公告)日：1979-12-04
申请号：US528953
申请日：1974-12-02
申请人： Marc Appell , Georges Lepicard , Philippe-Hubert de Rivet , John J. Bradley , Benjamin S. Franklin
发明人： Marc Appell , Georges Lepicard , Philippe-Hubert de Rivet , John J. Bradley , Benjamin S. Franklin
IPC分类号： G06F12/14 , G06F13/00 , G06F9/18 , G06F9/20
CPC分类号： G06F12/1491
摘要： Computer data and procedure protection by preventing processes from intering with each other or sharing each other's address space in an unauthorized manner is accomplished in hardware/firmware by restricting addressability to a segmented memory and by a ring protection mechanism.To protect information in segments shared by several processes from misuse by one of these processes a ring protection hardware system is utilized. There are four ring classes numbered 0 through 3. Each ring represents a level of system privilege with level 0 (the innermost ring) having the most privilege and level 3 (the outermost ring) the least. Every procedure in the system has a minimum and a maximum execute ring number assigned to it which specifies who may legally call the procedure. Also maximum write and read ring numbers specify the maximum ring numbers for which a write and/or read operation is permitted.Processes use a segmented address during execution wherein segment tables isolate the address space of the various processes in the system. Hardware checks that the address used by a process is part of the address space assigned to the process, and if the address is outside the prescribed address space, an exception occurs. A process cannot refer to data within the address space of another process because the hardware uses the segment table of the referencing process.
摘要翻译：通过防止过程彼此干扰或以未经授权的方式共享彼此的地址空间的计算机数据和过程保护通过将可寻址性限制到分段存储器和环保护机制来实现在硬件/固件中。为了保护由多个进程共享的分段中的信息不被这些进程之一的误用，环网保护硬件系统被利用。有四个戒指级别为0到3.每个戒指表示具有最高权限级别0（最内圈）和级别3（最外层）的系统权限级别。系统中的每个过程都具有分配给它的最小和最大执行环号，其中指定谁可以合法地调用该过程。最大写入和读取振铃编号也指定允许写入和/或读取操作的最大振铃数。进程在执行期间使用分段地址，其中分段表隔离系统中各种进程的地址空间。硬件检查进程使用的地址是分配给进程的地址空间的一部分，如果地址在规定的地址空间之外，则会发生异常。进程不能引用另一进程的地址空间内的数据，因为硬件使用引用过程的段表。

6. 发明授权

US4130867A Database instruction apparatus for determining a database record type 失效
标题翻译：用于确定数据库记录类型的数据库指令装置
公开(公告)号：US4130867A
公开(公告)日：1978-12-19
申请号：US588523
申请日：1975-06-19
申请人： Charles W. Bachman , Benjamin S. Franklin
发明人： Charles W. Bachman , Benjamin S. Franklin
IPC分类号： G06F9/30 , G06F17/30 , G06F9/14 , G06F9/20 , G06F13/00
CPC分类号： G06F17/30958 , Y10S707/99931
摘要： One of a series of hardware/firmware instructions for converting a general purpose digital computer into a database machine by adding the capability of handling data base records. The invention comprises a hardware/firmware implemented machine instruction apparatus which fetches a record descriptor containing a referenced data base record type from main memory. The record type of the record to be checked, which is pointed to by a base register, is also fetched from main memory, and a comparison of the fetched record descriptor and type is made. A condition code is set to indicate the result of the comparison.
摘要翻译：通过添加处理数据库记录的能力，将通用数字计算机转换为数据库机器的一系列硬件/固件指令之一。本发明包括一个硬件/固件实现的机器指令装置，其从主存储器中提取包含引用数据库记录类型的记录描述符。由基址寄存器指向的要检查的记录的记录类型也从主存储器中取出，并且取得的记录描述符和类型的比较。条件代码被设置为指示比较的结果。

7. 发明授权

US4351024A Switch system base mechanism 失效
标题翻译：切换系统基础机制
公开(公告)号：US4351024A
公开(公告)日：1982-09-21
申请号：US570331
申请日：1975-04-21
申请人： John J. Bradley , Benjamin S. Franklin
发明人： John J. Bradley , Benjamin S. Franklin
IPC分类号： G06F9/46 , G06F9/30 , G06F9/48 , G06F9/18
CPC分类号： G06F9/4843
摘要： Firmware is provided to change, upon execution, information in the system base which is located in both main memory and internal scratch pad registers.Hardware structures controlled by a microprogrammed control store, which provides for the generation of signals causing the creation of an image in main memory of a communication center comprised of registers at another location in the central processing unit. The microprogrammed control store further generates signals which causes the interchange of the information between the communication center and its image.
摘要翻译：提供固件在执行时更改位于主存储器和内部暂存器寄存器中的系统基础中的信息。由微程序控制存储器控制的硬件结构，其提供在中央处理单元中的另一位置处由寄存器组成的通信中心主存储器中产生图像的信号的产生。微程序控制存储器进一步产生信号，其导致通信中心与其图像之间的信息的交换。

8. 发明授权

US4044334A Database instruction unload 失效
标题翻译：数据库指令卸载
公开(公告)号：US4044334A
公开(公告)日：1977-08-23
申请号：US588522
申请日：1975-06-19
申请人： Charles W. Bachman , Benjamin S. Franklin
发明人： Charles W. Bachman , Benjamin S. Franklin
IPC分类号： G06F9/30 , G06F17/30 , G06F9/10 , G06F9/16 , G06F9/20 , G06F13/00
CPC分类号： G06F17/30958 , Y10S707/99943
摘要： One of a series of hardware/firmware primitives is disclosed for converting a general purpose digital computer into a database machine. The invention comprises a hardware/firmware implemented machine instruction which determines the appropriate register where a database pointer is currently stored, retrieves the pointer from that register and then stores the pointer into main memory.
摘要翻译：公开了一系列硬件/固件原语之一，用于将通用数字计算机转换成数据库机。本发明包括硬件/固件实现的机器指令，其确定当前存储数据库指针的适当寄存器，从该寄存器检索指针，然后将指针存储到主存储器中。

9. 发明授权

US4042912A Database set condition test instruction 失效
标题翻译：数据库设置条件测试指令
公开(公告)号：US4042912A
公开(公告)日：1977-08-16
申请号：US588436
申请日：1975-06-19
申请人： Charles W. Bachman , Benjamin S. Franklin
发明人： Charles W. Bachman , Benjamin S. Franklin
IPC分类号： G06F9/30 , G06F9/46 , G06F17/30 , G06F9/10 , G06F9/16 , G06F9/20 , G06F13/00
CPC分类号： G06F17/30958 , G06F9/463 , Y10S707/961 , Y10S707/99931
摘要： Two of a series of hardware/firmware primitives are disclosed for converting a general purpose digital computer into a database machine. The invention comprises two hardware firmware implemented machine instructions which both fetch a set descriptor, which along with a base register BR, allow access to a record. For the Test Set Empty operation, the record accessed is an owner record and a check is made to see whether the set has any member records currently associated with it. For the Test Member Inserted operation, the record accessed is checked to see whether it is currently inserted as a member of a particular set (i.e., a part of that set).
摘要翻译：公开了一系列硬件/固件原语中的两个用于将通用数字计算机转换成数据库机器。本发明包括两个硬件固件实现的机器指令，其中两个硬件固件实现的机器指令都获取集合描述符，其与基址寄存器BR一起允许访问记录。对于测试集空操作，访问的记录是所有者记录，并进行检查以查看该集合是否具有当前与其关联的成员记录。对于测试成员插入操作，检查所访问的记录以查看其当前是否作为特定集合（即，该集合的一部分）的成员插入。

10. 发明授权

US4447874A Apparatus and method for communication of information between processes in an information system 失效
标题翻译：用于在信息系统中的进程之间进行信息通信的装置和方法
公开(公告)号：US4447874A
公开(公告)日：1984-05-08
申请号：US254185
申请日：1981-04-14
申请人： John J. Bradley , Benjamin S. Franklin , David M. Slosberg , Marc Appell , Jean-Claude Cassonnet , Philippe D. De Sabatier
发明人： John J. Bradley , Benjamin S. Franklin , David M. Slosberg , Marc Appell , Jean-Claude Cassonnet , Philippe D. De Sabatier
IPC分类号： G06F9/46 , G06F12/14 , G06F9/00
CPC分类号： G06F9/54 , G06F12/1491 , G06F9/463
摘要： An apparatus for enabling communication of information between processes being carried out on a computing system. Each process is assigned a control block including a specialized memory element. A process being executed modifies the state of each memory element if it discovers any information of interest to processes awaiting execution. Before the next process is executed, the memory element in its control block is tested to find out if the previously-executed process left any information of interest.
摘要翻译：一种用于在计算系统上执行的进程之间进行信息通信的装置。每个进程被分配一个控制块，其中包含一个专门的存储元件。正在执行的进程如果发现任何感兴趣的信息以处理等待执行，则修改每个存储元件的状态。在执行下一个进程之前，测试其控制块中的存储器元件，以确定先前执行的进程是否留下任何感兴趣的信息。

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