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    • 2. 发明申请
    • MULTI-LEVEL HIGH VOLTAGE PULSER INTEGRATED CIRCUIT USING LOW VOLTAGE MOSFETS
    • 使用低电压MOSFET的多电平高压脉冲集成电路
    • US20130187697A1
    • 2013-07-25
    • US13355749
    • 2012-01-23
    • Ben ChoyChing Chu
    • Ben ChoyChing Chu
    • H03K3/00
    • H03F3/2173B06B1/0215B06B2201/76G01S7/5202H03K17/6872
    • A multi-level high-voltage pulse generator integrated circuit has a digital logic-level control interface circuit. A pair of complementary MOSFETs is controlled by the digital control interface circuit. A pair of supply voltage rails is provided, wherein one of the pair of supply voltage rails is connected to each of the pair of complementary MOSFETs. A pair of Zener diodes is provided, wherein one of the pair of Zener diodes is connected to each of the pair of complementary MOSFETs. A pair of resistors is provided, wherein one of the pair of resistors is connected in parallel with each of the pair of Zener diodes. A pair of complementary voltage blocking-MOSFETs having predetermined gate bias voltages is provided, wherein each of the pair complementary voltage blocking-MOSFETs is attached to a corresponding one pair of complementary MOSFETs.
    • 多级高压脉冲发生器集成电路具有数字逻辑电平控制接口电路。 一对互补MOSFET由数字控制接口电路控制。 提供一对电源电压轨,其中一对电源电压轨之一连接到该对互补MOSFET中的每一对。 提供了一对齐纳二极管,其中一对齐纳二极管中的一个连接到该对互补MOSFET中的每一对。 提供一对电阻器,其中一对电阻器中的一个电阻器与该对齐纳二极管中的每一个并联连接。 提供了具有预定栅极偏置电压的一对互补电压阻挡MOSFET,其中每对互补电压阻挡MOSFET被附接到相应的一对互补MOSFET。
    • 3. 发明授权
    • Multi-level high voltage pulser integrated circuit using low voltage MOSFETs
    • 使用低压MOSFET的多级高压脉冲发生器集成电路
    • US08542037B2
    • 2013-09-24
    • US13355749
    • 2012-01-23
    • Ben ChoyChing Chu
    • Ben ChoyChing Chu
    • H03K3/00
    • H03F3/2173B06B1/0215B06B2201/76G01S7/5202H03K17/6872
    • A multi-level high-voltage pulse generator integrated circuit has a digital logic-level control interface circuit. A pair of complementary MOSFETs is controlled by the digital control interface circuit. A pair of supply voltage rails is provided, wherein one of the pair of supply voltage rails is connected to each of the pair of complementary MOSFETs. A pair of Zener diodes is provided, wherein one of the pair of Zener diodes is connected to each of the pair of complementary MOSFETs. A pair of resistors is provided, wherein one of the pair of resistors is connected in parallel with each of the pair of Zener diodes. A pair of complementary voltage blocking-MOSFETs having predetermined gate bias voltages is provided, wherein each of the pair complementary voltage blocking-MOSFETs is attached to a corresponding one pair of complementary MOSFETs.
    • 多级高压脉冲发生器集成电路具有数字逻辑电平控制接口电路。 一对互补MOSFET由数字控制接口电路控制。 提供一对电源电压轨,其中一对电源电压轨之一连接到该对互补MOSFET中的每一对。 提供了一对齐纳二极管,其中一对齐纳二极管中的一个连接到该对互补MOSFET中的每一对。 提供一对电阻器,其中一对电阻器中的一个电阻器与该对齐纳二极管中的每一个并联连接。 提供了具有预定栅极偏置电压的一对互补电压阻挡MOSFET,其中每对互补电压阻挡MOSFET被附接到相应的一对互补MOSFET。