专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5673216A Process and system for adding or subtracting symbols in any base without converting to a common base 失效
标题翻译：用于在任何基地中添加或减少符号而不转换为公共基础的过程和系统
公开(公告)号：US5673216A
公开(公告)日：1997-09-30
申请号：US575105
申请日：1995-12-19
申请人： Edward E. Kelley , Norman J. Dauerer , Franco Motika , Aziz M. Ahsan
发明人： Edward E. Kelley , Norman J. Dauerer , Franco Motika , Aziz M. Ahsan
IPC分类号： G06F7/50
CPC分类号： G06F7/50
摘要： A process and system for effecting addition and/or subtraction any two symbols having any number of characters and in any base with full precision and without first converting to a common base. Regardless of the quantity of characters of each symbol, the speed of execution remains almost constant per character. The process and system of the present invention does not require the use of floating point notation. Furthermore, the process and system of the present invention does not require or use standard mathematical algorithms, addition or subtraction tables, or exponentiation.
摘要翻译：一种用于进行加法和/或减法的任何两个符号，其具有任何数量的字符，并且在任何基础中具有完全精确性且不首先转换为公共基底。不管每个符号的字符数量如何，每个字符的执行速度几乎保持不变。本发明的方法和系统不需要使用浮点符号。此外，本发明的方法和系统不需要或使用标准的数学算法，加法或减法表，也可以是取幂。

2. 发明授权

US5251806A Method of forming dual height solder interconnections 失效
标题翻译：形成双高度焊料互连的方法
公开(公告)号：US5251806A
公开(公告)日：1993-10-12
申请号：US870647
申请日：1992-04-16
申请人： Birendra N. Agarwala , Aziz M. Ahsan , Arthur Bross , Mark F. Chadurjian , Nicholas G. Koopman , Li-Chung Lee , Karl J. Puttlitz , Sudipta K. Ray , James G. Ryan , Joseph G. Schaefer , Kamalesh K. Srivastava , Paul A. Totta , Erick G. Walton , Adolf E. Wirsing
发明人： Birendra N. Agarwala , Aziz M. Ahsan , Arthur Bross , Mark F. Chadurjian , Nicholas G. Koopman , Li-Chung Lee , Karl J. Puttlitz , Sudipta K. Ray , James G. Ryan , Joseph G. Schaefer , Kamalesh K. Srivastava , Paul A. Totta , Erick G. Walton , Adolf E. Wirsing
IPC分类号： H01L21/60 , H01L23/485 , H05K3/34 , H01L21/283
CPC分类号： H01L24/12 , H01L24/11 , H01L2224/11901 , H01L2224/13082 , H01L2224/131 , H01L2224/13111 , H01L2224/1357 , H01L2224/13582 , H01L2224/13583 , H01L2224/13647 , H01L2224/13655 , H01L2224/13657 , H01L2224/1366 , H01L2224/13664 , H01L2224/13666 , H01L2224/13669 , H01L2224/1367 , H01L2224/13671 , H01L2224/13672 , H01L2224/13676 , H01L2224/13679 , H01L2224/1368 , H01L2224/13681 , H01L2224/13684 , H01L24/16 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01044 , H01L2924/01046 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/15787 , H05K3/3431 , H05K3/3457
摘要： The present invention relates generally to a new interconnection and a method for making the same, and more particularly, to an elongated solder interconnection and a method for making the same. On an electronic carrier, a pad is formed on which a solder mass is deposited and capped with a metal layer, thereby forming an elongated solder interconnection. A further elongated solder interconnection can now be formed by forming a second solder mass on the first solder mass that has been capped by a metal layer. Additional elongated solder interconnection can be formed by capping the preceding solder mass and/or the last solder mass with a metal capping layer. Alternatively, the encapsulating layer can be in the form of a sidewall spacer formed on the sidewalls of the solder mass.
摘要翻译：本发明一般涉及新的互连及其制造方法，更具体地说，涉及一种细长的焊料互连及其制造方法。在电子载体上，形成焊盘，在其上沉积焊料块并用金属层封盖，从而形成细长的焊料互连。现在可以通过在已经被金属层覆盖的第一焊料块上形成第二焊料块来形成另外细长的焊料互连。可以通过用金属覆盖层封盖前述焊料块和/或最后的焊料块来形成附加的细长焊料互连。或者，封装层可以是形成在焊料块的侧壁上的侧壁间隔物的形式。

3. 发明授权

US5130779A Solder mass having conductive encapsulating arrangement 失效
标题翻译：具有导电包装安排的焊接质量
公开(公告)号：US5130779A
公开(公告)日：1992-07-14
申请号：US540256
申请日：1990-06-19
申请人： Birendra N. Agarwala , Aziz M. Ahsan , Arthur Bross , Mark F. Chadurjian , Nicholas G. Koopman , Li-Chung Lee , Karl J. Puttlitz , Sudipta K. Ray , James G. Ryan , Joseph G. Schaefer , Kamalesh K. Srivastava , Paul A. Totta , Erick G. Walton , Adolf E. Wirsing
发明人： Birendra N. Agarwala , Aziz M. Ahsan , Arthur Bross , Mark F. Chadurjian , Nicholas G. Koopman , Li-Chung Lee , Karl J. Puttlitz , Sudipta K. Ray , James G. Ryan , Joseph G. Schaefer , Kamalesh K. Srivastava , Paul A. Totta , Erick G. Walton , Adolf E. Wirsing
IPC分类号： H01L21/60 , H01L23/485 , H05K3/34
CPC分类号： H01L24/13 , H01L24/11 , H01L24/16 , H01L24/81 , H01L2224/13082 , H01L2224/131 , H01L2224/1357 , H01L2224/13582 , H01L2224/13583 , H01L2224/13647 , H01L2224/13655 , H01L2224/13657 , H01L2224/1366 , H01L2224/13664 , H01L2224/13666 , H01L2224/13669 , H01L2224/1367 , H01L2224/13671 , H01L2224/13672 , H01L2224/13676 , H01L2224/13679 , H01L2224/1368 , H01L2224/13681 , H01L2224/13684 , H01L2224/81801 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01044 , H01L2924/01046 , H01L2924/0105 , H01L2924/01051 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/15787 , H05K3/3431 , H05K3/3457
摘要： The present invention relates generally to a new interconnection and a method for making the same, and more particularly, to an elongated solder interconnection and a method for making the same. On an electronic carrier, a pad is formed on which a solder mass is deposited and capped with a metal layer, thereby forming an elongated solder interconnection. A further elongated solder interconnection can now be formed by forming a second solder mass on the first solder mass that has been capped by a metal layer. Additional elongated solder interconnection can be formed by capping the preceding solder mass and/or the last solder mass with a metal capping layer. Alternatively, the encapsulating layer can be in the form of a sidewall spacer formed on the sidewalls of the solder mass.
摘要翻译：本发明一般涉及新的互连及其制造方法，更具体地说，涉及一种细长的焊料互连及其制造方法。在电子载体上，形成焊盘，在其上沉积焊料块并用金属层封盖，从而形成细长的焊料互连。现在可以通过在已经被金属层覆盖的第一焊料块上形成第二焊料块来形成另外细长的焊料互连。可以通过用金属覆盖层封盖前述焊料块和/或最后的焊料块来形成附加的细长焊料互连。或者，封装层可以是形成在焊料块的侧壁上的侧壁间隔物的形式。

4. 发明授权

US5912831A Process and system for adding or substracting symbols in any base without converting to a common base 失效
标题翻译：用于在任何基地中添加或减少符号而不转换为公共基础的过程和系统
公开(公告)号：US5912831A
公开(公告)日：1999-06-15
申请号：US897170
申请日：1997-07-18
申请人： Edward E. Kelley , Norman J. Dauerer , Franko Motika , Aziz M. Ahsan
发明人： Edward E. Kelley , Norman J. Dauerer , Franko Motika , Aziz M. Ahsan
IPC分类号： G06F7/50
CPC分类号： G06F7/50
摘要： A process and system for effecting addition and/or subtraction any two symbols having any number of characters and in any base with full precision and without first converting to a common base. Regardless of the quantity of characters of each symbol, the speed of execution remains almost constant per character. The process and system of the present invention does not require the use of floating point notation. Furthermore, the process and system of the present invention does not require or use standard mathematical algorithms, addition or subtraction tables, or exponentiation.
摘要翻译：一种用于进行加法和/或减法的任何两个符号，其具有任何数量的字符，并且在任何基础中具有完全精确性且不首先转换为公共基底。不管每个符号的字符数量如何，每个字符的执行速度几乎保持不变。本发明的方法和系统不需要使用浮点符号。此外，本发明的方法和系统不需要或使用标准的数学算法，加法或减法表，也可以是取幂。

5. 发明授权

US5481357A Apparatus and method for high-efficiency, in-situ particle detection 失效
标题翻译：用于高效，原位颗粒检测的装置和方法
公开(公告)号：US5481357A
公开(公告)日：1996-01-02
申请号：US201732
申请日：1994-03-03
申请人： Aziz M. Ahsan , Kianoush Beyzavi , Nagaraja P. Rao
发明人： Aziz M. Ahsan , Kianoush Beyzavi , Nagaraja P. Rao
IPC分类号： G01N1/22 , G01N15/02 , G01N15/14 , G01N21/53 , G01N21/00
CPC分类号： G01N15/0205 , G01N2001/225 , G01N2015/0238 , G01N2015/1413 , G01N21/53
摘要： The present invention relates generally to a new apparatus and a method for a high-efficiency in-situ vacuum particle detection. More particularly, the invention encompasses an apparatus for a particle detecting instrument designed to detect the presence of gas-borne particles in a vacuum line with high efficiency, using a sharply converging nozzle to preferentially focus the suspended particles flowing through it into a small region located on the nozzle axis within a few exit dimensions downstream from the nozzle exit. This focal region has a dimension much smaller than that of the nozzle exit, and is illuminated by a narrow, intense light beam. The particles passing through the illuminated focal region are detected by photodetector elements receiving light scattered from the particles. A method and an apparatus for high-efficiency, in-situ particle separation and/or measurement is also disclosed.
摘要翻译：本发明一般涉及用于高效率原位真空粒子检测的新装置和方法。更具体地说，本发明包括一种用于粒子检测仪器的装置，该装置被设计成以高效率的方式在真空管线中检测气体颗粒的存在，使用尖锐的会聚喷嘴优先将流过它的悬浮颗粒聚焦到位于在喷嘴轴线上在喷嘴出口下游的几个出口尺寸内。该焦点区域的尺寸远小于喷嘴出口的尺寸，并且被窄的强光束照射。通过被照射的聚焦区域的颗粒由接收从颗粒散射的光的光检测器元件检测。还公开了一种用于高效，原位颗粒分离和/或测量的方法和装置。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式