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1. 发明授权

US5726098A Method of manufacturing semiconductor device having multilevel interconnection 失效
标题翻译：制造具有多层互连的半导体器件的方法
公开(公告)号：US5726098A
公开(公告)日：1998-03-10
申请号：US531376
申请日：1995-09-21
申请人： Atsushi Tsuboi
发明人： Atsushi Tsuboi
IPC分类号： H01L21/28 , H01L21/768 , H01L23/522 , H01L21/283 , H01L21/31
CPC分类号： H01L21/768
摘要： An underlying interconnection is formed on a semiconductor substrate, and an interlayer insulating film is formed on the semiconductor substrate and the underlying interconnection. A metal film is deposited on the interlayer insulating film, and is patterned in an interconnection pattern, and a first opening for connecting the metal film to the underlying interconnection is patterned, thereby forming an overlying interconnection. Then, a protection film is formed so as to cover the surfaces of the overlying interconnection and the interlayer insulating film. Next, a photoresist film is formed on the protection film, and is patterned to provide a second opening larger than the first opening in the protection film above the first opening and provide a third opening in a pad-portion forming region on the overlying interconnection. At the same time, with the overlying interconnection as a mask, the interlayer insulating film is selectively etched out to form a through hole. Then, a tungsten film is deposited in the through hole and on the protection film, and the unnecessary portion of the tungsten film is etched back to form a tungsten plug in the through hole which electrically connects the underlying interconnection to the overlying interconnection.
摘要翻译：在半导体衬底上形成底层互连，在半导体衬底和底层互连上形成层间绝缘膜。金属膜沉积在层间绝缘膜上，并以互连图形图案化，并且将金属膜连接到下面的互连件的第一开口被图案化，从而形成上覆互连。然后，形成保护膜以覆盖上覆互连和层间绝缘膜的表面。接下来，在保护膜上形成光致抗蚀剂膜，并且被图案化以提供比第一开口上方的保护膜中的第一开口大的第二开口，并且在覆盖互连件上的焊盘部分形成区域中提供第三开口。同时，以覆盖互连为掩模，选择性地蚀刻层间绝缘膜以形成通孔。然后，在通孔和保护膜上沉积钨膜，并且将钨膜的不需要的部分回蚀刻，以在通孔中形成钨塞，将下面的互连电连接到上覆互连。

2. 发明授权

US07280008B2 Printed-circuit board, electronic part having shield structure, and radio communication apparatus 失效
标题翻译：印刷电路板，具有屏蔽结构的电子部件和无线通信装置
公开(公告)号：US07280008B2
公开(公告)日：2007-10-09
申请号：US10501934
申请日：2003-01-23
申请人： Kunio Yamaguchi , Ryouhei Kimura , Atsushi Tsuboi , Kenyu Morozumi
发明人： Kunio Yamaguchi , Ryouhei Kimura , Atsushi Tsuboi , Kenyu Morozumi
IPC分类号： H03H9/64 , H03H9/05
CPC分类号： H05K1/0243 , H03H9/0259 , H03H9/02913 , H05K1/111 , H05K2201/09063 , H05K2201/09281 , H05K2201/09336 , H05K2201/10083
摘要： In a fitting region for a SAW filter which includes langasite as its piezoelectric element, there are included an input side terminal electrode and an output side terminal electrode which are connected to an input terminal and to an output terminal of the SAW filter. To each of the terminal electrodes, at a position which is separated by just a predetermined distance from the fitting region of the SAW filter, there is connected a micro strip line which extends in mutually opposite directions along a direction which is parallel to the transmission direction of a frequency signal within the SAW filter. A slit is provided in the fitting region of the SAW filter and extends in a direction which intersects the transmission direction of the frequency signal within the SAW filter. A plurality of through holes are provided in the printed substrate and electrically connect together its surface and its rear surface which is grounded. Furthermore, there is provided a protective member which has a conductive surface and which is in contact with the surface of said filter, and said conductive surface of said protective member which is in contact with the surface of said filter is set so as to be of the same size as the surface of said filter, or so as to be smaller than it.
摘要翻译：在包括硅灰石作为其压电元件的SAW滤波器的嵌合区域中，包括连接到SAW滤波器的输入端子和输出端子的输入侧端子电极和输出侧端子电极。对于每个端子电极，在与SAW滤波器的嵌合区域分开只有预定距离的位置处连接有沿着与传输方向平行的方向在相互相反的方向上延伸的微带线的SAW滤波器内的频率信号。在SAW滤波器的装配区域中设置有狭缝，并且在与SAW滤波器内的频率信号的传输方向相交的方向上延伸。多个通孔设置在印刷基板中，并将其表面及其背面接地电连接在一起。此外，提供了具有导电表面并与所述过滤器的表面接触的保护构件，并且与所述过滤器的表面接触的所述保护构件的所述导电表面被设定为与所述过滤器的表面相同的尺寸，或者比其小。

3. 发明授权

US06528881B1 Semiconductor device utilizing a side wall to prevent deterioration between electrode pad and barrier layer 有权
标题翻译：利用侧壁以防止电极焊盘和阻挡层之间的劣化的半导体器件
公开(公告)号：US06528881B1
公开(公告)日：2003-03-04
申请号：US09640179
申请日：2000-08-17
申请人： Atsushi Tsuboi
发明人： Atsushi Tsuboi
IPC分类号： H01L2348
CPC分类号： H01L24/12 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/02126 , H01L2224/0401 , H01L2224/05022 , H01L2224/05552 , H01L2224/05567 , H01L2224/05572 , H01L2224/05599 , H01L2224/05624 , H01L2224/05647 , H01L2224/10126 , H01L2224/13007 , H01L2224/13022 , H01L2224/13099 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/14 , H01L2924/00012
摘要： In a semiconductor device that includes a barrier film, an electrode pad on the barrier film, and a solder ball on the electrode pad, the electrode pad is prevented from exfoliating from the barrier film by a side wall film separating the solder ball from a boundary between the barrier film and the electrode pad.
摘要翻译：在包括阻挡膜，阻挡膜上的电极焊盘和电极焊盘上的焊球的半导体器件中，通过将焊球与边界分离的侧壁膜防止电极焊盘从阻挡膜剥离在阻挡膜和电极垫之间。

4. 发明授权

US06413841B1 MOS type semiconductor device and manufacturing method thereof 失效
标题翻译： MOS型半导体器件及其制造方法
公开(公告)号：US06413841B1
公开(公告)日：2002-07-02
申请号：US09422193
申请日：1999-10-21
申请人： Atsushi Tsuboi
发明人： Atsushi Tsuboi
IPC分类号： H01L2120
CPC分类号： H01L21/823462 , H01L21/02532 , H01L21/02667 , H01L21/2022 , H01L21/28035 , H01L21/823418 , H01L29/4925
摘要： First, a polysilicon film is formed on a gate oxide film. Next, a polysilicon oxide film is formed on the polysilicon film. Thereafter, the polysilicon film is thermally treated to allow a crystal grain in the polysilicon film to grow from the gate oxide film and the polysilicon oxide film. In a MOS type semiconductor device manufactured in this manner has a gate electrode formed of a plurality of laminated polycrystalline silicon layers each having substantially a single crystal grain in a thickness direction of the gate electrode.
摘要翻译：首先，在栅极氧化膜上形成多晶硅膜。接着，在多晶硅膜上形成多晶硅氧化膜。此后，对多晶硅膜进行热处理，以使多晶硅膜中的晶粒从栅极氧化膜和多晶硅氧化物膜生长。在以这种方式制造的MOS型半导体器件中，具有由栅电极的厚度方向上具有大致单晶的多个层叠多晶硅层形成的栅电极。

5. 发明授权

US08577219B2 Imaging apparatus and method of calculating usable time of imaging apparatus 失效
公开(公告)号：US08577219B2
公开(公告)日：2013-11-05
申请号：US13287286
申请日：2011-11-02
申请人： Ryoichi Nakashima , Atsushi Tsuboi
发明人： Ryoichi Nakashima , Atsushi Tsuboi
IPC分类号： G03B7/26
CPC分类号： G03B7/26 , G01R31/3682 , H01M10/44 , H01M10/488
摘要： An imaging apparatus includes a usable time calculation unit which calculates a usable time of a battery device having a secondary battery, wherein the usable time calculation unit measures an average power level while a component is performed at a predetermined operation mode, wherein the power consumption of the component is unknown in advance before the component is initially connected, and when power is supplied for the second and subsequent times while the component is continuously connected, the usable time calculation unit calculates the usable time of the battery device using the average power level and a current integration value which is an integration value of current flowing during charging and discharging of the battery device.

6. 发明申请

US20120155849A1 IMAGING APPARATUS AND METHOD OF CALCULATING USABLE TIME OF IMAGING APPARATUS 失效
标题翻译：成像装置和计算成像装置可用时间的方法
公开(公告)号：US20120155849A1
公开(公告)日：2012-06-21
申请号：US13287286
申请日：2011-11-02
申请人： Ryoichi NAKASHIMA , Atsushi Tsuboi
发明人： Ryoichi NAKASHIMA , Atsushi Tsuboi
IPC分类号： G03B7/26
CPC分类号： G03B7/26 , G01R31/3682 , H01M10/44 , H01M10/488
摘要： An imaging apparatus includes a usable time calculation unit which calculates a usable time of a battery device having a secondary battery, wherein the usable time calculation unit measures an average power level while a component is performed at a predetermined operation mode, wherein the power consumption of the component is unknown in advance before the component is initially connected, and when power is supplied for the second and subsequent times while the component is continuously connected, the usable time calculation unit calculates the usable time of the battery device using the average power level and a current integration value which is an integration value of current flowing during charging and discharging of the battery device.
摘要翻译：一种成像装置包括：可用时间计算单元，其计算具有二次电池的电池装置的可用时间，其中所述可用时间计算单元在预定操作模式下执行分量时测量平均功率电平，其中，组件在组件初始连接之前是预先未知的，并且当连续地连接组件时，当第二次和随后的时间供电时，可用时间计算单元使用平均功率电平来计算电池设备的可用时间，电流积分值，其是在电池装置的充电和放电期间流动的电流的积分值。

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