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1. 发明授权

US11501236B2 Systems and methods for analyzing a physical infrastructure 有权
公开(公告)号：US11501236B2
公开(公告)日：2022-11-15
申请号：US17217547
申请日：2021-03-30
申请人： Arif Mohaimin Sadri , Md Ashraf Ahmed
发明人： Arif Mohaimin Sadri , Md Ashraf Ahmed
IPC分类号： G06Q10/06
摘要： Systems, methods, and frameworks are provided for analyzing topological credentials of a physical network or infrastructure using network science principles and identifying the most influential physical locations within the physical network. The vulnerability and resilience of the physical network can be assessed based on network science principles and/or graph theory to identify the most central physical components to assist with decision making for operation, maintenance, repair, and/or construction within the physical network.

2. 发明授权

US06944744B2 Apparatus and method for independently schedulable functional units with issue lock mechanism in a processor 有权
标题翻译：用于在处理器中具有问题锁定机构的独立可调度功能单元的装置和方法
公开(公告)号：US06944744B2
公开(公告)日：2005-09-13
申请号：US10228929
申请日：2002-08-27
申请人： Ashraf Ahmed , Michael A. Filippo , James K. Pickett
发明人： Ashraf Ahmed , Michael A. Filippo , James K. Pickett
IPC分类号： G06F9/38 , G06F9/30
CPC分类号： G06F9/3853 , G06F9/30036 , G06F9/3836 , G06F9/384 , G06F9/3855 , G06F9/3885
摘要： A functional unit of a processor may be configured to operate on instructions as either a single, wide functional unit or as multiple, independent narrower units. For example, an execution unit may be scheduled to execute an instruction as a single double-wide execution unit or as two independently schedulable single-wide execution units. Functional unit portions may be independently schedulable for execution of instructions operating on a first data type (e.g. SISD instructions). For single-wide instructions, functional unit portions may be scheduled independently. An issue lock mechanism may lock functional unit portions together so that they form a single multi-wide functional unit. For certain multi-wide instructions (e.g. certain SIMD instructions), an instruction operating on a multi-wide or vector data type may be scheduled so that the full multi-wide operation is performed concurrently by functional unit portions locked together as a one wide functional unit.
摘要翻译：处理器的功能单元可以被配置为作为单个，宽功能单元或多个独立的较窄单元的指令进行操作。例如，可以将执行单元调度为执行作为单个双宽执行单元的指令或作为两个可独立调度的单宽执行单元执行。功能单元部分可以是独立可调度的，用于执行基于第一数据类型（例如SISD指令）的指令。对于单宽指令，可以独立地调度功能单元部分。问题锁定机构可以将功能单元部分锁定在一起，使得它们形成单个多宽度功能单元。对于某些多宽指令（例如某些SIMD指令），可以调度在多宽或向量数据类型上操作的指令，使得全功能多操作由作为一个宽功能的锁定在一起的功能单元部分同时执行单元。

3. 发明申请

US20220318701A1 SYSTEMS AND METHODS FOR ANALYZING A PHYSICAL INFRASTRUCTURE 有权
公开(公告)号：US20220318701A1
公开(公告)日：2022-10-06
申请号：US17217547
申请日：2021-03-30
申请人： Arif Mohaimin Sadri , Md Ashraf Ahmed
发明人： Arif Mohaimin Sadri , Md Ashraf Ahmed
IPC分类号： G06Q10/06
摘要： Systems, methods, and frameworks are provided for analyzing topological credentials of a physical network or infrastructure using network science principles and identifying the most influential physical locations within the physical network. The vulnerability and resilience of the physical network can be assessed based on network science principles and/or graph theory to identify the most central physical components to assist with decision making for operation, maintenance, repair, and/or construction within the physical network.

4. 发明授权

US09513908B2 Streaming memory transpose operations 有权
标题翻译：流式内存转置操作
公开(公告)号：US09513908B2
公开(公告)日：2016-12-06
申请号：US14017238
申请日：2013-09-03
申请人： Ashraf Ahmed , Nicholas Todd Humphries , Marc Michael Augustin
发明人： Ashraf Ahmed , Nicholas Todd Humphries , Marc Michael Augustin
IPC分类号： G06F5/00 , G06F9/30
CPC分类号： G06F9/30043 , G06F9/30032 , G06F9/30036 , G06F9/3017
摘要： According to one general aspect, an apparatus may include a load/store unit, an execution unit, and a first and a second data path. The load/store unit may be configured to load/store data from/to a memory and transmit the data to/from an execution unit, wherein the data includes a plurality of elements. The execution unit may be configured to perform an operation upon the data. The load/store unit may be configured to transmit the data to/from the execution unit via either a first data path configured to communicate, without transposition, the data between the load/store unit and the execution unit, or a second data path configured to communicate, with transposition, the data between the load/store unit and the execution unit, wherein transposition includes dynamically distributing portions of the data amongst a plurality of elements according to an instruction.
摘要翻译：根据一个一般方面，装置可以包括加载/存储单元，执行单元以及第一和第二数据路径。加载/存储单元可以被配置为从/向存储器加载/存储数据，并向/从执行单元发送数据，其中数据包括多个元素。执行单元可以被配置为对数据执行操作。加载/存储单元可以被配置为经由第一数据路径将数据发送到/从执行单元，第一数据路径被配置为在不转置加载/存储单元和执行单元之间的数据或者配置的第二数据路径通过转置来传送加载/存储单元和执行单元之间的数据，其中转置包括根据指令在多个元素中动态分配数据的部分。

5. 发明授权

US07565513B2 Processor with power saving reconfigurable floating point unit decoding an instruction to single full bit operation or multiple reduced bit operations 有权
标题翻译：具有省电可重配置浮点单元的处理器将指令解码为单个全位操作或多个减少位操作
公开(公告)号：US07565513B2
公开(公告)日：2009-07-21
申请号：US11680331
申请日：2007-02-28
申请人： Ashraf Ahmed , Kelvin Domnic Goveas , Michael Clark , Jelena Ilic
发明人： Ashraf Ahmed , Kelvin Domnic Goveas , Michael Clark , Jelena Ilic
IPC分类号： G06F9/302
CPC分类号： G06F9/30014 , G06F9/30032 , G06F9/30036 , G06F9/3017 , G06F9/30189 , G06F9/3836 , G06F9/384
摘要： A technique of operating a processor includes determining whether a floating point unit (FPU) of the processor is to operate in a full-bit mode or a reduced-bit mode. An instruction is fetched and the instruction is decoded into a single operation, when the full-bit mode is indicated, or multiple operations, when the reduced-bit mode is indicated.
摘要翻译：操作处理器的技术包括确定处理器的浮点单元（FPU）是否以全位模式或降低位模式操作。当指示缩小位模式时，指示被取出并且指示被解码为单个操作，当指示全位模式时，或多个操作。

6. 发明授权

US5978901A Floating point and multimedia unit with data type reclassification capability 失效
标题翻译：具有数据类型重新分类能力的浮点数和多媒体单元
公开(公告)号：US5978901A
公开(公告)日：1999-11-02
申请号：US916056
申请日：1997-08-21
申请人： Mark R. Luedtke , Paul K. Miller , Chris N. Hinds , Ashraf Ahmed
发明人： Mark R. Luedtke , Paul K. Miller , Chris N. Hinds , Ashraf Ahmed
IPC分类号： G06F9/30 , G06F9/318 , G06F9/38 , G06F9/302
CPC分类号： G06F9/3891 , G06F9/30105 , G06F9/30134 , G06F9/30192 , G06F9/3885
摘要： A superscalar microprocessor includes a combination floating point and multimedia unit. The floating point and multimedia unit includes one set of registers. The multimedia core and floating point core share the one set of registers. Each register as a type field associated with the register. The type field identifies whether the associated register contains valid data and whether the data is of multimedia type or floating point type. If the register stores floating point type data, the type field further indicates which of a plurality of floating point types the register stores such as: zero, infinity and normal. The floating point core relies on the type field to identify special floating point numbers such as zero and infinity. To ensure predictable results when a floating point instruction is executed subsequent to a multimedia instruction, a retyping algorithm retypes registers typed as multimedia type when the first floating point instruction subsequent to a multimedia instruction is executed. The retyping algorithm reads each register and reclassifies the registers classified as multimedia type. The reclassification algorithm classifies the contents of the register interpreted as floating point data.
摘要翻译：超标量微处理器包括组合浮点和多媒体单元。浮点和多媒体单元包括一组寄存器。多媒体核心和浮点核心共享一组寄存器。每个寄存器作为与寄存器相关联的类型字段。类型字段标识相关联的寄存器是否包含有效数据以及数据是多媒体类型还是浮点型。如果寄存器存储浮点型数据，则类型字段进一步指示寄存器存储的多个浮点类型中的哪一种，例如：零，无穷大和正常。浮点核心依赖于类型字段来识别特殊浮点数，例如零和无穷大。为了在多媒体指令之后执行浮点指令时确保可预测的结果，当执行多媒体指令之后的第一个浮点指令时，重新输入算法重新输入类型为多媒体类型的寄存器。重新输入法算法读取每个寄存器并重新分类归类为多媒体类型的寄存器。重分类算法将寄存器的内容分类为浮点数据。

7. 发明申请

US20140281415A1 DYNAMIC RENAME BASED REGISTER RECONFIGURATION OF A VECTOR REGISTER FILE 有权
标题翻译：基于动态RENAME的寄存器寄存器寄存器文件的重新配置
公开(公告)号：US20140281415A1
公开(公告)日：2014-09-18
申请号：US13837213
申请日：2013-03-15
申请人： Bradley Gene BURGESS , Ashraf AHMED , Ravi IYENGAR
发明人： Bradley Gene BURGESS , Ashraf AHMED , Ravi IYENGAR
IPC分类号： G06F9/30
CPC分类号： G06F9/30098 , G06F9/30112 , G06F9/384
摘要： Reconfiguring a register file using a rename table having a plurality of fields that indicate fracture information about a source register of an instruction for instructions which have narrow to wide dependencies.
摘要翻译：使用具有多个字段的重命名表来重新配置寄存器文件，所述多个字段指示关于具有窄到宽依赖性的指令的指令的源寄存器的断裂信息。

8. 发明申请

US20080209185A1 Processor with reconfigurable floating point unit 审中-公开
标题翻译：具有可重构浮点单元的处理器
公开(公告)号：US20080209185A1
公开(公告)日：2008-08-28
申请号：US11756166
申请日：2007-05-31
申请人： Ashraf Ahmed , Kelvin Domnic Goveas , Michael Clark , Jelena Ilic
发明人： Ashraf Ahmed , Kelvin Domnic Goveas , Michael Clark , Jelena Ilic
IPC分类号： G06F7/38
CPC分类号： G06F9/30014 , G06F9/30036 , G06F9/3013 , G06F9/30149 , G06F9/3017 , G06F9/30181 , G06F9/30189 , G06F9/382 , G06F9/384 , G06F9/3857 , G06F9/3885
摘要： A technique of operating a processor includes determining whether a floating point unit (FPU) of the processor is to operate in a full-bit mode or a reduced-bit mode. An instruction is fetched and the instruction is decoded into one or more full-bit operations, when the full-bit mode is indicated, or one or more reduced-bit operations, when the reduced-bit mode is indicated.
摘要翻译：操作处理器的技术包括确定处理器的浮点单元（FPU）是否以全位模式或降低位模式操作。当指示缩小位模式时，指令被取出并且当指示全位模式时，指令被解码为一个或多个全位操作，或者一个或多个精简位操作。

9. 发明授权

US6009511A Apparatus and method for tagging floating point operands and results for rapid detection of special floating point numbers 失效
标题翻译：用于标记浮点运算符和结果的装置和方法用于快速检测特殊浮点数
公开(公告)号：US6009511A
公开(公告)日：1999-12-28
申请号：US873340
申请日：1997-06-11
申请人： Thomas W. Lynch , Ashraf Ahmed
发明人： Thomas W. Lynch , Ashraf Ahmed
IPC分类号： G06F7/00 , G06F9/302 , G06F9/318 , G06F9/34 , G06F7/38
CPC分类号： G06F9/30014 , G06F9/30192
摘要： A superscalar microprocessor appends a tag value to each floating point number. The tag value indicates whether the corresponding floating point number is a normal floating point number or a special floating point number. Additionally, the tag value indicates the type of special floating point number represented by the corresponding floating point number. The tag value is stored with the floating point number in a register file of the floating point unit. Tag values are also generated for floating point numbers read from memory. When a floating point core of a floating point unit receives operands from either the register file or memory, the floating point core examines the tag values to determine whether each operand is a normal floating point number or a special floating point number. If either operand is a special floating point number, the floating point core determines the type of special floating point number and applies any applicable special rules. By appending tag values to each floating point number, the floating point unit can quickly determine which floating point numbers are special floating point numbers and the type of special floating point number. This reduces the time necessary to identify floating point numbers and expedites the execution of floating point instructions.
摘要翻译：超标量微处理器将标签值附加到每个浮点数。标签值表示相应的浮点数是正常浮点数还是特殊浮点数。另外，标签值表示由相应的浮点数表示的特殊浮点数的类型。标记值与浮点数存储在浮点数单元的寄存器文件中。也为从内存中读取的浮点数生成标记值。当浮点单元的浮点核心从寄存器文件或存储器接收操作数时，浮点核心检查标记值，以确定每个操作数是正常浮点数还是特殊浮点数。如果任一操作数是特殊的浮点数，浮点数确定特殊浮点数的类型，并应用任何适用的特殊规则。通过将标签值附加到每个浮点数，浮点单元可以快速确定哪个浮点数是特殊浮点数和特殊浮点数的类型。这减少了识别浮点数并加快执行浮点指令所需的时间。

10. 发明授权

US09588770B2 Dynamic rename based register reconfiguration of a vector register file 有权
标题翻译：矢量寄存器文件的基于动态重命名的寄存器重新配置
公开(公告)号：US09588770B2
公开(公告)日：2017-03-07
申请号：US13837213
申请日：2013-03-15
申请人： Bradley Gene Burgess , Ashraf Ahmed , Ravi Iyengar
发明人： Bradley Gene Burgess , Ashraf Ahmed , Ravi Iyengar
IPC分类号： G06F9/30 , G06F9/40 , G06F9/38
CPC分类号： G06F9/30098 , G06F9/30112 , G06F9/384
摘要： Reconfiguring a register file using a rename table having a plurality of fields that indicate fracture information about a source register of an instruction for instructions which have narrow to wide dependencies.
摘要翻译：使用具有多个字段的重命名表来重新配置寄存器文件，所述多个字段指示关于具有窄到宽依赖性的指令的指令的源寄存器的断裂信息。

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