专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20090004777A1 Stacked die semiconductor package and method of assembly 有权
标题翻译：堆叠半导体封装和组装方法
公开(公告)号：US20090004777A1
公开(公告)日：2009-01-01
申请号：US12124880
申请日：2008-05-21
申请人： Ravi Kanth Kolan , Anthony Sun Yi-Sheng , Liu Hao , Toh Chin Hock
发明人： Ravi Kanth Kolan , Anthony Sun Yi-Sheng , Liu Hao , Toh Chin Hock
IPC分类号： H01L21/00
CPC分类号： H01L25/0657 , H01L25/50 , H01L2224/16145 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541
摘要： A method of manufacturing a plurality of stacked die semiconductor packages, including: attaching a second silicon wafer to a first silicon wafer, wherein the second silicon wafer has a plurality of open vias; attaching a third silicon wafer to the second silicon wafer, wherein the third silicon wafer has a plurality of open vias, and the open vias of the second and third silicon wafers are aligned with one another; etching a bonding material that attaches the wafers from the aligned open vias; filling the aligned open vias with a conductor; forming conductive bumps at open ends of the aligned open vias; back grinding the first silicon wafer; separating the stacked semiconductor dies from each other; attaching the bump end of the stacked semiconductor dies onto a substrate; encapsulating the stacked semiconductor dies and substrate; and singulating the encapsulated assembly.
摘要翻译：一种制造多个堆叠管芯半导体封装的方法，包括：将第二硅晶片连接到第一硅晶片，其中所述第二硅晶片具有多个开口; 将第三硅晶片附接到所述第二硅晶片，其中所述第三硅晶片具有多个开放通孔，并且所述第二和第三硅晶片的所述开放通孔彼此对准; 蚀刻从对准的开放通孔连接晶片的接合材料; 用导体填充对齐的开放通孔; 在对齐的开放通孔的开口端形成导电凸块; 背面研磨第一个硅晶片; 将堆叠的半导体管芯彼此分离; 将堆叠的半导体管芯的凸起端附接到基板上; 封装堆叠的半导体管芯和衬底; 并分离封装的组件。

2. 发明授权

US07883938B2 Stacked die semiconductor package and method of assembly 有权
标题翻译：堆叠半导体封装和组装方法
公开(公告)号：US07883938B2
公开(公告)日：2011-02-08
申请号：US12124880
申请日：2008-05-21
申请人： Ravi Kanth Kolan , Anthony Sun Yi Sheng , Liu Hao , Toh Chin Hock
发明人： Ravi Kanth Kolan , Anthony Sun Yi Sheng , Liu Hao , Toh Chin Hock
IPC分类号： H01L21/00
CPC分类号： H01L25/0657 , H01L25/50 , H01L2224/16145 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541
摘要： A method of manufacturing a plurality of stacked die semiconductor packages, including: attaching a second silicon wafer to a first silicon wafer, wherein the second silicon wafer has a plurality of open vias; attaching a third silicon wafer to the second silicon wafer, wherein the third silicon wafer has a plurality of open vias, and the open vias of the second and third silicon wafers are aligned with one another; etching a bonding material that attaches the wafers from the aligned open vias; filling the aligned open vias with a conductor; forming conductive bumps at open ends of the aligned open vias; back grinding the first silicon wafer; separating the stacked semiconductor dies from each other; attaching the bump end of the stacked semiconductor dies onto a substrate; encapsulating the stacked semiconductor dies and substrate; and singulating the encapsulated assembly.
摘要翻译：一种制造多个堆叠管芯半导体封装的方法，包括：将第二硅晶片连接到第一硅晶片，其中所述第二硅晶片具有多个开口; 将第三硅晶片附接到所述第二硅晶片，其中所述第三硅晶片具有多个开放通孔，并且所述第二和第三硅晶片的所述开放通孔彼此对准; 蚀刻从对准的开放通孔连接晶片的接合材料; 用导体填充对齐的开放通孔; 在对齐的开放通孔的开口端形成导电凸块; 背面研磨第一个硅晶片; 将堆叠的半导体管芯彼此分离; 将堆叠的半导体管芯的凸起端附接到基板上; 封装堆叠的半导体管芯和衬底; 并分离封装的组件。

3. 发明授权

US08039951B2 Thermally enhanced semiconductor package and method of producing the same 有权
标题翻译：热增强半导体封装及其制造方法
公开(公告)号：US08039951B2
公开(公告)日：2011-10-18
申请号：US11495781
申请日：2006-07-31
申请人： Kolan Ravi Kanth , Danny Vallejo Retuta , Hien Boon Tan , Anthony Sun-Yi Sheng , Susanto Tanary , Patrick Low Tse Hoong
发明人： Kolan Ravi Kanth , Danny Vallejo Retuta , Hien Boon Tan , Anthony Sun-Yi Sheng , Susanto Tanary , Patrick Low Tse Hoong
IPC分类号： H01L23/10
CPC分类号： H01L23/544 , H01L21/565 , H01L23/3128 , H01L23/4334 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2223/54473 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/15311 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： This invention includes a heat sink structure for use in a semiconductor package that includes a ring structure with down sets and a heat sink connected to the ring structure. The down sets can be slanted or V-shaped. The invention also includes a method of manufacturing a semiconductor package that includes inserting a substrate with an attached semiconductor chip in a first mold portion, placing a heat sink structure on top of a portion of the substrate, placing a mold release film onto a second mold portion, clamping a second mold portion onto a portion of the heat sink structure, injecting an encapsulant into a mold cavity, wherein the encapsulant surrounds portions of the substrate, semiconductor chip and heat sink structure, curing the encapsulant, whereby the heat sink structure adheres to the encapsulant and singulating the encapsulated assembly to form a semiconductor package.
摘要翻译：本发明包括用于半导体封装的散热器结构，其包括具有下降组件的环形结构和连接到环形结构的散热器。羽绒服可以倾斜或V形。本发明还包括制造半导体封装的方法，该方法包括将具有附接的半导体芯片的衬底插入第一模具部分中，将散热器结构放置在衬底的一部分的顶部上，将脱模膜放置在第二模具将第二模具部分夹紧到散热器结构的一部分上，将密封剂注入模腔中，其中所述密封剂围绕所述衬底，半导体芯片和散热器结构的部分，固化所述密封剂，由此所述散热器结构粘附并且分离封装的组件以形成半导体封装。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式