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1. 发明授权

US5247161A Bar code scanning system with converter means and microprocessor means contained in a single integrated circuit 失效
标题翻译：具有转换器装置和微处理器装置的条形码扫描系统包含在单个集成电路中
公开(公告)号：US5247161A
公开(公告)日：1993-09-21
申请号：US817060
申请日：1992-01-06
申请人： Robert J. Actis , Craig D. Cherry , Andrew P. Taussig
发明人： Robert J. Actis , Craig D. Cherry , Andrew P. Taussig
IPC分类号： G06K7/10
CPC分类号： G06K7/10851
摘要： A system for scanning bar code labels and for providing data related thereto includes scanning means for optically scanning bar code labels and providing an electrical, binary scan signal in response thereto. The scanning means includes a scanner and a scanner controller, and an integrated circuit. The integrated circuit includes a converter means, responsive to the scanning means, for translating the electrical, binary scan signal into a related sequence of digital words. The integrated circuit further includes a microprocessor means, responsive to the converter means, for translating the related sequence of digital words into data. The microprocessor means has first and second microprocessor circuits for independently translating the sequence of digital words into data. The microprocessor means also has a random access memory for storing the appropriate software to control operation of the first and second microprocessor circuits.
摘要翻译：用于扫描条形码标签和用于提供与之相关的数据的系统包括扫描装置，用于光学扫描条形码标签并响应于此提供电二进制扫描信号。扫描装置包括扫描仪和扫描仪控制器以及集成电路。集成电路包括响应于扫描装置的转换器装置，用于将电二进制扫描信号转换成数字字的相关序列。集成电路还包括微处理器装置，响应于转换器装置，将相关的数字字序列转换为数据。微处理器装置具有用于将数字字序列独立地转换为数据的第一和第二微处理器电路。微处理器装置还具有用于存储适当的软件以控制第一和第二微处理器电路的操作的随机存取存储器。

2. 发明授权

US4879456A Method of decoding a binary scan signal 失效
标题翻译：二进制扫描信号的解码方法
公开(公告)号：US4879456A
公开(公告)日：1989-11-07
申请号：US64110
申请日：1987-06-18
申请人： Craig D. Cherry , Andrew P. Taussig , Michael T. Brooks
发明人： Craig D. Cherry , Andrew P. Taussig , Michael T. Brooks
IPC分类号： G06K7/14
CPC分类号： G06K7/1486 , G06K7/14
摘要： A method of decoding a binary scan signal consisting of a bit sequence produced by an electro-optical scanning device as the device scans bar code symbols on a label is disclosed. The bits in the sequence correspond to light and dark spaces making up the bar code symbols. The method includes the steps of: a. supplying the binary scan signal to a storage buffer such that the buffer contains a plurality of bits most recently produced by the scanning device, b. selecting a portion of the bit sequence which defines a large light space, c. subjecting the bits in the sequence following those defining the large light space to a series of tests to determine whether such bits were produced by scanning a bar code symbol which is valid in one or more of several bar codes, d. decoding the bar code symbol in the codes in which it is valid, e. subjecting the next bits in the sequence to a series of tests to determine whether such bits were produced by scanning a bar code symbol which is valid in any of the bar codes in which the previously decoded bar code symbol is valid, f. decoding the bar code symbol in the codes in which it and the previously decoded bar code symbol are valid, and g. repeating steps f. and g. above until all bar code symbols on the label have been decoded.

3. 发明授权

US5144118A Bar code scanning system with multiple decoding microprocessors 失效
标题翻译：具有多重解码微处理器的条形码扫描系统
公开(公告)号：US5144118A
公开(公告)日：1992-09-01
申请号：US488107
申请日：1990-03-05
申请人： Robert J. Actis , Craig D. Cherry , Andrew P. Taussig
发明人： Robert J. Actis , Craig D. Cherry , Andrew P. Taussig
IPC分类号： G06K7/10
CPC分类号： G06K7/10851
摘要： A system for scanning bar code labels and for providing data related thereto includes scanning means for optically scanning bar code labels and providing an electrical, binary scan signal in response thereto. The scanning means includes a scanner and a scanner controller, and an integrated circuit. The integrated circuit includes a converter means, responsive to the scanning means, for translating the electrical, binary scan signal into a related sequence of digital words. The integrated circuit further includes a microprocessor means, responsive to the converter means, for translating the related sequence of digital words into data. The microprocessor means has first and second microprocessor circuits for independently translating the sequence of digital words into data. The microprocessor means also has a random access memory for storing the appropriate software to control operation of the first and second microprocessor circuits.
摘要翻译：用于扫描条形码标签和用于提供与之相关的数据的系统包括扫描装置，用于光学扫描条形码标签并响应于此提供电二进制扫描信号。扫描装置包括扫描仪和扫描仪控制器以及集成电路。集成电路包括响应于扫描装置的转换器装置，用于将电二进制扫描信号转换成数字字的相关序列。集成电路还包括微处理器装置，响应于转换器装置，将相关的数字字序列转换为数据。微处理器装置具有用于将数字字序列独立地转换为数据的第一和第二微处理器电路。微处理器装置还具有用于存储适当软件以控制第一和第二微处理器电路的操作的随机存取存储器。

4. 发明授权

US06327650B1 Pipelined multiprocessing with upstream processor concurrently writing to local register and to register of downstream processor 失效
标题翻译：流水线多处理与上游处理器同时写入本地寄存器并注册下游处理器
公开(公告)号：US06327650B1
公开(公告)日：2001-12-04
申请号：US09248777
申请日：1999-02-12
申请人： Mark V. Bapst , Andrew P. Taussig
发明人： Mark V. Bapst , Andrew P. Taussig
IPC分类号： G06F900
CPC分类号： G06F9/3012 , G06F9/30123 , G06F15/8053
摘要： A multiprocessor system comprises a series of processors arranged to process data in an assembly-line fashion. Each processor includes an executor (execution unit, instruction decoder, and program counter) and a set of registers. Each set of registers is divided into two banks. At any given time, one bank is the “active” bank that is accessible by the local processor, and the other is the “shadow” bank, inaccessible to the local processor. Each processor but the last writes in parallel to its active bank and to the shadow bank of the immediate downstream processor. When all processors have completed working the data in their respective possession, a context-switch is performed switching register banks so that former active banks become shadow banks and former shadow banks become active banks. This makes data that was being processed by an upstream processor virtually immediately available to a local processor. This saves the latency that would be involved in transferring register data after the data is processed. Accordingly, system throughput is improved.
摘要翻译：多处理器系统包括被布置成以装配线方式处理数据的一系列处理器。每个处理器包括执行器（执行单元，指令解码器和程序计数器）和一组寄存器。每组寄存器分为两组。在任何给定的时间，一个银行是本地处理器可访问的“主动”银行，另一个银行是本地处理器无法访问的“影子”银行。每个处理器，但最后写入并行到其活动库和直接下游处理器的影子库。当所有处理器已经完成对其各自拥有的数据的操作时，执行上下文切换以切换注册器组，使得前活动银行变为影子库，并且前影子银行变为活动银行。这使得正在由上游处理器处理的数据实际上立即可用于本地处理器。这节省了处理数据后传送寄存器数据所涉及的延迟。因此，提高了系统吞吐量。

5. 发明授权

US5008518A Data gathering system interface 失效
标题翻译：数据采集系统接口
公开(公告)号：US5008518A
公开(公告)日：1991-04-16
申请号：US328177
申请日：1989-03-24
申请人： Andrew P. Taussig , Blake L. Isaacs
发明人： Andrew P. Taussig , Blake L. Isaacs
IPC分类号： G01G23/00 , A47F9/04 , G01G19/414 , G07G1/00
CPC分类号： G07G1/0054 , A47F9/046 , G01G19/4144
摘要： A data gathering system for use in a checkout counter to determine information relating to products to be purchased and to provide such information to a cash register system includes a scale supported within the checkout counter for determining weights of products presented to the data gathering system. The scale includes a subplatter located below the upper surface of the checkout counter. An optical scanning arrangement is supported on the subplatter for reading coded labels on the products. A common interface circuit is responsive to both the scale and the optical scanning arrangement, for providing weight data and coded label data to the cash register system.

6. 发明授权

US4749879A Signal transition detection method and system 失效
标题翻译：信号转换检测方法及系统
公开(公告)号：US4749879A
公开(公告)日：1988-06-07
申请号：US63538
申请日：1987-06-18
申请人： Donald S. Peterson , Andrew P. Taussig
发明人： Donald S. Peterson , Andrew P. Taussig
IPC分类号： H03K5/1534 , H03K5/08 , H03K5/153
CPC分类号： H03K5/1534
摘要： A system and method are provided for determining the occurrence of transitions in a binary encoded analog input signal. The system includes a threshold circuit, responsive to the input signal, for generating first and second grating signals in dependence upon whether the input signal exceeds or is less than a first threshold level, respectively. A first circuit means, responsive to the input signal, differentiates the input signal to form a first derivative signal. A threshold circuit, responsive to the first derivative signal, generates third and fourth gating signals in dependence upon whether the first derivative signal exceeds a second threshold level or is less than a third threshold level, respectively. A second circuit means, responsive to the first derivative signal, differentiates the first derivative signal to form a second derivative signal. The second derivative signal has zero crossings which are detected by a zero crossing means, responsive to the second derivative signal and to the first, second, third and fourth gating signals.
摘要翻译：提供了一种用于确定二进制编码的模拟输入信号中的转换的发生的系统和方法。该系统包括响应于输入信号的阈值电路，用于分别根据输入信号是否超过或小于第一阈值电平来产生第一和第二光栅信号。响应于输入信号的第一电路装置区分输入信号以形成一阶导数信号。响应于一阶导数信号的阈值电路根据一阶导数信号是否超过第二阈值电平或小于第三阈值电平分别产生第三和第四选通信号。第二电路装置响应于一阶导数信号来区分一阶导数信号以形成二阶导数信号。二阶导数信号具有零交叉，其由过零装置检测，响应于二阶导数信号以及第一，第二，第三和第四选通信号。

7. 发明授权

US5179270A Scanner system interface 失效
标题翻译：扫描仪系统界面
公开(公告)号：US5179270A
公开(公告)日：1993-01-12
申请号：US348861
申请日：1989-05-08
申请人： Andrew P. Taussig , Nicholas N. Tabet , Blake L. Isaacs
发明人： Andrew P. Taussig , Nicholas N. Tabet , Blake L. Isaacs
IPC分类号： G06K7/10 , G06K17/00 , G07G1/00
CPC分类号： G06K7/10851 , G06K17/0022 , G07G1/0045
摘要： An optical scanner for use at a checkout counter determines information relating to products to be purchased, including coded label data. The scanner supplies the information to a cash register system. The scanner includes a scanner controller for reading coded labels on the products. The scanner further includes an interface circuit, mounted in said scanner and receiving power therefrom, for providing coded label data to said cash register system.

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