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1. 发明授权

US07474979B1 Integrated circuit device test system and method 有权
标题翻译：集成电路器件测试系统及方法
公开(公告)号：US07474979B1
公开(公告)日：2009-01-06
申请号：US11643198
申请日：2006-12-20
申请人： Lance Stevens , Virgilio Velasco , Anand Prithivathi , Anthony Schmitz
发明人： Lance Stevens , Virgilio Velasco , Anand Prithivathi , Anthony Schmitz
IPC分类号： G06F15/00
CPC分类号： G05B19/41875 , H01L22/14 , H01L22/20 , H01L22/22 , Y02P90/04 , Y02P90/22
摘要： A method for integrated device testing can include the steps of: receiving wafer test data that identifies wafer test failures with the dice tested while part of a shared common substrate; receiving package test data that identifies test failures for at least a subset of the dice after the dice have been separated and assembled into different packages; identifying non-unique coverage test sets that include at least one wafer test or package test that generates failures that correlates with failures generated by another wafer test or package test for the same dice; and identifying unique coverage tests that include failures generated by wafer tests or package tests that do not correlate with failures generated by any other another wafer test or package test for the same dice.
摘要翻译：用于集成器件测试的方法可以包括以下步骤：接收晶片测试数据，所述晶片测试数据用共享公共衬底的一部分测试的骰子识别晶片测试故障; 接收包裹测试数据，识别骰子被分离并组装成不同包装后，至少骰子子集的测试失败; 识别非唯一的覆盖测试集，其包括至少一个晶片测试或封装测试，其产生与由相同裸片的另一个晶片测试或封装测试所产生的故障相关的故障; 并识别独特的覆盖测试，其中包括与晶片测试或封装测试产生的故障，这些故障与相同骰子的任何其他晶片测试或封装测试所产生的故障无关。

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