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1. 发明授权

US08305878B1 Fast failover recovery for stackable network switches 有权
标题翻译：可堆叠网络交换机的快速故障切换恢复
公开(公告)号：US08305878B1
公开(公告)日：2012-11-06
申请号：US12830649
申请日：2010-07-06
申请人： Nafea Bishara , Tsahi Daniel , Amit Avivi
发明人： Nafea Bishara , Tsahi Daniel , Amit Avivi
IPC分类号： G01R31/08 , G06F11/00 , G08C15/00
CPC分类号： H04L41/0668 , H04L43/00 , H04L45/00 , H04L45/22 , H04L45/28 , H04L45/583
摘要： A network switch including a plurality of stack units and a plurality of links. Each of the stack units includes a port, a plurality of interfaces, and a forwarding engine in communication with the interfaces and the port. Each of the plurality of links connects one of the interfaces of one of the stack units to another one of the interfaces of another one of the stack units. When one of the links is down, a loop flag in a first packet to be transferred by a corresponding one of the interfaces of a corresponding one of the stack units over the one of the links is toggled; and the forwarding engine of the corresponding one of the stack units is configured to transfer the first packet to another one of the interfaces of the corresponding one of the stack units for transfer over a different one of the links.
摘要翻译：一种网络交换机，包括多个堆叠单元和多个链路。每个堆叠单元包括端口，多个接口和与接口和端口通信的转发引擎。多个链接中的每个链接将一个堆叠单元的一个接口连接到另一个堆叠单元的另一个接口。当其中一个链路断开时，切换由一个链路上的相应一个堆叠单元的相应一个接口传送的第一分组中的循环标志; 并且相应的一个堆叠单元的转发引擎被配置为将第一分组传送到相应的一个堆叠单元的另一个接口，以通过不同的一个链路进行传输。

2. 发明申请

US20120044948A1 MULTIPLE CORE NETWORK DEVICE WITH CORE REDUNDANCY 失效
标题翻译：具有核心冗余的多核心网络设备
公开(公告)号：US20120044948A1
公开(公告)日：2012-02-23
申请号：US13214820
申请日：2011-08-22
申请人： Youval NACHUM , Amit AVIVI , Ehud SIVAN
发明人： Youval NACHUM , Amit AVIVI , Ehud SIVAN
IPC分类号： H04L12/56
CPC分类号： H04L12/4641
摘要： An embodiment of a network device includes a plurality of switch cores and a plurality of ports for receiving and transmitting data frames on a network disposed on a single integrated circuit, where switch core is coupled to a subset of the plurality of ports. The network device includes a deactivator configured to selectively deactivate at least a portion of one or more switch cores among the plurality of switch cores on the single integrated circuit, and the network device is configured to forward data frames among the plurality of ports based on a configuration of active portions of the plurality of switch cores. The deactivated portions may include ingress processing pipelines, egress processing pipelines, and/or entire switch cores. The portions of the switch cores to be deactivated may be dynamically be determined based on connectors of the integrated circuit.
摘要翻译：网络设备的实施例包括多个交换机核心和用于在设置在单个集成电路上的网络上接收和发送数据帧的多个端口，其中交换机核心耦合到多个端口的子集。所述网络设备包括：去激活器，被配置为选择性地去激活所述单个集成电路上的所述多个交换机核心中的一个或多个交换机核心的至少一部分，并且所述网络设备被配置为基于所述多个端口中的数据帧转发多个开关芯的有效部分的配置。停用部分可以包括入口处理管线，出口处理管线和/或整个交换机核心。可以基于集成电路的连接器来动态地确定要去激活的交换机核心部分。

3. 发明授权

US07395454B1 Integrated circuit with integrated debugging mechanism for standard interface 有权
标题翻译：集成电路，集成调试机制，用于标准接口
公开(公告)号：US07395454B1
公开(公告)日：2008-07-01
申请号：US11028687
申请日：2005-01-04
申请人： Aron Wohlgemuth , Amir Gabai , Amit Avivi
发明人： Aron Wohlgemuth , Amir Gabai , Amit Avivi
IPC分类号： G06F11/00
CPC分类号： G06F11/273
摘要： A circuit having a corresponding method comprises one or more circuits each to produce one or more status signals, wherein each of the status signals represents a status of a respective one of the one or more circuits; a memory; a memory controller to store a plurality of samples of the one or more status signals in the memory; a plurality of input/output terminals; an interface in communication with one or more of the input/output terminals; and a debug circuit to transfer the one or more samples of the status signals from the memory to the interface.
摘要翻译：具有相应方法的电路包括一个或多个电路以产生一个或多个状态信号，其中每个状态信号表示一个或多个电路中的相应一个的状态; 记忆存储器控制器，用于将所述一个或多个状态信号的多个样本存储在所述存储器中; 多个输入/输出端子; 与所述输入/输出端子中的一个或多个通信的接口; 以及调试电路，用于将状态信号的一个或多个样本从存储器传送到接口。

4. 发明授权

US08301745B1 Remote network device management 有权
标题翻译：远程网络设备管理
公开(公告)号：US08301745B1
公开(公告)日：2012-10-30
申请号：US12633137
申请日：2009-12-08
申请人： Aron Wohlgemuth , Amit Avivi , Yuval Cohen
发明人： Aron Wohlgemuth , Amit Avivi , Yuval Cohen
IPC分类号： G06F15/173 , H04L12/28 , H04L12/56
CPC分类号： G06F15/17375
摘要： An apparatus includes a network port and a switch management processor. The network port receives packets over a network, where the packets include a management packet and a trigger packet. The switch management processor executes a command in selected management packets received over the network when a trigger pattern generated based on the trigger packet matches a bit pattern stored in memory. The bit pattern is stored in the memory during a predetermined period after the management packet is received. The predetermined period is selected based on a desired security level.
摘要翻译：一种装置包括网络端口和交换机管理处理器。网络端口通过网络接收分组，其中分组包括管理分组和触发分组。当基于触发包生成的触发模式与存储在存储器中的位模式匹配时，交换机管理处理器在通过网络接收的所选管理分组中执行命令。在接收到管理分组之后的预定时间段期间，位模式被存储在存储器中。基于期望的安全级别选择预定时段。

5. 发明授权

US07756015B1 Fast failover recovery for stackable network switches 有权
标题翻译：可堆叠网络交换机的快速故障切换恢复
公开(公告)号：US07756015B1
公开(公告)日：2010-07-13
申请号：US11900728
申请日：2007-09-13
申请人： Nafea Bishara , Tsahi Daniel , Amit Avivi
发明人： Nafea Bishara , Tsahi Daniel , Amit Avivi
IPC分类号： G01R31/08
CPC分类号： H04L41/0668 , H04L43/00 , H04L45/00 , H04L45/22 , H04L45/28 , H04L45/583
摘要： A stack unit for a stackable network switch, the stack unit having corresponding methods and computer programs, comprises a network port to exchange packets with a network; two stacking interfaces each to exchange the packets over a respective stacking link with another stack unit, wherein each stacking interface is assigned to the other stacking interface as an alternate stacking interface; and a forwarding engine to transfer the packets among the stacking interfaces and network port; wherein when one of the stacking links is down, the respective stacking interface toggles a loop flag in each packet received from the forwarding engine, and returns each received packet to the forwarding engine; and wherein the forwarding engine transfers each packet received from one of the stacking interfaces to the respective alternate stacking interface when the loop flag for the packet is set.
摘要翻译：用于可堆叠网络交换机的堆叠单元，具有相应方法和计算机程序的堆栈单元包括用于与网络交换分组的网络端口; 两个堆叠接口各自通过相应的堆叠链路与另一个堆叠单元进行交换，其中每个堆叠接口被分配给另一个堆叠接口作为备用堆叠接口; 以及转发引擎，在堆叠接口和网络端口之间传输数据包; 其中当所述堆叠链路之一关闭时，相应的堆叠接口切换从所述转发引擎接收的每个分组中的循环标志，并将每个接收的分组返回给所述转发引擎; 并且其中当所述分组的循环标志被设置时，所述转发引擎将从堆叠接口之一接收的每个分组传送到相应的备用堆叠接口。

6. 再颁专利

USRE44777E1 System and method for encoding data transmitted on a bus 有权
标题翻译：用于对在总线上传输的数据进行编码的系统和方法
公开(公告)号：USRE44777E1
公开(公告)日：2014-02-25
申请号：US13558734
申请日：2012-07-26
申请人： Amit Avivi , Aron Wohlgemuth
发明人： Amit Avivi , Aron Wohlgemuth
IPC分类号： H04K1/00 , H04L9/00
CPC分类号： H04L9/065 , G06F21/85 , H04L9/0894 , H04L9/14
摘要： An apparatus having a corresponding method comprises a transmit circuit to transmit data, the transmit circuit comprising a transmit input circuit to input the data, and an address for the data, to the transmit circuit, an encoder to encode the data according to the address for the data, comprising an encode select circuit to select one of a plurality of keys based on the address for the data, and an encoding circuit to encode the data using the key selected by the encode select circuit, and a transmit output circuit to output the encoded data.
摘要翻译：具有相应方法的装置包括发送电路以发送数据，所述发送电路包括用于输入数据的发送输入电路和数据的地址给发送电路，编码器根据用于所述数据包括基于所述数据的地址来选择多个键中的一个的编码选择电路，以及使用由所述编码选择电路选择的键对所述数据进行编码的编码电路，以及发送输出电路，编码数据。

7. 发明授权

US07764792B1 System and method for encoding data transmitted on a bus 有权
标题翻译：用于对在总线上传输的数据进行编码的系统和方法
公开(公告)号：US07764792B1
公开(公告)日：2010-07-27
申请号：US11034664
申请日：2005-01-13
申请人： Amit Avivi , Aron Wohlgemuth
发明人： Amit Avivi , Aron Wohlgemuth
IPC分类号： H04K1/00 , H04L9/00
CPC分类号： H04L9/065 , G06F21/85 , H04L9/0894 , H04L9/14
摘要： An apparatus having a corresponding method comprises a transmit circuit to transmit data, the transmit circuit comprising a transmit input circuit to input the data, and an address for the data, to the transmit circuit, an encoder to encode the data according to the address for the data, comprising an encode select circuit to select one of a plurality of keys based on the address for the data, and an encoding circuit to encode the data using the key selected by the encode select circuit, and a transmit output circuit to output the encoded data.
摘要翻译：具有相应方法的装置包括发送电路以发送数据，所述发送电路包括用于输入数据的发送输入电路和数据的地址给发送电路，编码器根据用于所述数据包括基于所述数据的地址来选择多个键中的一个的编码选择电路，以及使用由所述编码选择电路选择的键对所述数据进行编码的编码电路，以及发送输出电路，编码数据。

8. 发明授权

US07644147B1 Remote network device management 有权
标题翻译：远程网络设备管理
公开(公告)号：US07644147B1
公开(公告)日：2010-01-05
申请号：US11090418
申请日：2005-03-25
申请人： Aron Wohlgemuth , Amit Avivi , Yuval Cohen
发明人： Aron Wohlgemuth , Amit Avivi , Yuval Cohen
IPC分类号： G06F15/173
CPC分类号： G06F15/17375
摘要： An apparatus having a corresponding method comprises a memory; a plurality of ports comprising one or more network ports to send and receive data packets and to receive management packets, wherein each of the management packets comprises one or more commands, and wherein the commands comprise one or more of the group consisting of a command to read data from the memory, and a command to write data to the memory, and a central processing unit (CPU) port to transmit packets addressed to a CPU; a forwarding engine to transfer the data packets between the ports according to a forwarding table stored in the memory; a protocol unit to identify the management packets; and a management unit to execute the commands; wherein the management packets bypass the CPU port.
摘要翻译：具有相应方法的装置包括存储器; 多个端口，包括一个或多个网络端口以发送和接收数据分组并接收管理分组，其中每个管理分组包括一个或多个命令，并且其中所述命令包括以下组中的一个或多个：从存储器读取数据，以及向存储器写入数据的命令，以及中央处理单元（CPU）端口，用于传送寻址到CPU的数据包; 转发引擎，根据存储在存储器中的转发表，在端口之间传送数据包; 用于识别管理分组的协议单元; 以及执行命令的管理单元; 其中管理分组绕过CPU端口。

9. 发明授权

US08630287B2 Multiple core network device with core redundancy 失效
标题翻译：具有核心冗余的多核心网络设备
公开(公告)号：US08630287B2
公开(公告)日：2014-01-14
申请号：US13214820
申请日：2011-08-22
申请人： Youval Nachum , Amit Avivi , Ehud Sivan
发明人： Youval Nachum , Amit Avivi , Ehud Sivan
IPC分类号： H04L12/50
CPC分类号： H04L12/4641
摘要： An embodiment of a network device includes a plurality of switch cores and a plurality of ports for receiving and transmitting data frames on a network disposed on a single integrated circuit, where switch core is coupled to a subset of the plurality of ports. The network device includes a deactivator configured to selectively deactivate at least a portion of one or more switch cores among the plurality of switch cores on the single integrated circuit, and the network device is configured to forward data frames among the plurality of ports based on a configuration of active portions of the plurality of switch cores. The deactivated portions may include ingress processing pipelines, egress processing pipelines, and/or entire switch cores. The portions of the switch cores to be deactivated may be dynamically be determined based on connectors of the integrated circuit.
摘要翻译：网络设备的实施例包括多个交换机核心和用于在设置在单个集成电路上的网络上接收和发送数据帧的多个端口，其中交换机核心耦合到多个端口的子集。所述网络设备包括：去激活器，被配置为选择性地去激活所述单个集成电路上的所述多个交换机核心中的一个或多个交换机核心的至少一部分，并且所述网络设备被配置为基于所述多个端口中的数据帧转发多个开关芯的有效部分的配置。停用部分可以包括入口处理管线，出口处理管线和/或整个交换机核心。可以基于集成电路的连接器来动态地确定要去激活的交换机核心部分。

10. 发明授权

US08176388B1 System and method for soft error scrubbing 有权
标题翻译：用于软错误擦除的系统和方法
公开(公告)号：US08176388B1
公开(公告)日：2012-05-08
申请号：US12142590
申请日：2008-06-19
申请人： Michael Moshe , Yosef Solt , Amit Avivi , Aron Wohlgemuth
发明人： Michael Moshe , Yosef Solt , Amit Avivi , Aron Wohlgemuth
IPC分类号： G11C29/00
CPC分类号： G11C29/52 , G06F11/106 , G11C8/16 , G11C2029/0409
摘要： A data processing system includes a memory configured to store data in a plurality of addressable storage spaces thereof, wherein the memory includes a first data port and a second data port, a first functional block configured to access the memory via the first data port to perform a logic operation, and a second functional block configured to access the memory via the second data port to perform soft error scrubbing in the data stored in the memory.
摘要翻译：数据处理系统包括被配置为将数据存储在其多个可寻址存储空间中的存储器，其中存储器包括第一数据端口和第二数据端口，第一功能块被配置为经由第一数据端口访问存储器以执行逻辑操作和第二功能块，被配置为经由第二数据端口访问存储器，以对存储在存储器中的数据执行软错误擦除。

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