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    • 1. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07932567B2
    • 2011-04-26
    • US12389897
    • 2009-02-20
    • Akira MizumuraHiroaki AmmoTetsuya Oishi
    • Akira MizumuraHiroaki AmmoTetsuya Oishi
    • H01L27/088
    • H01L21/845H01L21/823431H01L27/0207H01L27/088H01L27/0886H01L27/1203H01L29/66795H01L29/785
    • Disclosed herein is a semiconductor device including: first and second transistors, each of the first and second transistors being formed with a plurality of fin transistors, and the first and second transistors being connected in parallel to electrically share a source, wherein the plurality of fin transistors each include a fin activation layer, the fin activation layer protruding from a semiconductor substrate, a source layer serving as the source being formed on one end, and a drain layer on the other end of the fin activation layer so as to form a channel region, the fin activation layers are arranged adjacent to each other in parallel, and the drain layers are disposed so that the currents flow through the plurality of fin transistors in opposite directions between the first and second transistors.
    • 本文公开了一种半导体器件,包括:第一和第二晶体管,第一和第二晶体管中的每一个形成有多个鳍式晶体管,并且第一和第二晶体管并联连接以电共享源,其中多个鳍 晶体管各自包括翅片激活层,鳍状物活化层从半导体衬底突出,用作源的源极一端形成,并且在鳍激活层的另一端上形成漏极层,以形成沟道 翅片激活层平行地彼此相邻布置,并且设置漏极层使得电流在第一和第二晶体管之间沿相反方向流过多个鳍式晶体管。
    • 3. 发明申请
    • SEMICONDUCTOR DEVICE
    • 半导体器件
    • US20090230483A1
    • 2009-09-17
    • US12389897
    • 2009-02-20
    • Akira MizumuraHiroaki AmmoTetsuya Oishi
    • Akira MizumuraHiroaki AmmoTetsuya Oishi
    • H01L27/088
    • H01L21/845H01L21/823431H01L27/0207H01L27/088H01L27/0886H01L27/1203H01L29/66795H01L29/785
    • Disclosed herein is a semiconductor device including: first and second transistors, each of the first and second transistors being formed with a plurality of fin transistors, and the first and second transistors being connected in parallel to electrically share a source, wherein the plurality of fin transistors each include a fin activation layer, the fin activation layer protruding from a semiconductor substrate, a source layer serving as the source being formed on one end, and a drain layer on the other end of the fin activation layer so as to form a channel region, the fin activation layers are arranged adjacent to each other in parallel, and the drain layers are disposed so that the currents flow through the plurality of fin transistors in opposite directions between the first and second transistors.
    • 本文公开了一种半导体器件,包括:第一和第二晶体管,第一和第二晶体管中的每一个形成有多个鳍式晶体管,并且第一和第二晶体管并联连接以电共享源,其中多个鳍 晶体管各自包括翅片激活层,鳍状物活化层从半导体衬底突出,用作源的源极一端形成,并且在鳍激活层的另一端上形成漏极层,以形成沟道 翅片激活层平行地彼此相邻布置,并且设置漏极层使得电流在第一和第二晶体管之间沿相反方向流过多个鳍式晶体管。
    • 4. 发明授权
    • Semiconductor device
    • 半导体器件
    • US08178933B2
    • 2012-05-15
    • US13039684
    • 2011-03-03
    • Akira MizumuraHiroaki AmmoTetsuya Oishi
    • Akira MizumuraHiroaki AmmoTetsuya Oishi
    • H01L27/088
    • H01L21/845H01L21/823431H01L27/0207H01L27/088H01L27/0886H01L27/1203H01L29/66795H01L29/785
    • A semiconductor device including first and second transistors, each of the first and second transistors being formed with a plurality of fin transistors, and the first and second transistors being connected in parallel to electrically share a source, wherein the plurality of fin transistors each include a fin activation layer, the fin activation layer protruding from a semiconductor substrate, a source layer serving as the source being formed on one end, and a drain layer on the other end of the fin activation layer so as to form a channel region, the fin activation layers are arranged adjacent to each other in parallel, and the drain layers are disposed so that the currents flow through the plurality of fin transistors in opposite directions between the first and second transistors.
    • 一种包括第一和第二晶体管的半导体器件,第一和第二晶体管中的每一个形成有多个鳍式晶体管,并且第一和第二晶体管并联连接以电共享源,其中多个鳍式晶体管每个包括 翅片活化层,从半导体衬底突出的翅片活化层,在一端形成源极的源极层和翅片活化层的另一端的漏极层,以形成沟道区域,鳍状物 激活层平行地彼此相邻布置,并且漏极层被布置成使得电流在第一和第二晶体管之间沿相反方向流过多个鳍式晶体管。
    • 5. 发明申请
    • SEMICONDUCTOR DEVICE
    • 半导体器件
    • US20110186932A1
    • 2011-08-04
    • US13039684
    • 2011-03-03
    • Akira MizumuraHiroaki AmmoTetsuya Oishi
    • Akira MizumuraHiroaki AmmoTetsuya Oishi
    • H01L27/088
    • H01L21/845H01L21/823431H01L27/0207H01L27/088H01L27/0886H01L27/1203H01L29/66795H01L29/785
    • A semiconductor device including first and second transistors, each of the first and second transistors being formed with a plurality of fin transistors, and the first and second transistors being connected in parallel to electrically share a source, wherein the plurality of fin transistors each include a fin activation layer, the fin activation layer protruding from a semiconductor substrate, a source layer serving as the source being formed on one end, and a drain layer on the other end of the fin activation layer so as to form a channel region, the fin activation layers are arranged adjacent to each other in parallel, and the drain layers are disposed so that the currents flow through the plurality of fin transistors in opposite directions between the first and second transistors.
    • 一种包括第一和第二晶体管的半导体器件,第一和第二晶体管中的每一个形成有多个鳍式晶体管,并且第一和第二晶体管并联连接以电共享源,其中多个鳍式晶体管每个包括 翅片活化层,从半导体衬底突出的翅片活化层,在一端形成源极的源极层和翅片活化层的另一端的漏极层,以形成沟道区域,鳍状物 激活层平行地彼此相邻布置,并且漏极层被布置成使得电流在第一和第二晶体管之间沿相反方向流过多个鳍式晶体管。