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    • 1. 发明授权
    • Organic thin film transistor array panel and manufacturing method thereof
    • 有机薄膜晶体管阵列面板及其制造方法
    • US07259392B2
    • 2007-08-21
    • US11186233
    • 2005-07-20
    • Bo-Sung KimMin-Seong RyuMun-Pyo Hong
    • Bo-Sung KimMin-Seong RyuMun-Pyo Hong
    • H01L51/40
    • H01L27/283H01L27/3244
    • A method of manufacturing a thin film transistor array panel is provided, the method includes: a substrate; a data line disposed on the substrate; an interlayer insulating layer disposed on the data line; a gate line disposed on the interlayer insulating layer and including a gate electrode; a gate insulating layer disposed on the gate line and the interlayer insulating layer, the gate insulating layer and the interlayer insulating film having a contact hole exposing the data line; a first electrode disposed on the gate insulating layer and connected to the data line through the contact hole; a second electrode disposed opposite the first electrode with respect to the gate electrode; an organic semiconductor disposed on the first and the second electrodes and contacting the first and the second electrodes; and a passivation member disposed on the organic semiconductor.
    • 提供一种制造薄膜晶体管阵列面板的方法,所述方法包括:基板; 设置在所述基板上的数据线; 设置在所述数据线上的层间绝缘层; 设置在所述层间绝缘层上并包括栅电极的栅极线; 设置在所述栅极线和所述层间绝缘层上的栅极绝缘层,所述栅极绝缘层和所述层间绝缘膜具有暴露所述数据线的接触孔; 第一电极,设置在所述栅极绝缘层上并通过所述接触孔连接到所述数据线; 相对于所述栅电极与所述第一电极相对设置的第二电极; 布置在第一和第二电极上并与第一和第二电极接触的有机半导体; 以及设置在所述有机半导体上的钝化部件。
    • 2. 发明授权
    • Shape priors for level set representations
    • 形成级别表示的先验
    • US07177471B2
    • 2007-02-13
    • US10356093
    • 2003-01-31
    • Nikolaos ParaglosMikael Rousson
    • Nikolaos ParaglosMikael Rousson
    • G06K9/46
    • G06K9/00362G06K9/48G06K9/6206G06T7/12G06T7/149
    • This invention relates to shape priors for level set representations. An embodiment of the invention comprises a first stage and a second stage. In the first stage, a shape model can be built directly on level set space using a collection of samples. The shape model can be constructed using a variational framework to create a non-stationary pixel-wise model that accounts for shape variabilities. Then, in the second stage, the shape model can be used as basis to introduce the shape prior in an energetic form. In terms of level set representations, the shape prior aims at minimizing non-stationary distance between the evolving interface and the shape model. An embodiment according to the present invention can be integrated with an existing, data-driven variational method to perform image segmentation for physically corrupted and incomplete data.
    • 本发明涉及水平集表示的形状先验。 本发明的实施例包括第一阶段和第二阶段。 在第一阶段,可以使用样本集合直接在级别集空间上构建形状模型。 可以使用变分框架来构建形状模型,以创建考虑到形状变异性的非平稳像素模型。 然后,在第二阶段中,形状模型可以用作以能量形式引入形状的基础。 在水平集表示方面,先前的形状旨在最小化不断变化的界面和形状模型之间的非固定距离。 根据本发明的实施例可以与现有的数据驱动变分方法集成,以对物理损坏和不完整的数据执行图像分割。
    • 6. 发明授权
    • Erase voltage generator circuit for providing uniform erase execution time and nonvolatile memory device having the same
    • 擦除电压发生器电路以提供均匀的擦除执行时间,并具有相同的非易失性存储器件
    • US07382663B2
    • 2008-06-03
    • US11567895
    • 2006-12-07
    • Dae-Sik ParkJin-Yub Lee
    • Dae-Sik ParkJin-Yub Lee
    • G11C11/34
    • G11C16/30G11C16/16
    • An erase voltage generation circuit providing a uniform erase execution time and a non-volatile semiconductor memory device having the same, in which the erase voltage generation circuit includes a high voltage generation unit, a voltage level detection unit, an execution time checking unit and a discharging unit. The high voltage generation unit generates an erase voltage. The voltage level detection unit detects the erase voltage and generates a level detection signal. The level detection signal is activated when the erase voltage reaches a target voltage. The execution time checking unit generates an execution end signal that is activated in response to the lapse of an erase execution time from the activation of the level detection signal. The discharging unit discharges the erase voltage as a discharge voltage. The high voltage generation unit is disabled in response to the activation of the execution end signal, and the discharging unit is enabled in response to the activation of the execution end signal.
    • 提供均匀擦除执行时间的擦除电压产生电路和具有该擦除执行时间的非易失性半导体存储器件,其中擦除电压产生电路包括高电压产生单元,电压电平检测单元,执行时间检查单元和 放电单元 高电压产生单元产生擦除电压。 电压电平检测单元检测擦除电压并产生电平检测信号。 当擦除电压达到目标电压时,电平检测信号被激活。 执行时间检查单元生成响应于从电平检测信号的激活而经过擦除执行时间而被激活的执行结束信号。 放电单元将擦除电压作为放电电压放电。 响应于执行结束信号的激活,高电压生成单元被禁用,并且放电单元响应于执行结束信号的激活而被使能。
    • 7. 发明授权
    • Integrated image registration for cardiac magnetic resonance perfusion data
    • 用于心脏磁共振灌注数据的集成图像配准
    • US07127093B2
    • 2006-10-24
    • US10263867
    • 2002-10-03
    • Ravi BansalGareth Funka-Lea
    • Ravi BansalGareth Funka-Lea
    • G06K9/00
    • G06T7/35G06T7/337
    • A system and method for integrated image registration of cardiac magnetic resonance perfusion data are provided, where the system includes an estimation unit for estimating an edge parameter, a registration unit in signal communication with the estimation unit for registering the edge parameter in correspondence with a template-match between pixels in a first input image and pixels in a second input image, and a CPU in signal communication with said estimation unit and said registration unit for detecting a changed pixel location in accordance with said registration when the entropy of said second image is increased; and where the corresponding method for integrated image registration is of cardiac magnetic resonance perfusion data includes providing a contoured region of interest on a first image having a plurality of pixels, receiving a second image corresponding to a time other than that of said first image, calculating pixel intensities for the second image, estimating edge parameters for at least one of said first and second images, calculating a template-match between said first and second images, selecting a pair of pixel locations from at least one of said first and second images in accordance with said template-match, registering the estimated edge parameters in correspondence with said calculated template-match for a pair of pixel values at said selected locations in said first image and a pair of pixel values at said selected locations in said second image, and detecting a changed pixel location in accordance with said registration.
    • 提供了一种用于心脏磁共振灌注数据的集成图像配准的系统和方法,其中系统包括用于估计边缘参数的估计单元,与估计单元进行信号通信的注册单元,用于与模板对应地注册边缘参数 - 在第一输入图像中的像素和第二输入图像中的像素之间进行匹配;以及CPU,与所述估计单元和所述注册单元进行信号通信,用于当所述第二图像的熵是所述注册时根据所述注册检测改变的像素位置 增加; 并且其中用于集成图像配准的相应方法是心脏磁共振灌注数据包括在具有多个像素的第一图像上提供感兴趣区域,接收对应于除了所述第一图像之外的时间的第二图像,计算 估计第二图像的像素强度,估计所述第一和第二图像中的至少一个图像的边缘参数,计算所述第一和第二图像之间的模板匹配,从所述第一和第二图像中的至少一个图像中选择一对像素位置 根据所述模板匹配,将所估计的边缘参数与所述计算的模板匹配对应于所述第一图像中的所述选定位置处的一对像素值和所述第二图像中所述选定位置处的一对像素值,以及 根据所述注册检测改变的像素位置。