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1. 发明申请

US20180277289A1 Inverse Phase Allotrope Rare Earth Magnets 审中-公开
公开(公告)号：US20180277289A1
公开(公告)日：2018-09-27
申请号：US15782062
申请日：2017-10-12
申请人： Intermolecular, Inc.
发明人： Abraham Anapolsky
IPC分类号： H01F1/055 , H01F1/11 , H01F1/09 , H01F41/22 , H01F41/02
CPC分类号： H01F1/0551 , H01F1/0556 , H01F1/09 , H01F1/11 , H01F41/0266 , H01F41/22
摘要： Provided are inverse phase allotrope rare earth (IPARE) magnets, methods of forming thereof, and applications of IPARE magnets. Unlike conventional samarium-cobalt magnets, IPARE magnets maintain their hexagonal lattice structures over a range of equiatomic compositions, such as when concentrations of different elements are within 10 atomic % of each other. An IPARE magnet may comprise cobalt, iron, copper, nickel, and samarium and a concentration of cobalt may be between 17-27 atomic %. An IPARE magnet may be substantially free from zirconium and/or titanium. An IPARE magnet may be formed by quenching a molten mixture of its components. The quenching may be performed in a magnetic field. After quenching, the IPARE magnet may be machined. Furthermore, IPARE magnets may be used as a structural element, e.g. in an electric motor.

2. 发明申请

US20170104031A1 Selector Elements 审中-公开
公开(公告)号：US20170104031A1
公开(公告)日：2017-04-13
申请号：US15287091
申请日：2016-10-06
申请人： Intermolecular, Inc.
发明人： Mark Clark , Prashant Phatak , Charlene Chen , Ashish Bodke , Salil Mujumdar , Federico Nardi , Satbir Kahlon , Sergey V. Barabash , Feihu Wang
IPC分类号： H01L27/24 , G11C11/16 , G11C13/00 , H01L45/00 , H01L27/22
CPC分类号： G11C11/1659 , G11C13/003 , G11C2213/53 , G11C2213/72 , G11C2213/76 , H01L27/224 , H01L27/2409 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/143 , H01L45/144
摘要： Provided are selector elements with active components comprising insulating matrices and mobile ions disposed within these insulating matrices. Also provided are methods of operating such selector elements. The insulating matrices and mobile ions may be formed from different combinations of materials. For example, the insulating matrix may comprise amorphous silicon or silicon oxide, while mobile ions may be silver ions. In another example, the active component comprises copper and germanium, selenium, or tellerium, e.g., Se61Cu39, Se67Cu33, or Se56Cu44. The active component may be a multilayered structure with a variable composition throughout the structure. For example, the concentration of mobile ions may be higher in a center of the structure, away from the electrode interfaces. In some embodiments, outer layers may be formed from Ge33Se24Cu47, while the middle layer may be formed from Ge47Se29Cu24.

3. 发明授权

US09607904B2 Atomic layer deposition of HfAlC as a metal gate workfunction material in MOS devices 有权
公开(公告)号：US09607904B2
公开(公告)日：2017-03-28
申请号：US14094691
申请日：2013-12-02
申请人： Intermolecular Inc. , GLOBALFOUNDRIES, Inc.
发明人： Albert Sanghyup Lee , Paul Besser , Kisik Choi , Edward L Haywood , Hoon Kim , Salil Mujumdar
IPC分类号： H01L21/28 , H01L21/66 , H01L29/49 , H01L29/51 , H01L29/66 , H01L29/94
CPC分类号： H01L22/10 , H01L21/28088 , H01L21/28158 , H01L21/28194 , H01L22/12 , H01L22/14 , H01L22/20 , H01L29/4966 , H01L29/517 , H01L29/665 , H01L29/6659 , H01L29/94
摘要： ALD of HfxAlyCz films using hafnium chloride (HfCl4) and Trimethylaluminum (TMA) precursors can be combined with post-deposition anneal processes and ALD liners to control the device characteristics in high-k metal-gate devices. Variation of the HfCl4 pulse time allows for control of the Al % incorporation in the HfxAlyCz film in the range of 10-13%. Combinatorial process tools can be employed for rapid electrical and materials characterization of various materials stacks. The effective work function (EWF) in metal oxide semiconductor capacitor (MOSCAP) devices with the HfxAlyCz work function layer coupled with ALD deposited HfO2 high-k gate dielectric layers was quantified to be mid-gap at ˜4.6 eV. Thus, HfxAlyCz is a promising metal gate work function material allowing for the tuning of device threshold voltages (Vth) for anticipated multi-Vth integrated circuit (IC) devices.

4. 发明授权

US09543516B2 Method for forming a doped metal oxide for use in resistive switching memory elements 有权
标题翻译：用于形成用于电阻式开关存储元件的掺杂金属氧化物的方法
公开(公告)号：US09543516B2
公开(公告)日：2017-01-10
申请号：US14317255
申请日：2014-06-27
申请人： Intermolecular Inc. , Kabushiki Kaisha Toshiba , SanDisk 3D LLC
发明人： Jinhong Tong , Randall Higuchi , Imran Hashim , Vidyut Gopal
IPC分类号： H01L45/00
CPC分类号： H01L45/1608 , H01L45/04 , H01L45/146 , H01L45/1616 , H01L45/1633 , H01L45/1658
摘要： Methods for producing RRAM resistive switching elements having reduced forming voltage include doping to create oxygen deficiencies in the dielectric film. Oxygen deficiencies in a dielectric film promote formation of conductive pathways.
摘要翻译：制造具有降低的成形电压的RRAM电阻式开关元件的方法包括掺杂以在电介质膜中产生氧缺陷。电介质膜中的氧缺乏促进导电通路的形成。

5. 发明申请

US20160304815A1 METHODS AND CHEMICAL SOLUTIONS FOR CLEANING PHOTOMASKS USING QUATERNARY AMMONIUM HYDROXIDES 审中-公开
标题翻译：使用季铵羟基清洗光敏剂的方法和化学解决方案
公开(公告)号：US20160304815A1
公开(公告)日：2016-10-20
申请号：US15132480
申请日：2016-04-19
申请人： Intermolecular, Inc. , Samsung Electronics Co., Ltd.
发明人： Jeffrey Lowe , Kim Van Berkel , Jae-Hyuck Choi
IPC分类号： C11D3/30 , B08B3/10 , C11D3/28 , B08B3/08 , G03F1/82 , G03F1/22
CPC分类号： C11D3/30 , C11D3/28 , C11D3/32 , G03F1/82 , G03F7/425
摘要： Embodiments provided herein describe methods and chemical solutions for cleaning photomasks. A photomask is provided. The photomask is exposed to a chemical solution. The chemical solution includes a quaternary ammonium hydroxide.The quaternary ammonium hydroxide may include at least one of tetraethyl ammonium hydroxide (TEAH), tetrapropyl ammonium hydroxide (TPAH), or a combination thereof. The photomask may be an extreme ultraviolet (EUV) lithography photomask.
摘要翻译：季铵氢氧化物可以包括四乙基氢氧化铵（TEAH），四丙基氢氧化铵（TPAH）或其组合中的至少一种。光掩模可以是极紫外（EUV）光刻光掩模。

6. 发明授权

US09441119B2 Sol-gel transition control of coatings by addition of solidifiers for conformal coatings on textured glass 有权
标题翻译：通过在纹理化玻璃上添加用于保形涂层的凝固剂的涂层的溶胶 - 凝胶过渡控制
公开(公告)号：US09441119B2
公开(公告)日：2016-09-13
申请号：US13072860
申请日：2011-03-28
申请人： Nikhil D. Kalyankar , Nitin Kumar , Zhi-Wen Sun
发明人： Nikhil D. Kalyankar , Nitin Kumar , Zhi-Wen Sun
IPC分类号： C08L71/02 , C08L1/28 , C08L83/02 , C09D7/12 , B82Y30/00 , C03C1/00 , C03C17/02 , C23C18/12 , C09D1/00 , C09D5/00 , C08K5/00 , C08L1/02
CPC分类号： C09D7/1266 , B82Y30/00 , C03C1/008 , C03C17/02 , C03C2203/30 , C03C2204/08 , C03C2218/113 , C08K5/0008 , C08L1/02 , C08L1/284 , C08L71/02 , C08L2201/00 , C09D1/00 , C09D5/00 , C09D7/65 , C09D7/67 , C23C18/122 , C23C18/1245 , C23C18/1254 , C23C18/1295
摘要： Embodiments of the invention generally relate to methods and compositions for forming conformal coatings on textured substrates. More specifically, embodiments of the invention generally relate to sol-gel processes and sol-gel compositions for forming low refractive index conformal coatings on textured transparent substrates. In one embodiment a method of forming a conformal coating on a textured glass substrate is provided. The method comprises coating the textured glass substrate with a sol-gel composition comprising a solidifier. It is believed that use of the solidifier expedites the sol-gel transition point of the sol-gel composition leading to more conformal deposition of coatings on textured substrates.
摘要翻译：本发明的实施方案一般涉及在纹理化基底上形成保形涂层的方法和组合物。更具体地，本发明的实施方案一般涉及在纹理透明基底上形成低折射率共形涂层的溶胶 - 凝胶法和溶胶 - 凝胶组合物。在一个实施例中，提供了在纹理化玻璃基板上形成共形涂层的方法。该方法包括用包含固化剂的溶胶 - 凝胶组合物涂覆织构化的玻璃基底。据信，使用固化剂可加速溶胶 - 凝胶组合物的溶胶 - 凝胶转变点，从而导致涂层在纹理化基材上的更为适形的沉积。

7. 发明授权

US09425376B2 Plasma cleaning of superconducting layers 有权
公开(公告)号：US09425376B2
公开(公告)日：2016-08-23
申请号：US14138672
申请日：2013-12-23
申请人： Intermolecular Inc.
发明人： Frank Greer , Andy Steinbach
IPC分类号： H01L39/24
CPC分类号： H01L39/2493
摘要： In a “window-junction” formation process for Josephson junction fabrication, a spacer dielectric is formed over the first superconducting electrode layer, then an opening (the “window” is formed to expose the part of the electrode layer to be used for the junction. In an atomic layer deposition (ALD) chamber (or multi-chamber sealed system) equipped with direct or remote plasma capability, the exposed part of the electrode is sputter-etched with Ar, H2, or a combination to remove native oxides, etch residues, and other contaminants. Optionally, an O2 or O3 pre-clean may precede the sputter etch. When the electrode is clean, the tunnel barrier layer is deposited by ALD in-situ without further oxidant exposure.

8. 发明授权

US09418865B2 Wet etching of silicon containing antireflective coatings 有权
标题翻译：含硅抗反射涂层的湿蚀刻
公开(公告)号：US09418865B2
公开(公告)日：2016-08-16
申请号：US14140737
申请日：2013-12-26
申请人： Intermolecular Inc. , International Business Machines Corporation
发明人： Gregory Nowling , John Fitzsimmons
IPC分类号： H01L21/311
CPC分类号： H01L21/31111 , H01L21/31133 , H01L21/67086
摘要： Provided are methods for processing semiconductor substrates or, more specifically, etching silicon containing antireflective coatings (SiARCs) from the substrates while preserving silicon oxides layers disposed on the same substrates. An etching solution including sulfuric acid and hydrofluoric acid may be used for these purposes. In some embodiments, the weight ratio of sulfuric acid to hydrofluoric acid in the etching solution is between about 15:1 and 100:1 (e.g., about 60:1). The temperature of the etching solution may be between about 30° C. and 50° C. (e.g., about 40° C., during etching). It has been found that such processing conditions provide a SiARC etching rate of at least about 50 nanometers per minute and selectivity of SiARC over silicon oxide of greater than about 10:1 or even greater than about 50:1. The same etching solution may be also used to remove photoresist, organic dielectric, and titanium nitride.
摘要翻译：提供了用于处理半导体衬底的方法，或者更具体地，从衬底中蚀刻含硅抗反射涂层（SiARCs），同时保留设置在相同衬底上的氧化硅层。包括硫酸和氢氟酸的蚀刻溶液可以用于这些目的。在一些实施方案中，蚀刻溶液中硫酸与氢氟酸的重量比为约15:1至100:1（例如约60:1）。蚀刻溶液的温度可以在约30℃至50℃之间（例如在蚀刻期间约为40℃）。已经发现，这样的处理条件提供至少约50纳米每分钟的SiARC蚀刻速率，SiARC相对于氧化硅的选择性大于约10:1或甚至大于约50:1。也可以使用相同的蚀刻溶液去除光致抗蚀剂，有机电介质和氮化钛。

9. 发明授权

US09405046B2 High solar gain low-e panel and method for forming the same 有权
标题翻译：高太阳能增益低e板及其形成方法
公开(公告)号：US09405046B2
公开(公告)日：2016-08-02
申请号：US13799100
申请日：2013-03-13
申请人： Intermolecular Inc.
发明人： Guowen Ding , Jeremy Cheng , Minh Huu Le , Daniel Schweigert , Zhi-Wen Sun , Guizhen Zhang
IPC分类号： F21V9/04 , F21V9/06 , G02B5/08 , G02B5/20 , C03C17/36 , G02B5/28
CPC分类号： G02B5/208 , C03C17/36 , C03C17/3644 , C03C17/366 , G02B5/281
摘要： Embodiments provided herein describe low-e panels and methods for forming low-e panels. A transparent substrate is provided. A reflective layer is formed above the transparent substrate. An over-coating layer is formed above the reflective layer. The over-coating layer includes first, second, and third sub-layers. The second sub-layer is between the first and third sub-layers, and the first and third sub-layers include the same material.
摘要翻译：本文提供的实施例描述了用于形成低e板的低e板和方法。提供透明基板。在透明基板的上方形成反射层。在反射层上方形成覆盖层。覆盖层包括第一，第二和第三子层。第二子层位于第一和第三子层之间，第一和第三子层包括相同的材料。

10. 发明授权

US09397141B2 Current selector for non-volatile memory in a cross bar array based on defect and band engineering metal-dielectric-metal stacks 有权
标题翻译：基于缺陷和带工程金属 - 电介质金属叠层的交叉条阵列中的非易失性存储器的当前选择器
公开(公告)号：US09397141B2
公开(公告)日：2016-07-19
申请号：US14294519
申请日：2014-06-03
申请人： Intermolecular, Inc.
发明人： Imran Hashim , Venkat Ananthan , Tony P. Chiang , Prashant B. Phatak
IPC分类号： H01L45/00 , H01L47/00 , H01L27/24 , H01L29/872
CPC分类号： H01L27/2418 , H01L27/2409 , H01L29/872 , H01L45/10
摘要： Selector devices that can be suitable for memory device applications can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and high leakage currents at high voltages to minimize voltage drops during device switching. In some embodiments, the selector device can include a first electrode, a tri-layer dielectric layer, and a second electrode. The tri-layer dielectric layer can include a high leakage dielectric layer sandwiched between two lower leakage dielectric layers. The low leakage layers can function to restrict the current flow across the selector device at low voltages. The high leakage dielectric layer can function to enhance the current flow across the selector device at high voltages.
摘要翻译：可适用于存储器件应用的选择器器件可在低电压下具有低漏电流，以减少非选定器件的漏电流路径，以及高电压下的高泄漏电流，以最大限度地减少器件切换期间的电压降。在一些实施例中，选择器装置可以包括第一电极，三层电介质层和第二电极。三层电介质层可以包括夹在两个较低的漏电介质层之间的高泄漏电介质层。低泄漏层可以起到限制低电压下选择器装置的电流的作用。高泄漏电介质层可以用于在高电压下增强选择器装置上的电流。

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