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1. 发明授权

US06101138A Area efficient global row redundancy scheme for DRAM 有权
标题翻译：用于DRAM的区域有效的全局行冗余方案
公开(公告)号：US06101138A
公开(公告)日：2000-08-08
申请号：US358982
申请日：1999-07-22
申请人： Chun Shiah , Bor-Doou Rong , Jeng-Tzong Shih , Po-Hung Chen
发明人： Chun Shiah , Bor-Doou Rong , Jeng-Tzong Shih , Po-Hung Chen
IPC分类号： G11C29/00 , G11C7/00
CPC分类号： G11C29/808
摘要： In this invention a global row redundancy scheme for a DRAM is described which effectively uses the resources of the chip to produce an area efficient design. The DRAM is constructed from two types of memory blocks, one that has a redundant cell array and one that does not. Both memory block types contain a memory cell array and bit line sense amplifiers. The bit line sense amplifiers, contained on the block with the redundant cell array, are shared with the memory cell array also contained in the block, and thus eliminating the need for sense amplifiers for use only with the redundant cell array. Although, every block could contain a redundant cell array, only one or two blocks with the redundant cell array are normally used. In the global row redundancy scheme repair can be made to any row containing a failed memory cell located in any memory block by using any unused rows in any redundant cell array, and in doing so provides a maximum effectiveness in repairing DRAM's that provides the opportunity to maximize yield.
摘要翻译：在本发明中，描述了用于DRAM的全局行冗余方案，其有效地使用芯片的资源来产生区域有效的设计。 DRAM由两种类型的存储器块构成，一个具有冗余单元阵列，另一个不存在。这两种存储块类型都包含存储单元阵列和位线读出放大器。包含在具有冗余单元阵列的块上的位线读出放大器与也包含在该块中的存储单元阵列共享，因此不需要仅用于冗余单元阵列的读出放大器。尽管每个块都可以包含冗余单元阵列，但通常只使用一个或两个具有冗余单元阵列的块。在全局行冗余方案中，可以通过使用任何冗余单元阵列中的任何未使用的行来修复任何包含位于任何存储器块中的故障存储器单元的行，并且这样做可以提供修复提供机会的DRAM的最大有效性最大化产量。

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