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1. 发明授权

US08178441B2 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08178441B2
公开(公告)日：2012-05-15
申请号：US11186396
申请日：2005-07-21
申请人： Seok-Su Kim
发明人： Seok-Su Kim
IPC分类号： H01L21/44 , H01L21/4763
CPC分类号： H01L21/76802 , H01L21/28525 , H01L21/76801 , H01L21/76837 , H01L21/823425
摘要： A method for manufacturing a semiconductor device includes forming a gate insulating layer, a gate and a protective layer on a semiconductor substrate, forming a spacer on lateral sides of the protective layer and the gate, forming one or more junction regions in the semiconductor substrate at sides of the gate, partially filling a gap between adjacent gates by selectively forming a conductive layer on an exposed portion of the semiconductor substrate between the adjacent gates, forming an insulating layer over the semiconductor substrate so as to fill a full height of the gap between the adjacent gates, and forming a contact hole partially exposing the conductive layer by etching the insulating layer.
摘要翻译：一种半导体器件的制造方法包括在半导体衬底上形成栅极绝缘层，栅极和保护层，在保护层和栅极的侧面形成间隔物，在半导体衬底中形成一个或多个结区域通过在相邻栅极之间的半导体衬底的暴露部分上选择性地形成导电层，在相邻栅极之间部分地填充间隙，在半导体衬底上形成绝缘层，以便填充半导体衬底之间的间隙的全高并且通过蚀刻绝缘层形成部分暴露导电层的接触孔。

2. 发明授权

US08063446B2 LDMOS device and method for manufacturing the same 有权
标题翻译： LDMOS器件及其制造方法
公开(公告)号：US08063446B2
公开(公告)日：2011-11-22
申请号：US12506735
申请日：2009-07-21
申请人： Choul Joo Ko
发明人： Choul Joo Ko
IPC分类号： H01L29/76
CPC分类号： H01L29/402 , H01L29/42368 , H01L29/7816
摘要： Provided is a LDMOS device and method for manufacturing. The LDMOS device includes a second conductive type buried layer formed in a first conductive type substrate. A first conductive type first well is formed in the buried layer and a field insulator with a gate insulating layer at both sides are formed on the first well. On one side of the field insulator is formed a first conductive type second well and a source region formed therein. On the other side of the field insulator is formed an isolated drain region. A gate electrode is formed on the gate insulating layer on the source region and a first field plate is formed on a portion of the field insulator and connected with the gate electrode. A second field plate is formed on another portion of the field insulator and spaced apart from the first field plate.
摘要翻译：提供了一种LDMOS器件和制造方法。 LDMOS器件包括形成在第一导电型衬底中的第二导电型掩埋层。第一导电型第一阱形成在掩埋层中，并且在第一阱上形成具有两侧栅极绝缘层的场绝缘体。在场绝缘体的一侧形成有第一导电类型的第二阱和形成在其中的源极区。在场绝缘体的另一侧形成隔离的漏极区。在源区上的栅极绝缘层上形成栅电极，并且在场绝缘体的一部分上形成第一场板，并与栅电极连接。第二场板形成在场绝缘体的另一部分上并且与第一场板间隔开。

3. 发明授权

US07994554B2 CMOS image sensor and manufacturing method thereof 有权
标题翻译： CMOS图像传感器及其制造方法
公开(公告)号：US07994554B2
公开(公告)日：2011-08-09
申请号：US12437373
申请日：2009-05-07
申请人： Chang Hun Han
发明人： Chang Hun Han
IPC分类号： H01L23/02
CPC分类号： H01L27/14683 , H01L27/14603
摘要： Disclosed are a CMOS image sensor and a manufacturing method thereof. The method includes the steps of: forming an isolation layer on a semiconductor substrate, defining an active region that includes a photo diode region and a transistor region; forming a gate in the transistor region, the gate including a gate electrode and a gate insulating layer; forming a first low-concentration diffusion region in the photo diode region; forming a second low-concentration diffusion region in the transistor region; forming a buffer layer over the substrate, the buffer layer covering the photo diode region; forming first and second insulating layers over the entire surface of the substrate, the first and second insulating layer having a different etching selectivity from each other; forming an insulating sidewall on sides of the gate electrode by selective removal of the second insulating layer; removing the first insulating layer from the transistor region; forming a high-concentration diffusion region in the exposed transistor region, partially overlapping the second low-concentration diffusion region; and forming a metal silicide layer on the high-concentration diffusion region.
摘要翻译：公开了CMOS图像传感器及其制造方法。该方法包括以下步骤：在半导体衬底上形成隔离层，限定包括光电二极管区域和晶体管区域的有源区域; 在所述晶体管区域中形成栅极，所述栅极包括栅极电极和栅极绝缘层; 在所述光电二极管区域中形成第一低浓度扩散区域; 在所述晶体管区域中形成第二低浓度扩散区域; 在所述衬底上形成缓冲层，所述缓冲层覆盖所述光电二极管区域; 在衬底的整个表面上形成第一和第二绝缘层，第一和第二绝缘层彼此具有不同的蚀刻选择性; 通过选择性地去除所述第二绝缘层在所述栅电极的侧面上形成绝缘侧壁; 从晶体管区域去除第一绝缘层; 在所述暴露的晶体管区域中形成高浓度扩散区域，部分地与所述第二低浓度扩散区域重叠; 在高浓度扩散区上形成金属硅化物层。

4. 发明授权

US07973347B2 Complementary metal oxide silicon image sensor and method of fabricating the same 失效
标题翻译：互补金属氧化物硅图像传感器及其制造方法
公开(公告)号：US07973347B2
公开(公告)日：2011-07-05
申请号：US12696575
申请日：2010-01-29
申请人： Ki Sik Im
发明人： Ki Sik Im
IPC分类号： H01L31/062
CPC分类号： H01L27/14625 , H01L27/14621 , H01L27/14627 , H01L27/14632 , H01L27/14685 , H01L27/14687
摘要： Disclosed is a method of fabricating a CMOS (Complementary Metal Oxide Silicon) image sensor. The method includes the steps of: forming a device protective layer and a metal interconnection on a substrate formed with a light receiving device; forming an inner micro-lens on the metal interconnection; coating an interlayer dielectric layer on the inner micro-lens and then forming a color filter; and forming an outer micro-lens including a planarization layer and photoresist on the color filter. The inner micro-lens is formed by depositing the outer layer on dome-shaped photoresist. The curvature radius of the inner micro-lens is precisely and uniformly maintained and the inner micro-lens is easily formed while improving the light efficiency. Since the fabrication process for the CMOS image sensor is simplified, the product yield is improved and the manufacturing cost is reduced.
摘要翻译：公开了制造CMOS（互补金属氧化物硅）图像传感器的方法。该方法包括以下步骤：在由光接收装置形成的基板上形成器件保护层和金属互连; 在金属互连上形成内部微透镜; 在内部微透镜上涂覆层间电介质层，然后形成滤色器; 以及在所述滤色器上形成包括平坦化层和光致抗蚀剂的外部微透镜。内部微透镜通过将外层沉积在圆顶状光致抗蚀剂上而形成。内部微透镜的曲率半径被精确均匀地保持，并且在提高光效率的同时容易地形成内部微透镜。由于CMOS图像传感器的制造工艺简化，所以提高了产品成品率，降低了制造成本。

5. 发明授权

US07960839B2 Semiconductor interconnection line and method of forming the same 有权
标题翻译：半导体互连线及其形成方法
公开(公告)号：US07960839B2
公开(公告)日：2011-06-14
申请号：US11788794
申请日：2007-04-20
申请人： Se-Yeul Bae
发明人： Se-Yeul Bae
IPC分类号： H01L23/48
CPC分类号： H01L21/76808 , H01L21/76807 , H01L21/76834 , H01L21/76895
摘要： An interconnection line of a semiconductor device and a method of forming the same using a dual damascene process are disclosed. An example interconnection line of a semiconductor device includes a semiconductor substrate, a first interconnection line formed on the substrate, an insulating layer pattern formed on the substrate to expose a portion of the first interconnection line, and a metal pad layer formed on the exposed portion of the first interconnection line. The example interconnection line also includes an intermediate insulating layer formed on the entire surface of the substrate and having a via hole and a trench exposing the metal pad layer, and a second interconnection formed in the via hole and the trench and electrically connected to the first interconnection line through the metal pad layer.
摘要翻译：公开了一种半导体器件的互连线及其使用双镶嵌工艺形成该半导体器件的方法。半导体器件的示例性互连线包括半导体衬底，形成在衬底上的第一互连线，形成在衬底上以暴露第一互连线的一部分的绝缘层图案，以及形成在暴露部分上的金属衬垫层的第一条互连线。示例性互连线还包括形成在基板的整个表面上并具有暴露金属焊盘层的通孔和沟槽的中间绝缘层，以及形成在通孔和沟槽中的电连接到第一互连线通过金属焊盘层。

6. 发明授权

US07923777B2 Power semiconductor device and method for manufacturing the same 失效
标题翻译：功率半导体器件及其制造方法
公开(公告)号：US07923777B2
公开(公告)日：2011-04-12
申请号：US12553546
申请日：2009-09-03
申请人： Choul Joo Ko , Nam Joo Kim
发明人： Choul Joo Ko , Nam Joo Kim
IPC分类号： H01L29/76
CPC分类号： H01L27/0629 , H01L29/1083 , H01L29/404 , H01L29/42368 , H01L29/7831 , H01L29/7835
摘要： Disclosed are a power semiconductor device and a method for manufacturing the same. The power semiconductor device has a PIP capacitor and an LDMOS transistor, the LDMOS transistor having second and third gate electrodes separate from a first gate electrode, which may be formed in the process of forming the upper electrode of the PIP capacitor, so it is possible to realize an LDMOS having a higher breakdown voltage and lower Ron and Rsp without additional processing. A drain voltage, which may be different from a voltage applied to the first gate electrode, may be applied to the third gate electrode, so it is possible to realize an LDMOS having a high breakdown voltage and low Ron and Rsp.
摘要翻译：公开了功率半导体器件及其制造方法。功率半导体器件具有PIP电容器和LDMOS晶体管，LDMOS晶体管具有与形成PIP电容器的上电极的过程中形成的第二和第三栅电极分离的第一和第三栅电极，因此可能实现具有更高击穿电压的LDMOS和较低的Ron和Rsp，而无需额外的处理。可以将不同于施加到第一栅电极的电压的漏极电压施加到第三栅电极，因此可以实现具有高击穿电压和低Ron和Rsp的LDMOS。

7. 发明授权

US07811928B2 Semiconductor devices and fabrication methods thereof 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US07811928B2
公开(公告)日：2010-10-12
申请号：US11982582
申请日：2007-11-01
申请人： Han-Choon Lee , Jin-Woo Park
发明人： Han-Choon Lee , Jin-Woo Park
IPC分类号： H01L21/4763
CPC分类号： H01L21/28052 , H01L21/28518 , H01L21/321 , H01L29/665
摘要： Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device includes a silicon substrate, a source region and a drain region. A gate electrode is formed on the silicon substrate. Also, a metal silicide layer is formed on each of the gate electrode, the source region, and the drain region. The metal silicide layer has a thickness uniformity of about 1˜20%. A disclosed fabrication method includes forming a metal layer on a silicon substrate having a gate electrode, a source region, and a drain region; performing a plasma treatment on the metal layer; forming a protective layer on the metal layer; and heat treating the silicon substrate on which the protective layer is formed to thereby form a metal silicide layer. A gas that includes nitrogen is used as a plasma gas during the plasma treatment.
摘要翻译：公开了制造半导体器件的半导体器件和方法。所公开的半导体器件包括硅衬底，源极区和漏极区。在硅衬底上形成栅电极。而且，在栅极电极，源极区域和漏极区域中的每一个上形成金属硅化物层。金属硅化物层的厚度均匀度为约1〜20％。所公开的制造方法包括在具有栅电极，源极区和漏极区的硅衬底上形成金属层; 对金属层进行等离子体处理; 在金属层上形成保护层; 对其上形成保护层的硅衬底进行热处理从而形成金属硅化物层。在等离子体处理期间，使用包含氮气的气体作为等离子体气体。

8. 发明授权

US07807996B2 Test pattern of CMOS image sensor and method of measuring process management using the same 失效
标题翻译： CMOS图像传感器的测试图案和使用其的测量过程管理方法
公开(公告)号：US07807996B2
公开(公告)日：2010-10-05
申请号：US11545462
申请日：2006-10-11
申请人： Eun Sang Cho , Kee Ho Kim
发明人： Eun Sang Cho , Kee Ho Kim
IPC分类号： H01L23/58
CPC分类号： H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： The test pattern according to the present invention consists of an opaque metal film pattern formed on a semiconductor substrate, an insulating film formed on the semiconductor substrate and the metal film pattern, a red color filter formed on the insulating film, a planarization layer formed on the insulating film and the red color filter, and a number of micro-lenses formed on the planarization layer.
摘要翻译：根据本发明的测试图案包括形成在半导体衬底上的不透明金属膜图案，形成在半导体衬底上的绝缘膜和金属膜图案，形成在绝缘膜上的红色滤色器，形成在绝缘膜上的平坦化层绝缘膜和红色滤色器以及形成在平坦化层上的多个微透镜。

9. 发明授权

US07790547B2 Non-volatile memory device and method for fabricating the same 失效
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US07790547B2
公开(公告)日：2010-09-07
申请号：US11645497
申请日：2006-12-27
申请人： Jin Hyo Jung
发明人： Jin Hyo Jung
IPC分类号： H01L21/336
CPC分类号： H01L21/28282 , H01L29/4234
摘要： A method and non-volatile memory device are provided that are characterized by ion-implantation of impurities in the sidewalls of a first electrode. The inclusion of impurities in the sidewalls eliminates geometric abnormalities, referred to herein as a bird's beak, in the first electrode, which are caused by numerous oxidation processes being performed in the overall memory fabrication process. By eliminating these geometric abnormalities, thickening of the block oxide layer proximate the area of geometric abnormalities does not occurring, resulting in a memory device capable of efficiently programming and erasing data.
摘要翻译：提供了一种方法和非易失性存储器件，其特征在于在第一电极的侧壁中离子注入杂质。在侧壁中包含杂质消除了在整个存储器制造过程中由许多氧化过程引起的第一电极中的几何异常（这里称为鸟的喙）。通过消除这些几何异常，几何异常区域附近的块状氧化物层的增厚不会发生，导致能够有效地编程和擦除数据的存储器件。

10. 发明授权

US07767481B2 Image sensor and method for manufacturing the same 失效
标题翻译：图像传感器及其制造方法
公开(公告)号：US07767481B2
公开(公告)日：2010-08-03
申请号：US11646701
申请日：2006-12-27
申请人： Sang Chul Kim , Jae Won Han
发明人： Sang Chul Kim , Jae Won Han
IPC分类号： H01L21/00
CPC分类号： H01L27/14625 , H01L27/1462 , H01L27/14685
摘要： Disclosed are an image sensor and a method for manufacturing the same, capable of increasing a light absorbing coefficient by forming a rough surface on a photodiode. The image sensor includes a semiconductor substrate with a plurality of photodiodes thereon having rough upper surfaces, a dielectric layer on the semiconductor substrate, a color filter layer on the dielectric layer, a planarization layer on an entire surface of the semiconductor substrate including the color filter layer, and a plurality of micro-lenses formed on the planarization layer to correspond to the color filter layer.
摘要翻译：公开了一种能够通过在光电二极管上形成粗糙表面来增加吸光系数的图像传感器及其制造方法。图像传感器包括其上具有多个光电二极管的半导体衬底，具有粗糙的上表面，半导体衬底上的电介质层，介电层上的滤色器层，在包括滤色器的半导体衬底的整个表面上的平坦化层以及形成在平坦化层上以对应于滤色器层的多个微透镜。

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