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81. 发明申请

US20050167740A1 Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage 有权
标题翻译：掺杂半导体纳米管的垂直场效应晶体管在间隔物界定的通道中生长
公开(公告)号：US20050167740A1
公开(公告)日：2005-08-04
申请号：US10767039
申请日：2004-01-29
申请人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Peter Mitchell , Larry Nesbit
发明人： Toshiharu Furukawa , Mark Hakey , Steven Holmes , David Horak , Peter Mitchell , Larry Nesbit
IPC分类号： H01L21/78 , H01L27/28 , H01L51/30 , H01L27/108
CPC分类号： H01L27/283 , B82Y10/00 , H01L51/0048 , H01L51/057 , Y10S977/70 , Y10S977/707 , Y10S977/721 , Y10S977/724
摘要： Vertical field effect transistors having a channel region defined by at least one semiconducting nanotube and methods for fabricating such vertical field effect transistors by chemical vapor deposition using a spacer-defined channel. Each nanotube is grown by chemical vapor deposition catalyzed by a catalyst pad positioned at the base of a high-aspect-ratio passage defined between a spacer and a gate electrode. Each nanotube grows in the passage with a vertical orientation constrained by the confining presence of the spacer. A gap may be provided in the base of the spacer remote from the mouth of the passage. Reactants flowing through the gap to the catalyst pad participate in nanotube growth.
摘要翻译：具有由至少一个半导体纳米管限定的沟道区的垂直场效应晶体管以及通过使用间隔物定义的沟道的化学气相沉积来制造这种垂直场效应晶体管的方法。每个纳米管通过化学气相沉积来生长，该催化剂垫位于位于间隔物和栅电极之间限定的高纵横比通道的基部处的催化剂垫。每个纳米管在通道中生长，其中垂直取向受限于间隔物的限制。可以在远离通道的口的间隔件的基部中设置间隙。通过间隙流过催化剂垫的反应物参与纳米管生长。

82. 发明申请

US20050151261A1 Ultra-high capacitance device based on nanostructures 有权
公开(公告)号：US20050151261A1
公开(公告)日：2005-07-14
申请号：US11044114
申请日：2005-01-26
申请人： Scot Kellar , Sarah Kim
发明人： Scot Kellar , Sarah Kim
IPC分类号： G11C13/02 , H01G4/008 , H01G4/33 , H01L21/02 , H01L21/8242 , H01L27/08 , H01L29/76 , H01L21/4763
CPC分类号： H01L28/84 , B82Y10/00 , G11C13/0033 , G11C13/025 , G11C2213/16 , G11C2213/81 , H01G4/008 , H01G4/33 , H01L27/0805 , H01L27/1085 , Y10S977/70 , Y10S977/72 , Y10S977/721 , Y10S977/723 , Y10S977/902 , Y10S977/963 , Y10T428/24802
摘要： The present invention discloses a method including providing a substrate; forming a lower conductor over the substrate; forming a conducting nanostructure over the lower conductor; forming a thin dielectric over the conducting nanostructure; and forming an upper conductor over the thin dielectric. The present invention further discloses a device including a substrate; a lower conductor located over the substrate; a conducting nanostructure located over the lower conductor; a thin dielectric located over the conducting nanostructure; and an upper conductor located over the thin dielectric.

83. 发明授权

US06911373B2 Ultra-high capacitance device based on nanostructures 有权
标题翻译：基于纳米结构的超高电容器件
公开(公告)号：US06911373B2
公开(公告)日：2005-06-28
申请号：US10251197
申请日：2002-09-20
申请人： Scot A. Kellar , Sarah E. Kim
发明人： Scot A. Kellar , Sarah E. Kim
IPC分类号： G11C13/02 , H01G4/008 , H01G4/33 , H01L21/02 , H01L21/8242 , H01L27/08 , H01L21/20
CPC分类号： H01L28/84 , B82Y10/00 , G11C13/0033 , G11C13/025 , G11C2213/16 , G11C2213/81 , H01G4/008 , H01G4/33 , H01L27/0805 , H01L27/1085 , Y10S977/70 , Y10S977/72 , Y10S977/721 , Y10S977/723 , Y10S977/902 , Y10S977/963 , Y10T428/24802
摘要： The present invention discloses a method including providing a substrate; forming a lower conductor over the substrate; forming a conducting nanostructure over the lower conductor; forming a thin dielectric over the conducting nanostructure; and forming an upper conductor over the thin dielectric.The present invention further discloses a device including a substrate; a lower conductor located over the substrate; a conducting nanostructure located over the lower conductor; a thin dielectric located over the conducting nanostructure; and an upper conductor located over the thin dielectric.
摘要翻译：本发明公开了一种提供基板的方法，在衬底上形成下导体; 在下导体上形成导电纳米结构; 在导电纳米结构上形成薄的电介质; 以及在所述薄电介质上形成上导体。本发明还公开了一种包括基板的装置; 位于衬底上方的下导体; 位于下导体上的导电纳米结构; 位于导电纳米结构之上的薄电介质; 以及位于薄电介质上方的上导体。

84. 发明申请

US20050062097A1 Method and system for molecular charge storage field effect transistor 审中-公开
标题翻译：分子电荷存储场效应晶体管的方法和系统
公开(公告)号：US20050062097A1
公开(公告)日：2005-03-24
申请号：US10498743
申请日：2002-12-12
申请人： Veena Misra , David Bocian , Werner Kuhr , Jonathan Lindsey
发明人： Veena Misra , David Bocian , Werner Kuhr , Jonathan Lindsey
IPC分类号： H01L21/8247 , G11C11/56 , G11C13/02 , H01L27/115 , H01L27/28 , H01L29/788 , H01L29/792 , H01L51/05
CPC分类号： H01L27/283 , B82Y10/00 , G11C11/5664 , G11C13/0009 , G11C13/0014 , G11C13/0016 , G11C2213/53 , H01L51/052 , H01L51/0529 , Y10S977/721 , Y10S977/887 , Y10S977/937
摘要： A method and/or system and/or apparatus for a molecular-based FET device (an m-FET) uses charge storing molecules (120) between a gate (110) and channel (105) of an FET-type transistor. Further embodiments describe fabrication methods for using combinations of standard practices in lithography and synthetic chemistry and novel elements.
摘要翻译：用于分子型FET器件（m-FET）的方法和/或系统和/或设备在FET型晶体管的栅极（110）和沟道（105）之间使用电荷存储分子（120）。另外的实施例描述了使用光刻和合成化学中的标准实践的组合以及新颖元件的制造方法。

85. 发明申请

US20050034200A1 Nanosyringe array and method 审中-公开
标题翻译：纳米注射器阵列和方法
公开(公告)号：US20050034200A1
公开(公告)日：2005-02-10
申请号：US10731866
申请日：2003-12-09
申请人： Carlo Montemagno , Hercules Neves
发明人： Carlo Montemagno , Hercules Neves
IPC分类号： A61M37/00 , B81B1/00 , A61L2/00 , B05D3/00 , H01L21/00
CPC分类号： A61M37/0015 , A61M2037/003 , A61M2037/0053 , A61M2205/0244 , Y10S977/721 , Y10S977/92 , Y10S977/962
摘要： A nanosyringe is constructed using micro fabrication and nano fabrication techniques on a silicon substrate. The nanosyringe includes a membrane of silicon carbide. The position and operation of individual nanosyringes, arranged in an array of nanosyringes, can be independently controlled. A nanosyringe array can inject or extract a fluid from one or more cells or other structures. Microfluidic structures coupled to the nanosyringe allow external pumping or extraction. A cell matrix or organelles of individual cells can be non-destructively sampled in real time.
摘要翻译：在硅衬底上使用微制造和纳米制造技术构建纳米注射器。纳米注射器包括碳化硅膜。排列成纳米注射器阵列的单个纳米注射器的位置和操作可以独立控制。纳米注射器阵列可以从一个或多个细胞或其它结构注射或提取流体。耦合到纳米注射器的微流体结构允许外部泵送或提取。单个细胞的细胞基质或细胞器可以实时非破坏性地取样。

86. 发明申请

US20040124755A1 Method of forming a heterojunction of a carbon nanotube and a different material, method of working a filament of a nanotube 审中-公开
标题翻译：形成碳纳米管和不同材料的异质结的方法，工作纳米管的长丝的方法
公开(公告)号：US20040124755A1
公开(公告)日：2004-07-01
申请号：US10623659
申请日：2003-07-22
申请人： NEC CORPORATION
发明人： Yuegang Zhang , Sumio Iijima
IPC分类号： H01K001/06
CPC分类号： H01L51/0048 , B82Y10/00 , B82Y30/00 , B82Y40/00 , C01B32/168 , C01B32/956 , H01L51/0015 , H01L51/002 , H01L51/0587 , H01L51/0595 , H01L51/42 , Y10S977/721 , Y10S977/742 , Y10S977/744 , Y10S977/842 , Y10S977/844 , Y10T428/21 , Y10T428/2902
摘要： A carbon nanotube is contacted with a reactive substance which is a metal or a semiconductor. The reactive substance is heated to diffuse atoms of the reactive substance into the carbon nanotube so that the carbon nanotube is partially transformed or converted into carbide as a reaction product. Thus, a heterojunction of the reaction product and the carbon nanotube is formed. For example, the carbon nanotube (2) is contacted with a silicon substrate (1). The silicon substrate (1) is heated to cause solid-solid diffusion of Si. As a result, SiC (3) is formed as the heterojunction. At least a part of a filament material of a carbon nanotube is irradiated with electromagnetic wave to deform the filament material.
摘要翻译：碳纳米管与金属或半导体的反应性物质接触。将反应性物质加热以将反应物质的原子扩散到碳纳米管中，使得碳纳米管作为反应产物被部分转化或转化为碳化物。因此，形成反应产物和碳纳米管的异质结。例如，碳纳米管（2）与硅衬底（1）接触。硅衬底（1）被加热以引起Si的固体 - 固体扩散。结果，形成SiC（3）作为异质结。用电磁波照射碳纳米管的长丝材料的至少一部分，使长丝材料变形。

87. 发明授权

US06570468B2 Resonator frequency correction by modifying support structures 有权
标题翻译：谐振器频率校正通过修改支持结构
公开(公告)号：US06570468B2
公开(公告)日：2003-05-27
申请号：US09895360
申请日：2001-06-29
申请人： Qing Ma , Peng Cheng , Valluri R. Rao
发明人： Qing Ma , Peng Cheng , Valluri R. Rao
IPC分类号： H03H905
CPC分类号： H03H3/0077 , H03H9/2463 , Y10S977/70 , Y10S977/721 , Y10S977/733 , Y10S977/888 , Y10S977/889
摘要： A method including to a resonator coupled to at least one support structure on a substrate, the resonator having a resonating frequency in response to a frequency stimulus, modifying the resonating frequency by modifying the at least one support structure. A method including forming a resonator coupled to at least one support structure on a chip-level substrate, the resonator having a resonating frequency; and modifying the resonating frequency of the resonator by modifying the at least one support structure. A method including applying a frequency stimulus to a resonator coupled to at least one support structure on a chip-level substrate determining a resonating frequency; and modifying the resonating frequency of the resonator by modifying the at least one support structure. An apparatus including a resonator coupled to at least one support structure on a chip-level substrate, the resonator having a resonating frequency tuned by the modification of the at least one support structure to a selected frequency stimulus.
摘要翻译：一种方法，包括耦合到衬底上的至少一个支撑结构的谐振器，所述谐振器响应于频率刺激具有谐振频率，通过修改所述至少一个支撑结构来修改谐振频率。一种方法，包括形成耦合到芯片级衬底上的至少一个支撑结构的谐振器，所述谐振器具有谐振频率; 以及通过修改所述至少一个支撑结构来修改谐振器的谐振频率。一种方法，包括对耦合到芯片级衬底上的至少一个支撑结构的谐振器施加频率刺激，确定谐振频率; 以及通过修改所述至少一个支撑结构来修改谐振器的谐振频率。一种包括耦合到芯片级衬底上的至少一个支撑结构的谐振器的谐振器，所述谐振器具有通过所述至少一个支撑结构的修改调谐到所选择的频率刺激的谐振频率。

88. 发明申请

US20030085779A1 Resonator frequency correction by modifying support structures 失效
公开(公告)号：US20030085779A1
公开(公告)日：2003-05-08
申请号：US10307053
申请日：2002-11-27
发明人： Qing Ma , Peng Cheng , Valluri R. Rao
IPC分类号： H03H009/54
CPC分类号： H03H3/0077 , H03H9/2463 , Y10S977/70 , Y10S977/721 , Y10S977/733 , Y10S977/888 , Y10S977/889
摘要： A method including to a resonator coupled to at least one support structure on a substrate, the resonator having a resonating frequency in response to a frequency stimulus, modifying the resonating frequency by modifying the at least one support structure. A method including forming a resonator coupled to at least one support structure on a chip-level substrate, the resonator having a resonating frequency; and modifying the resonating frequency of the resonator by modifying the at least one support structure. A method including applying a frequency stimulus to a resonator coupled to at least one support structure on a chip-level substrate determining a resonating frequency; and modifying the resonating frequency of the resonator by modifying the at least one support structure. An apparatus including a resonator coupled to at least one support structure on a chip-level substrate, the resonator having a resonating frequency tuned by the modification of the at least one support structure to a selected frequency stimulus.

89. 发明授权

US06559546B1 Tin palladium activation with maximized nuclei density and uniformity on barrier material in interconnect structure 有权
公开(公告)号：US06559546B1
公开(公告)日：2003-05-06
申请号：US10228010
申请日：2002-08-26
申请人： Krishnashree Achuthan , Sergey Lopatin
发明人： Krishnashree Achuthan , Sergey Lopatin
IPC分类号： H01L2348
CPC分类号： H01L21/76843 , H01L21/288 , H01L21/76873 , H01L2221/1089 , Y10S977/701 , Y10S977/712 , Y10S977/721
摘要： For fabricating an interconnect structure formed within an interconnect opening surrounded by dielectric material, a layer of diffusion barrier material is formed on at least one wall of the interconnect opening. An activation layer comprised of palladium is formed on the layer of diffusion barrier material when the interconnect opening is immersed in an activation bath comprised of tin ions and palladium ions. The tin ions have a tin ion concentration in the activation bath that is greater than a palladium ion concentration in the activation bath. A layer of seed material is deposited on the activation layer in an electroless deposition process, and the interconnect opening is filled with a conductive fill material grown from the layer of seed material. A layer of silicon rich material may be formed on the layer of diffusion barrier material before deposition of the activation layer such that the activation layer is formed on the layer of silicon rich material. In that case, a ratio of the tin ion concentration to the palladium ion concentration in the activation bath is adjusted to decrease with an amount of silicon atoms of the layer of silicon rich material deposited on the layer of diffusion barrier material. The present invention may be practiced to particular advantage when the layer of seed material and the conductive fill material are comprised of copper.

90. 发明申请

US20030011037A1 Novel transistor structure and method of fabrication 有权
标题翻译：新型晶体管结构及其制造方法
公开(公告)号：US20030011037A1
公开(公告)日：2003-01-16
申请号：US10191118
申请日：2002-07-08
发明人： Robert S. Chau , Jack Kavalieros , Anand Murthy , Brian Roberds , Brian S. Doyle
IPC分类号： H01L029/76 , H01L031/062
CPC分类号： H01L29/66772 , H01L29/41783 , H01L29/4908 , H01L29/495 , H01L29/4966 , H01L29/4975 , H01L29/665 , H01L29/66628 , H01L29/78654 , Y10S977/70 , Y10S977/721 , Y10S977/936
摘要： A novel transistor structure and its method of fabrication. According to the present invention, the transistor includes an intrinsic silicon body having a first surface. A gate dielectric is formed on the first surface of t,he intrinsic silicon body. A gate electrode is formed on the gate dielectric wherein the gate electrode comprises a mid-gap work function film on the gate dielectric. A pair of source/drain regions are formed on opposite sides of the intrinsic silicon body.
摘要翻译：一种新颖的晶体管结构及其制造方法。根据本发明，晶体管包括具有第一表面的本征硅体。栅极电介质形成在其内在硅体的t的第一表面上。栅极电极形成在栅极电介质上，其中栅电极在栅极电介质上包括中间间隙功函数膜。一对源极/漏极区域形成在本征硅体的相对侧上。

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