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81. 发明授权

US07720911B2 Email using queues in non-persistent memory 有权
标题翻译：使用非持久性内存中的队列发送电子邮件
公开(公告)号：US07720911B2
公开(公告)日：2010-05-18
申请号：US10777336
申请日：2004-02-11
申请人： Frank Addante , Tim McQuillen
发明人： Frank Addante , Tim McQuillen
IPC分类号： G06F15/16
CPC分类号： H04L69/40 , H04L29/1215 , H04L47/10 , H04L47/125 , H04L47/50 , H04L47/6215 , H04L49/90 , H04L49/901 , H04L49/9036 , H04L51/00 , H04L61/1564
摘要： An e-mail processing system that preferably operates solely within nonpersistent storage such as random access memory. Queues of e-mails are formed within the random access memory, where each queue includes a pointer to personalized information about the e-mail, directed to a specific domain. In order to send the e-mail, a channel is opened to the domain, and while open, e-mails within the queue are sent. A special recovery agent periodically takes snapshots of the state of processing within the system. Since the processing is occurring within nonpersistent storage, a failure within the system can be recovered by using the snapshots to recover where each email is processing. In one aspect, the feed rate to the other e-mail servers is adjusted based on the rate of those e-mail servers. Also, the system asynchronously looks up information such as DNS information while it is processing information for other e-mails.
摘要翻译：优选仅在诸如随机存取存储器之类的非持久性存储器内操作的电子邮件处理系统。电子邮件的队列形成在随机访问存储器内，其中每个队列包括指向特定域的关于电子邮件的个性化信息的指针。为了发送电子邮件，将向该域打开一个频道，并在打开时发送队列内的电子邮件。特殊的恢复代理定期对系统内的处理状态进行快照。由于处理发生在非持久存储中，因此可以通过使用快照来恢复系统中的故障，以恢复每个电子邮件正在处理的位置。在一个方面，基于这些电子邮件服务器的速率来调整对其他电子邮件服务器的馈送速率。此外，系统在处理其他电子邮件的信息时异步地查找诸如DNS信息的信息。

82. 发明授权

US07715377B2 Apparatus and method for matrix memory switching element 有权
标题翻译：矩阵存储器开关元件的装置和方法
公开(公告)号：US07715377B2
公开(公告)日：2010-05-11
申请号：US11185072
申请日：2005-07-19
申请人： John Mick , Craig Lindahl , Yongdong Zhao
发明人： John Mick , Craig Lindahl , Yongdong Zhao
IPC分类号： H04L12/56
CPC分类号： H04L49/9036 , H04L47/568 , H04L47/6215 , H04L47/623 , H04L49/205 , H04L49/252 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90
摘要： A matrixed memory array device is disclosed that includes input ports and output ports. Each input port is coupled to a first data bus and each output port is coupled to a second data bus that is different and separate from the first data bus. A memory brick is placed at each cross-point between first data buses and second data buses so as to switchably couple frames of data from input ports to output ports. Each memory brick contains a plurality of eight transistor (8-T) memory cells that can be used to store, erase, read, write, and switchably couple a data bit from the input port to a corresponding output port.
摘要翻译：公开了一种包括输入端口和输出端口的矩阵式存储器阵列器件。每个输入端口耦合到第一数据总线，并且每个输出端口耦合到不同于第一数据总线的第二数据总线。存储砖被放置在第一数据总线和第二数据总线之间的每个交叉点处，以便可将数据帧从输入端口耦合到输出端口。每个存储砖包含多个八个晶体管（8-T）存储器单元，其可以用于存储，擦除，读取，写入和可切换地将数据位从输入端口耦合到相应的输出端口。

83. 发明授权

US07562133B2 Method, system and computer program product for delivering data to a storage buffer assigned to an application 失效
标题翻译：用于将数据传送到分配给应用程序的存储缓冲区的方法，系统和计算机程序产品
公开(公告)号：US07562133B2
公开(公告)日：2009-07-14
申请号：US12060650
申请日：2008-04-01
申请人： Vinit Jain , Kavitha Vittal Murthy Baratakke , Jeffrey Paul Messing , Venkat Venkatsubra
发明人： Vinit Jain , Kavitha Vittal Murthy Baratakke , Jeffrey Paul Messing , Venkat Venkatsubra
IPC分类号： G06F15/173
CPC分类号： H04L67/2842 , H04L49/90 , H04L49/9036 , H04L69/16 , H04L69/161 , H04L69/32
摘要： A method, system, and computer program product in a computer-readable medium for delivering data, received from a network, to a storage buffer assigned to an application is proposed. An application designates a communication buffer within a local data processing system for buffering data communicated with an application. The local data processing system reports to a network interface of the local data processing system a memory address of the designated communication buffer, and the data processing system creates a cookie containing the memory address. The data processing system then sends the cookie form the local data processing system to a remote data processing system, such that the remote data processing system may address data directly to the designated communication buffer.
摘要翻译：提出了一种用于将从网络接收的数据传送到分配给应用的存储缓冲器的计算机可读介质中的方法，系统和计算机程序产品。应用程序指定本地数据处理系统内的通信缓冲器，用于缓冲与应用程序通信的数据。本地数据处理系统向本地数据处理系统的网络接口报告指定通信缓冲器的存储器地址，并且数据处理系统创建包含存储器地址的cookie。然后，数据处理系统将本地数据处理系统的cookie发送到远程数据处理系统，使得远程数据处理系统可以直接将数据寻址到指定的通信缓冲器。

84. 发明申请

US20080192765A1 Apparatus and method for packet buffer management in IP network system 有权
标题翻译： IP网络系统中数据包缓存管理的方法及装置
公开(公告)号：US20080192765A1
公开(公告)日：2008-08-14
申请号：US12068739
申请日：2008-02-11
申请人： Jong-Sang Oh , Sun-Gi Kim , Yong-Seok Park
发明人： Jong-Sang Oh , Sun-Gi Kim , Yong-Seok Park
IPC分类号： H04L12/56
CPC分类号： H04L49/9047 , H04L49/90 , H04L49/9036 , H04L49/9078
摘要： An apparatus, computer program and method for packet buffer management in an IP network system. The apparatus includes at least one link queue buffer, a shared buffer, a buffer state detector, and a buffer manager. The at least one link queue buffer is allocated a buffer of a packet stored in a memory. The shared buffer is excessively allocated when exceeding a minimum buffer threshold value. The buffer state detector determines whether a buffer value stored in a link queue buffer of a corresponding link exceeds a preset minimum buffer threshold value. The buffer manager sets the shared buffer to be included in the link queue buffer if the stored buffer value exceeds the preset minimum buffer threshold value.
摘要翻译：一种用于IP网络系统中的分组缓冲器管理的装置，计算机程序和方法。该装置包括至少一个链路队列缓冲器，共享缓冲器，缓冲器状态检测器和缓冲器管理器。至少一个链路队列缓冲器被分配存储在存储器中的分组的缓冲器。当超过最小缓冲器阈值时，共享缓冲区被过度分配。缓冲状态检测器确定存储在相应链路的链路队列缓冲器中的缓冲器值是否超过预设的最小缓冲器阈值。如果存储的缓冲区值超过预设的最小缓冲区阈值，则缓冲区管理器将共享缓冲区设置为包括在链路队列缓冲区中。

85. 发明申请

US20070268925A1 Input buffer device and control method thereof 审中-公开
标题翻译：输入缓冲器及其控制方法
公开(公告)号：US20070268925A1
公开(公告)日：2007-11-22
申请号：US11434189
申请日：2006-05-16
申请人： Gerald E. Sobelman , Dae-wook Kim , Man-ho Kim , Sang-woo Rhim , Eui-seok Kim , Beom-hak Lee
发明人： Gerald E. Sobelman , Dae-wook Kim , Man-ho Kim , Sang-woo Rhim , Eui-seok Kim , Beom-hak Lee
IPC分类号： H04L12/56 , H04L12/54
CPC分类号： H04L49/9036 , H04L47/266 , H04L49/3045 , H04L49/90 , H04L49/9078
摘要： An input buffer device and control method of the input buffer device. The input buffer device includes a virtual output queuing (VOQ) buffering section which has a plurality of VOQ buffers. The input buffer device stores data which is input to an input port to a VOQ buffer corresponding to an intended output port of the data among the plurality of VOQ buffers. A shared buffering section is provided which stores the data when a VOQ buffer corresponding to the intended output port of the data is full of data. The stored data is forwarded to the VOQ buffer when the VOQ buffer is empty. Accordingly, the input buffer device can more efficiently process the data by use of the fixed-length FIFO buffers and the shared buffer.
摘要翻译：一种输入缓冲器件及其输入缓冲器的控制方法。输入缓冲器装置包括具有多个VOQ缓冲器的虚拟输出排队（VOQ）缓冲部分。输入缓冲器装置将输入到输入端口的数据存储到与多个VOQ缓冲器中的数据的预期输出端口相对应的VOQ缓冲器。提供共享缓冲部分，当与数据的预期输出端口相对应的VOQ缓冲器充满数据时，存储数据。当VOQ缓冲区为空时，将存储的数据转发到VOQ缓冲区。因此，输入缓冲器件可以通过使用固定长度的FIFO缓冲器和共享缓冲器来更有效地处理数据。

86. 发明申请

US20070121630A1 METHOD AND SWITCH FOR BROADCASTING PACKETS 审中-公开
标题翻译：广播包的方法和开关
公开(公告)号：US20070121630A1
公开(公告)日：2007-05-31
申请号：US11554385
申请日：2006-10-30
申请人： Routliffe Stephen , Gadelrab Serag , Roxana Christensen , Barry Wood
发明人： Routliffe Stephen , Gadelrab Serag , Roxana Christensen , Barry Wood
IPC分类号： H04L12/56
CPC分类号： H04L49/201 , H04L12/18 , H04L49/508 , H04L49/90 , H04L49/9036
摘要： A switch for broadcasting packets is provided including a plurality of input ports, a switch fabric coupled to the input ports, a plurality of output ports coupled to the suited fabrics and a multicast interconnect coupled between the input ports and output ports for routing multicast packets directly between the input and output ports. The multicast interconnect may include a multicast queue, an arbiter coupled between the multicast queue and the input ports and a plurality of broadcast buffers coupled to the multicast queue, each broadcast buffer coupled to a corresponding output port. The multicast interconnect may include a plurality of egress arbiters coupled between corresponding broadcast buffers and output ports.
摘要翻译：提供广播分组的交换机，包括多个输入端口，耦合到输入端口的交换结构，耦合到适合结构的多个输出端口以及耦合在输入端口和输出端口之间的组播互连直接用于路由组播分组在输入和输出端口之间。多播互连可以包括多播队列，耦合在多播队列和输入端口之间的仲裁器以及耦合到多播队列的多个广播缓冲器，每个广播缓冲器耦合到对应的输出端口。组播互连可以包括耦合在相应的广播缓冲器和输出端口之间的多个出口仲裁器。

87. 发明授权

US07145904B2 Switch queue predictive protocol (SQPP) based packet switching technique 失效
公开(公告)号：US07145904B2
公开(公告)日：2006-12-05
申请号：US10037291
申请日：2002-01-03
申请人： Yongdong Zhao , Craig A. Lindahl
发明人： Yongdong Zhao , Craig A. Lindahl
IPC分类号： H04L12/54
CPC分类号： H04L49/9036 , H04L47/568 , H04L47/6215 , H04L47/6225 , H04L49/101 , H04L49/205 , H04L49/252 , H04L49/30 , H04L49/3009 , H04L49/90
摘要： A switch queue predictive protocol (SQPP) includes a packet switching system including: a switch fabric having a cross-point switch, and a plurality of line cards, each coupled to the switch fabric. A cross-point buffer is located at each cross-point of the cross-point switch. The switch fabric also includes a plurality of actual available queue space tables (AAQSTs), each identifying the actual queue space available in a row of the cross-point buffers. Each of the line cards includes an input buffer, an output buffer, and a predicted available queue space table (PAQST) identifying predicted queue space available in a corresponding row of the cross-point buffers. Packet information is transmitted from a source line card to the switch fabric only if available queue space is predicted by the corresponding PAQST. The switch fabric uses the AAQST to update the PAQST after packet information is transmitted to a destination line card.

88. 发明授权

US07126952B2 Multiprotocol decapsulation/encapsulation control structure and packet protocol conversion method 失效
标题翻译：多协议解封装/封装控制结构和分组协议转换方法
公开(公告)号：US07126952B2
公开(公告)日：2006-10-24
申请号：US09966349
申请日：2001-09-28
申请人： Donald F. Hooper , Stephanie L. Hirnak
发明人： Donald F. Hooper , Stephanie L. Hirnak
IPC分类号： H04L12/28 , H04J3/22
CPC分类号： H04L49/602 , H04L29/06 , H04L45/52 , H04L45/742 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/901 , H04L49/9036 , H04L49/9042 , H04L49/9057 , H04L69/12 , H04L69/18 , H04L69/22 , H04L69/32
摘要： A network packet may be forwarded by reading a table containing a plurality of flags to determine which of the plurality of flags is set or cleared and performing an operation on the packet to decapsulate or encapsulate the packet in accordance with values of the flags.
摘要翻译：可以通过读取包含多个标志的表来转发网络分组，以确定多个标志中的哪一个被设置或清除，并且对分组执行操作以根据标志的值来解封装或封装分组。

89. 发明授权

US07075938B1 Common buffer memory control apparatus 失效
标题翻译：公共缓冲存储器控制装置
公开(公告)号：US07075938B1
公开(公告)日：2006-07-11
申请号：US09258442
申请日：1999-02-26
申请人： Syuji Takada , Yasuhiro Ooba
发明人： Syuji Takada , Yasuhiro Ooba
IPC分类号： H04L12/28
CPC分类号： H04L49/901 , H04L49/103 , H04L49/108 , H04L49/90 , H04L49/9036
摘要： A common buffer memory control apparatus controls a common buffer memory which is used to store message data items each of which is divided into a plurality of cells based on an asynchronous transfer mode. The common buffer memory control apparatus includes a free block management table for managing whether each of blocks into which the common buffer memory divided is free or used, a block selecting unit for selecting a block of the common buffer memory which is free with reference to the free block management table, and a cell writing control unit for controlling a write operation for cells of a single message data item so that the respective cells of the single message data item are written in the block, selected by the block selecting means, of the common buffer memory.
摘要翻译：公共缓冲存储器控制装置控制公共缓冲存储器，其用于存储基于异步传输模式将消息数据项分为多个单元的消息数据项。公共缓冲存储器控制装置包括一个空闲块管理表，用于管理被分配的公共缓冲存储器中的每个块是空闲还是使用的块;块选择单元，用于选择公共缓冲存储器的块，空闲块管理表和单元写入控制单元，用于控制单个消息数据项的单元的写入操作，使得单个消息数据项的各个单元被写入由块选择装置选择的块中公共缓冲存储器。

90. 发明授权

US07028098B2 Selective routing of data flows using a TCAM 有权
公开(公告)号：US07028098B2
公开(公告)日：2006-04-11
申请号：US09909739
申请日：2001-07-20
申请人： Ashutosh Mate , Atul Mahamuni , Vijay Chander
发明人： Ashutosh Mate , Atul Mahamuni , Vijay Chander
IPC分类号： G06F15/173
CPC分类号： H04L47/6215 , H04L12/5601 , H04L45/00 , H04L45/50 , H04L45/54 , H04L45/7457 , H04L47/10 , H04L47/2441 , H04L47/50 , H04L47/627 , H04L49/90 , H04L49/901 , H04L49/9036 , H04L49/9047 , H04L49/9073
摘要： The present invention relates to a method and system for supporting in a router a plurality of data flows using a ternary content addressable memory (TCAM) in which the number of accesses to write to the TCAM is optimized to improve efficiency of updating and subsequent look up. To accommodate the plurality of data flows, the TCAM is partitioned into at least two partitions in which a first portion includes indices having a higher priority and a second portion includes indices having a lower priority. For example, multiple protocol label switching (MPLS) flows and IP-Virtual Private Network (VPN) can be added to the first partition and policy based routing flows can be added to the second partition. During subsequent TCAM look-up of a prefix of an incoming packet the MPLS or IP-VPN flow will subsume any matching policy based routing flow, such as flows classified by an access control list or traffic manager flows.

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