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    • 81. 发明授权
    • Auto deguassing from stand-by to on
    • 自动消除从待机到开启
    • US5952786A
    • 1999-09-14
    • US62331
    • 1998-04-17
    • Seng Huat NGChun-Hsing Wu
    • Seng Huat NGChun-Hsing Wu
    • H04N5/63H04N9/29H01J29/06
    • H04N9/29H04N5/63
    • Circuitry to control a power supply of a degaussing coil of a cathode ray tube, said degaussing coil is coupled to a main voltage supply through a switching device the circuitry has inputs coupled to a direct source of current of a switched mode power supply, the switched mode power supply comprises a switched mode transformer with primary windings coupled to the main source of voltage, and secondary windings and the switched mode power supply is switched in a first range of frequencies when the power supply is in a "standby" mode and in a second range of frequencies when the power supply is in an "on" mode wherein said circuitry comprising a detecting circuit which detectes a change in the range of switching frequencies when the power supply is switched from standby to on, the detecting circuit having an input coupled to a direct current source being downstream of a primary winding of the switched mode transformer and an output coupled to an input of a control circuit of the switching device the control circuit, having an output to carry an output signal having an "on" state and an "off" state, the "on" state lasting for a predetermined duration after a change in a value present at the output of said detection circuit, the change occurring when the power supply is switched to the "on" mode, in the "on" state of said signal at the output of said control circuit, the switching device is on and current coming from the main is flows through the degaussing coil and in the "off" state of said signal the switching device is off and no current is circulates in the degaussing coil.
    • 电路控制阴极射线管的消磁线圈的电源,所述消磁线圈通过开关装置耦合到主电压源,所述电路具有耦合到开关模式电源的直流电流源的输入,所述开关 模式电源包括具有耦合到主电压源的初级绕组的开关模式变压器,并且当电源处于“待机”模式时,次级绕组和开关模式电源在第一频率范围内切换,并且在 当所述电源处于“开”模式时,所述第二频率范围,其中所述电路包括检测电路,所述检测电路在电源从待机切换到接通时检测开关频率范围的变化,所述检测电路具有输入耦合 到开关模式变压器的初级绕组的下游的直流源和耦合到开关的控制电路的输入的输出 装置控制电路,具有输出以承载具有“接通”状态和“关闭”状态的输出信号,“开”状态在存在于所述检测电路的输出端的值改变之后持续预定的持续时间 当在所述控制电路的输出处的所述信号的“接通”状态下,当电源切换到“接通”模式时,发生变化,开关装置导通,并且来自主电流的电流流过消磁 线圈,并且在所述信号的“断开”状态下,开关装置关闭,并且没有电流在消磁线圈中循环。
    • 82. 发明授权
    • Device for the decimation of digital data sequences
    • 抽取数字数据序列的装置
    • US5933545A
    • 1999-08-03
    • US756120
    • 1996-11-25
    • Farid KaziAlain Pirson
    • Farid KaziAlain Pirson
    • H04N7/26G06T3/40H03H17/02H04N5/14G06K9/36
    • H04N5/14H03H17/0202
    • A decimation device for digital data sequences includes a multiplexer mounted in cascade with a calculator producing, alternately, during a first calculation cycle, the mean M.sub.i of at least two data sequences representing the pixels P(i,j) and P(i,j+1) in a line L.sub.i, and during a following calculation cycle, the mean M.sub.c. The mean M.sub.c is composed of the mean M.sub.i and of an intermediate sequence previously calculated and stored in a storage register arranged between an output for the calculation stage and at least one of the inputs to the multiplexer. The intermediate sequence represents the mean M.sub.i-1 of at least two data sequences representing pixels P(i-1,j) and P(i-1,j+1) in a line L.sub.i-1, where i varies from 0 to N-1 and j varies from 0 to M-1.
    • 用于数字数据序列的抽取装置包括与计算器级联的多路复用器,交替地在第一计算周期期间产生表示像素P(i,j)和P(i,j)的至少两个数据序列的平均值 +1)在一行中,在下一个计算周期中,平均值为Mc。 平均值Mc由平均值Mi和先前计算并存储在布置在计算阶段的输出和多路复用器的至少一个输入之间的存储寄存器中的中间序列组成。 中间序列表示线路Li-1中表示像素P(i-1,j)和P(i-1,j + 1)的至少两个数据序列的平均值Mi-1,其中i从0变化到N -1和j从0到M-1变化。
    • 84. 发明授权
    • SMPS with a variable frequency start up circuit
    • 具有变频启动电路的SMPS
    • US5903451A
    • 1999-05-11
    • US977515
    • 1997-11-24
    • Chun-Hsing WuKian Meng Koh
    • Chun-Hsing WuKian Meng Koh
    • H02M3/28H02M1/00H02M1/36H02M3/335H02M3/00
    • H02M1/36
    • The invention relates to a switch mode power supply (SMPS) comprising control means (IP1) including an oscillator (OS) for generating a pulse-width modulated signal (V2). The object is to provide a fast start-up time over a wide mains input-voltage range (AC). According to the invention, the switch mode power supply comprises a network (T2, R52, R51, R24) which provides in case of a high input voltage a soft start with a low oscillating frequency and in case of low input voltage a start-up with essentially the normal oscillating frequency. The invention provides a fast start-up time over a wide mains input voltage range of 90 Volt up to 265 Volt. The network includes a transistor (T2) used in inverse mode as a switching element which provides a threshold value of about 150 Volt. The power supply can be used advantageously as part of a TV receiver.
    • 本发明涉及包括控制装置(IP1)的开关模式电源(SMPS),该控制装置包括用于产生脉冲宽度调制信号(V2)的振荡器(OS)。 目的是在宽的电源输入电压范围(AC)上提供快速的启动时间。 根据本发明,开关模式电源包括网络(T2,R52,R51,R24),其在高输入电压的情况下提供具有低振荡频率的软启动,并且在低输入电压的情况下提供启动 基本上具有正常的振荡频率。 本发明在90伏至265伏特的宽电源输入电压范围内提供快速启动时间。 该网络包括在逆模式中使用的晶体管(T2)作为提供约150伏特的阈值的开关元件。 电源可以有利地用作电视接收机的一部分。
    • 88. 发明授权
    • Method for processing data in matrix arrays in a motion estimation system
    • 用于在运动估计系统中处理矩阵阵列中的数据的方法
    • US5870500A
    • 1999-02-09
    • US758115
    • 1996-11-25
    • Mohamed DaoudiAlain Pirson
    • Mohamed DaoudiAlain Pirson
    • H04N7/32G06T7/20G06T13/00G06K9/36
    • G06T7/2013G06T2200/28G06T2207/10016
    • A method of processing data in matrix arrays in a motion estimation system is characterized in that each array (803, 804) performing a calculation of distortion (Err) for a block of pixels (1, 2) of a current image, at least two arrays (803, 804) being arranged in series performing the calculations for at least two adjacent blocks (1, 2) of the said current image, the reference window corresponding to the entirety of these blocks being introduced in bands of pixels into the first of the said arrays (803) and propagating from array to array in the said series of arrays, the allocation of the blocks (1, 2) to the arrays and the direction of introduction of the band into the arrays being such that the last part (c, respectively A) of the band introduced into the array corresponds to a part of the window of the block (2, respectively 1) allocated to the first of the arrays (803).
    • 一种在运动估计系统中处理矩阵阵列中的数据的方法的特征在于,每个阵列(803,804)对当前图像的像素块(1,2)执行失真(Err)的计算,至少两个 阵列(803,804)串行布置地执行对所述当前图像的至少两个相邻块(1,2)的计算,对应于这些块的整体的参考窗口被引入到像素的第一个 所述阵列(803)并且在所述一系列阵列中从阵列传播到阵列,块(1,2)到阵列的分配和将阵列引入阵列的方向使得最后部分 引入阵列的频带的A分别对应于分配给第一阵列(803)的块(2,分别为1)的一部分窗口。
    • 90. 发明授权
    • Code sequence detection in a trellis decoder
    • 网格解码器中的码序列检测
    • US5841478A
    • 1998-11-24
    • US629673
    • 1996-04-09
    • Keren HuWilliam Wei-Lian LinMaurice David Caldwell
    • Keren HuWilliam Wei-Lian LinMaurice David Caldwell
    • H04N7/26H03M13/23H03M13/25H03M13/35H03M13/39H03M13/41H04L25/08H04N20060101H04N5/46H04N7/30H04N19/00H04N21/2383H04N21/438H04N5/21
    • H04N21/2383H03M13/35H03M13/39H04N21/4382
    • An adaptive trellis decoder seamlessly switches between multiple operational modes. The trellis decoder employs a code sequence detection system that detects codes in input interleaved packet data. The code sequence detection system also reduces the delay (latency) between the input of encoded data and the output of decoded data. The code sequence detection system processes video data in the form of groups of interleaved trellis encoded data packets and includes a traceback network that identifies a sequence of antecedent trellis states, in accordance with a state transition trellis. The traceback network identifies the antecedent states for collocated interleaved packets in response to decision data associated with trellis state transitions. Output trellis decoded data is provided in response to the identified sequence of antecedent trellis states. The decoder can also provide a plurality of trellis decoded data sequences. The decoded data sequences are provided by identifying corresponding antecedent trellis state sequences with delayed decision data in accordance with a state transition trellis. One of the decoded data sequences is identified with a pointer updated by identifying antecedent trellis states with the decision data.
    • 自适应网格解码器在多种操作模式之间无缝切换。 网格解码器采用代码序列检测系统,其检测输入交错分组数据中的代码。 代码序列检测系统还减少了编码数据的输入和解码数据的输出之间的延迟(等待时间)。 代码序列检测系统以交织网格编码数据分组的形式处理视频数据,并且包括根据状态转换网格来识别先行格状态序列的追溯网络。 回溯网络响应于与网格状态转换相关联的决策数据来识别并置交错分组的先行状态。 响应于所识别的先行网格状态序列来提供输出格状解码数据。 解码器还可以提供多个网格解码的数据序列。 解码的数据序列通过根据状态转换网格识别具有延迟的判定数据的相应先行格状态序列来提供。 解码的数据序列中的一个用通过使用判定数据识别先行格状态来更新的指针来识别。