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81. 发明申请

US20130062676A1 FLASH MEMORY STRUCTURE 审中-公开
标题翻译：闪存存储器结构
公开(公告)号：US20130062676A1
公开(公告)日：2013-03-14
申请号：US13239364
申请日：2011-09-21
申请人： Tzung-Han Lee , Chung-Lin Huang , Ron Fu Chu , Dah-Wei Liu
发明人： Tzung-Han Lee , Chung-Lin Huang , Ron Fu Chu , Dah-Wei Liu
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , H01L29/40114
摘要： A flash memory structure includes a semiconductor substrate, a gate dielectric layer on the semiconductor substrate, a floating gate on the gate dielectric layer, a capacitor dielectric layer conformally covering the floating gate, wherein the capacitor dielectric layer forms a top surface and four sidewall surfaces; and an isolated conductive cap layer covering the top surface and the four sidewall surfaces.
摘要翻译：闪速存储器结构包括半导体衬底，半导体衬底上的栅极电介质层，栅极介电层上的浮置栅极，保形地覆盖浮置栅极的电容器电介质层，其中电容器介电层形成顶表面和四个侧壁表面 ; 以及覆盖顶表面和四个侧壁表面的隔离的导电盖层。

82. 发明授权

US07638390B2 Manufacturing method of static random access memory 有权
标题翻译：静态随机存取存储器的制造方法
公开(公告)号：US07638390B2
公开(公告)日：2009-12-29
申请号：US11852185
申请日：2007-09-07
申请人： Tzung-Han Lee , Kuang-Pi Lee , Wen-Jeng Lin , Rern-Hurng Larn
发明人： Tzung-Han Lee , Kuang-Pi Lee , Wen-Jeng Lin , Rern-Hurng Larn
IPC分类号： H01L21/8242
CPC分类号： H01L27/1087 , H01L27/11 , Y10S257/903
摘要： A static random access memory (SRAM) cell structure at least comprising a substrate, a transistor, an upper electrode and a capacitor dielectric layer. A device isolation structure is set up in the substrate to define an active region. The active region has an opening. The transistor is set up over the active region of the substrate. The source region of the transistor is next to the opening. The upper electrode is set up over the opening such that the opening is completely filled. The capacitor dielectric layer is set up between the upper electrode and the substrate.
摘要翻译：至少包括衬底，晶体管，上电极和电容器电介质层的静态随机存取存储器（SRAM）单元结构。在衬底中设置器件隔离结构以限定有源区。活动区域有一个开口。晶体管设置在衬底的有源区上。晶体管的源极区域靠近开口。将上电极设置在开口上方，使得开口完全充满。电容器介电层设置在上电极和衬底之间。

83. 发明申请

US20090061580A1 METHOD OF FORMING FINFET DEVICE 有权
标题翻译：形成FINFET器件的方法
公开(公告)号：US20090061580A1
公开(公告)日：2009-03-05
申请号：US12030210
申请日：2008-02-13
申请人： Chih-Hao Cheng , Tzung-Han Lee
发明人： Chih-Hao Cheng , Tzung-Han Lee
IPC分类号： H01L21/8242
CPC分类号： H01L29/66795 , H01L27/10876 , H01L27/10879
摘要： The invention discloses a method of forming a finFET device. A hard mask layer is formed on an active area of a semiconductor substrate. A portion of the hard mask layer is etched to form a recess. A conformal gate defining layer is deposited on the recess and a tilt angle ion implantation process is performed. A part of the gate defining layer is removed to define a fin pattern. The fin pattern is subsequently transferred to the hard mask layer. The patterned hard mask layer having the fin pattern is utilized as an etching mask, and the semiconductor substrate is etched to form a fin structure.
摘要翻译：本发明公开了一种形成finFET器件的方法。在半导体衬底的有源区上形成硬掩模层。硬掩模层的一部分被蚀刻以形成凹部。在凹槽上沉积保形栅极限定层，并执行倾斜角度离子注入工艺。去除栅极限定层的一部分以限定鳍状图案。翅片图案随后转移到硬掩模层。将具有翅片图案的图案化的硬掩模层用作蚀刻掩模，并且蚀刻半导体衬底以形成翅片结构。

84. 发明申请

US20090001513A1 Semiconductor structure 有权
公开(公告)号：US20090001513A1
公开(公告)日：2009-01-01
申请号：US11949047
申请日：2007-12-03
申请人： Tzung-Han Lee , Chih-Hao Cheng , Chung-Yuan Lee
发明人： Tzung-Han Lee , Chih-Hao Cheng , Chung-Yuan Lee
IPC分类号： H01L29/92
CPC分类号： H01L27/10891 , H01L27/10876
摘要： The present invention discloses a structure of a buried word line, which comprises a semiconductor substrate having a U-shape trench, a U-shape gate dielectric layer in the U-shape trench, a polysilicon layer on the U-shape gate dielectric layer, a conducting layer on the polysilicon layer, and a cover dielectric layer on the conducting layer. The semiconductor structure may have a minimized size and when recess channels are formed thereby, the integration is accordingly improved without suffering from the short channel effect.

85. 发明申请

US20090001457A1 Semiconductor structure 审中-公开
标题翻译：半导体结构
公开(公告)号：US20090001457A1
公开(公告)日：2009-01-01
申请号：US11949048
申请日：2007-12-03
申请人： Tzung-Han Lee , Chih-Hao Cheng , Chung-Yuan Lee
发明人： Tzung-Han Lee , Chih-Hao Cheng , Chung-Yuan Lee
IPC分类号： H01L29/78
CPC分类号： H01L27/10891 , H01L27/10876
摘要： The present invention discloses a semiconductor structure comprising a semiconductor substrate having a U-shape trench, a U-shape gate dielectric layer on the U-shape trench, a U-shape gate region on the U-shape gate dielectric layer, a conducting matter in the U-shape gate region, and a cover dielectric layer on the conducting matter. The semiconductor structure may have a minimized size and when recess channels are formed thereby, the integration is accordingly improved without suffering from the short channel effect.
摘要翻译：本发明公开了一种半导体结构，其包括具有U形沟槽的半导体衬底，U形沟槽上的U形栅极电介质层，U形栅极电介质层上的U形栅极区域，导电材料在U形栅极区域和导电材料上的覆盖电介质层。半导体结构可以具有最小化的尺寸，并且当由此形成凹槽时，相应地提高了积分，而不会受到短沟道效应的影响。

86. 发明申请

US20080277709A1 DRAM STRUCTURE 审中-公开
标题翻译： DRAM结构
公开(公告)号：US20080277709A1
公开(公告)日：2008-11-13
申请号：US11872034
申请日：2007-10-14
申请人： Tzung-Han Lee , Chih-Hao Cheng , Te-Yin Chen , Chung-Yuan Lee
发明人： Tzung-Han Lee , Chih-Hao Cheng , Te-Yin Chen , Chung-Yuan Lee
IPC分类号： H01L27/108
CPC分类号： H01L27/10876 , H01L27/10867
摘要： A DRAM structure includes a substrate, a MOS transistor, a deep trench capacitor, a surface strap positioned on the surface of the substrate and interconnecting a drain of the MOS transistor and an electrode of the deep trench capacitor, wherein the sidewall and the top surface of the surface strap are covered with an insulating layer. A passing gate is positioned on the insulating layer.
摘要翻译： DRAM结构包括衬底，MOS晶体管，深沟槽电容器，位于衬底表面上的表面带，并将MOS晶体管的漏极和深沟槽电容器的电极互连，其中侧壁和顶表面的表面带被绝缘层覆盖。通孔位于绝缘层上。

87. 发明授权

US07382614B2 Power supply having an extendable power input port 失效
标题翻译：电源具有可扩展的电源输入端口
公开(公告)号：US07382614B2
公开(公告)日：2008-06-03
申请号：US10853164
申请日：2004-05-26
申请人： Tzung-Han Lee
发明人： Tzung-Han Lee
IPC分类号： H05K7/20
CPC分类号： G06F1/184 , G06F1/188
摘要： A power supply having an extendable power input port connecting to a connection line to be installed on a side wall of a computer host. The side wall and the power supply form a heat dissipation passage therebetween to improve heated airflow in the computer host and increase heat dissipation effect without affecting electric plugging of the power supply.
摘要翻译：一种电源，具有连接到要安装在计算机主机的侧壁上的连接线的可延伸电源输入端口。侧壁和电源在其间形成散热通道，以改善计算机主机中的加热气流并增加散热效果，而不影响电源的电插塞。

88. 发明授权

US07200004B2 Loading and unloading mechanism for removable power supply modules 有权
标题翻译：可移动电源模块的装卸机制
公开(公告)号：US07200004B2
公开(公告)日：2007-04-03
申请号：US11123105
申请日：2005-05-06
申请人： Yun-Chen Chen , Tzung-Han Lee
发明人： Yun-Chen Chen , Tzung-Han Lee
IPC分类号： G06F1/16
CPC分类号： G06F1/26 , G06F1/188
摘要： A loading and unloading mechanism adopted for use on removable power supply modules includes in one embodiment a connection plug installed on a removable power supply and a connection trough connected to a power supply circuit of a system end (such as a personal computer). Another embodiment includes a connection trough on a system end to be installed on a holding unit which is movable to adjust the position relative to the system end according to the size of the removable power supply so that the removable power supply can be fully loaded into the computer. The loading and unloading mechanism thus formed can be adapted for the removable power supply of varying sizes and specifications.
摘要翻译：在可移动电源模块中使用的装载和卸载机构包括在一个实施例中，安装在可拆卸电源上的连接插头和连接到系统端（例如个人计算机）的电源电路的连接槽。另一个实施例包括在系统端上的连接槽，该连接槽将安装在保持单元上，该保持单元可移动以根据可拆卸电源的尺寸来调节相对于系统端的位置，使得可移除的电源可以完全装入电脑。如此形成的装卸机构可适用于不同尺寸和规格的可拆卸电源。

89. 发明授权

US07144777B2 Non-volatile memory and manufacturing method thereof 有权
标题翻译：非易失性存储器及其制造方法
公开(公告)号：US07144777B2
公开(公告)日：2006-12-05
申请号：US11066994
申请日：2005-02-25
申请人： Tzung-Han Lee , Wen-Jeng Lin , Kuang-Pi Lee , Blue Larn
发明人： Tzung-Han Lee , Wen-Jeng Lin , Kuang-Pi Lee , Blue Larn
IPC分类号： H01L21/336
CPC分类号： H01L29/792 , H01L27/115 , H01L27/11568 , H01L29/6653
摘要： A non-volatile memory comprising a substrate, a stacked gate structure, a conductive spacer, an oxide/nitride/oxide layer, buried doping regions, a control gate and an insulating layer. The stacked gate structure is disposed on the substrate. The stacked gate structure comprises a gate dielectric layer, a select gate and a cap layer. The conductive spacer is disposed on the sidewalls of the stacked gate structure. The oxide/nitride/oxide layer is disposed between the conductive spacer and the stacked gate structure and between the conductive spacer and the substrate. The buried doping regions are disposed in the substrate outside the conductive spacer on each side of the stacked gate structure. The control gate is disposed over the stacked gate structure and electrically connected to the conductive spacer. The insulating layer is disposed between the buried doping layer and the control gate.
摘要翻译：包括衬底，堆叠栅极结构，导电间隔物，氧化物/氮化物/氧化物层，掩埋掺杂区域，控制栅极和绝缘层的非易失性存储器。层叠的栅极结构设置在基板上。堆叠栅极结构包括栅极介电层，选择栅极和盖层。导电间隔物设置在堆叠栅结构的侧壁上。氧化物/氮化物/氧化物层设置在导电间隔物和层叠栅极结构之间以及导电间隔物和衬底之间。掩埋掺杂区域设置在层叠栅极结构的每一侧上的导电间隔物外部的衬底中。控制栅极设置在堆叠的栅极结构上并电连接到导电间隔物。绝缘层设置在掩埋掺杂层和控制栅之间。

90. 发明申请

US20060250777A1 Loading and unloading mechanism for removable power supply modules 有权
标题翻译：可移动电源模块的装卸机制
公开(公告)号：US20060250777A1
公开(公告)日：2006-11-09
申请号：US11123105
申请日：2005-05-06
申请人： Yun-Chen Chen , Tzung-Han Lee
发明人： Yun-Chen Chen , Tzung-Han Lee
IPC分类号： H05K7/16
CPC分类号： G06F1/26 , G06F1/188
摘要： A loading and unloading mechanism adopted for use on removable power supply modules includes in one embodiment a connection plug installed on a removable power supply and a connection trough connected to a power supply circuit of a system end (such as a personal computer). Another embodiment includes a connection trough on a system end to be installed on a holding unit which is movable to adjust the position relative to the system end according to the size of the removable power supply so that the removable power supply can be fully loaded into the computer. The loading and unloading mechanism thus formed can be adapted for the removable power supply of varying sizes and specifications.
摘要翻译：在可移动电源模块中使用的装载和卸载机构包括在一个实施例中，安装在可拆卸电源上的连接插头和连接到系统端（例如个人计算机）的电源电路的连接槽。另一个实施例包括在系统端上的连接槽，该连接槽将安装在保持单元上，该保持单元可移动以根据可拆卸电源的尺寸来调节相对于系统端的位置，使得可移除的电源可以完全装入电脑。如此形成的装卸机构可适用于不同尺寸和规格的可拆卸电源。

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