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    • 81. 发明申请
    • Method for ashing
    • 灰化方法
    • US20050199262A1
    • 2005-09-15
    • US10510602
    • 2002-10-07
    • Jong-Po JeonYong-Hoon SongJin-Woo ParkSeung-Bok Yang
    • Jong-Po JeonYong-Hoon SongJin-Woo ParkSeung-Bok Yang
    • H01L21/3065H01L21/02H01L21/306H01L21/311B08B6/00
    • H01L21/02063H01L21/02071H01L21/31138
    • The present invention provides an ashing method using rapid heat transfer under high pressure. The present method, applicable to all photoresist ashing processes, can rapidly remove hardened photoresists without popping at the ashing step by baking high dose ion implanted silicon substrate on a hot plate, enhancing the ashing quantity, by drastically reducing the ashing process time, while allowing conventional equipments to be used further. The present method comprises an in situ baking step, wherein a silicon substrate is baked for a predetermined time period under a pressure of 10 Torr or more while it is placed on a hot plate; a vacuumizing step, wherein a stable vacuum status is achieved while the silicon substrate is placed on the hot plate; a gas processing step, wherein selected reaction gas is introduced into a reaction chamber; and an ashing step, wherein plasma is generated until almost all of the photoresists are removed.
    • 本发明提供一种在高压下快速传热的灰化方法。 适用于所有光刻胶灰化过程的本方法可以快速去除硬化的光致抗蚀剂,而不会在灰化步骤中通过在热板上烘烤高剂量离子注入的硅衬底,从而通过显着降低灰化处理时间来增强灰化量,同时允许 常规设备进一步使用。 本方法包括原位烘烤步骤,其中将硅衬底放置在热板上在10托或更大的压力下烘烤预定时间段; 一个真空步骤,其中当硅衬底放置在热板上时实现稳定的真空状态; 气体处理步骤,其中选择的反应气体被引入反应室; 和灰化步骤,其中产生等离子体直到几乎所有的光致抗蚀剂被去除。
    • 82. 发明申请
    • Semiconductor devices and fabrication methods thereof
    • 半导体器件及其制造方法
    • US20050139934A1
    • 2005-06-30
    • US10852823
    • 2004-05-25
    • Han-Choon LeeJin-Woo Park
    • Han-Choon LeeJin-Woo Park
    • H01L21/335H01L21/28H01L21/285H01L21/321H01L21/336H01L31/062
    • H01L21/28052H01L21/28518H01L21/321H01L29/665
    • Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device includes a silicon substrate, a source region and a drain region. A gate electrode is formed on the silicon substrate. Also, a metal silicide layer is formed on each of the gate electrode, the source region, and the drain region. The metal silicide layer has a thickness uniformity of about 1˜20%. A disclosed fabrication method includes forming a metal layer on a silicon substrate having a gate electrode, a source region, and a drain region; performing a plasma treatment on the metal layer; forming a protective layer on the metal layer; and heat treating the silicon substrate on which the protective layer is formed to thereby form a metal silicide layer. A gas that includes nitrogen is used as a plasma gas during the plasma treatment.
    • 公开了制造半导体器件的半导体器件和方法。 所公开的半导体器件包括硅衬底,源极区和漏极区。 在硅衬底上形成栅电极。 而且,在栅极电极,源极区域和漏极区域中的每一个上形成金属硅化物层。 金属硅化物层的厚度均匀度为约1〜20%。 所公开的制造方法包括在具有栅电极,源极区和漏极区的硅衬底上形成金属层; 对金属层进行等离子体处理; 在金属层上形成保护层; 对其上形成保护层的硅衬底进行热处理从而形成金属硅化物层。 在等离子体处理期间,使用包含氮气的气体作为等离子体气体。