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81. 发明申请

US20100013049A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20100013049A1
公开(公告)日：2010-01-21
申请号：US12504959
申请日：2009-07-17
申请人： Hiroyasu Tanaka , Megumi Ishiduki , Yosuke Komori , Yoshiaki Fukuzumi , Masaru Kito , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh , Yasuyuki Matsuoka
发明人： Hiroyasu Tanaka , Megumi Ishiduki , Yosuke Komori , Yoshiaki Fukuzumi , Masaru Kito , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh , Yasuyuki Matsuoka
IPC分类号： H01L23/522 , H01L21/02 , H01L21/768
CPC分类号： H01L27/11578 , H01L21/76816 , H01L21/76831 , H01L23/5226 , H01L27/11573 , H01L27/11575 , H01L27/11582 , H01L2924/0002 , H01L2924/00
摘要： A first multilayer body is formed by alternately layering dielectric films and electrode films on a substrate. Then, an end portion of the first multilayer body is processed into a staircase shape, and a first interlayer dielectric film is formed around the first multilayer body. Next, a plurality of contact holes having a diameter decreasing downward are formed in the first interlayer dielectric film so that the contact holes reach respective end portions of the electrode films. Then, a sacrificial material is buried in the contact holes. Next, a second multilayer body is formed immediately above the first multilayer body, and a second interlayer dielectric film is formed around the second multilayer body. Thereafter, a plurality of contact holes having a diameter decreasing downward are formed in the second interlayer dielectric film to communicate with the respective contact holes formed in the first interlayer dielectric film. Then, the sacrificial material is removed and a contact is buried inside the contact holes. The contact has a step difference.
摘要翻译：通过在基板上交替层叠电介质膜和电极膜来形成第一多层体。然后，将第一多层体的端部加工成阶梯状，在第一层叠体的周围形成第一层间绝缘膜。接下来，在第一层间电介质膜中形成直径减小的多个接触孔，使得接触孔到达电极膜的各个端部。然后，牺牲材料被埋在接触孔中。接着，在第一多层体的正上方形成第二层叠体，在第二层叠体的周围形成第二层间绝缘膜。此后，在第二层间电介质膜中形成直径减小的多个接触孔，与形成在第一层间绝缘膜中的各接触孔连通。然后，去除牺牲材料并将接触件埋在接触孔内。联系人有差异。

82. 发明申请

US20090179257A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20090179257A1
公开(公告)日：2009-07-16
申请号：US12345088
申请日：2008-12-29
申请人： Yosuke Komori , Masaru Kito , Megumi Ishiduki , Ryota Katsumata , Hiroyasu Tanaka , Masaru Kidoh , Yoshiaki Fukuzumi , Hideaki Aochi , Yasuyuki Matsuoka
发明人： Yosuke Komori , Masaru Kito , Megumi Ishiduki , Ryota Katsumata , Hiroyasu Tanaka , Masaru Kidoh , Yoshiaki Fukuzumi , Hideaki Aochi , Yasuyuki Matsuoka
IPC分类号： H01L29/792 , H01L21/762
CPC分类号： H01L29/792 , H01L21/8221 , H01L27/105 , H01L27/115 , H01L27/11556 , H01L27/11568 , H01L29/7926
摘要： A non-volatile semiconductor memory device includes a first columnar semiconductor layer and a plurality of first conductive layers formed such that a charge storage layer for storing charges is sandwiched between the first conductive layers and the first columnar semiconductor layer. Also, the non-volatile semiconductor memory device includes a second columnar semiconductor layer and a second conductive layer formed such that an insulating layer is sandwiched between the second conductive layer and the second columnar semiconductor layer, the second conductive layer being repeatedly provided in a line form by providing a certain interval in a first direction perpendicular to a laminating direction. A first sidewall conductive layer being in contact with the second conductive layer and extending in the first direction is formed on a sidewall along a longitudinal direction of the second conductive layer.
摘要翻译：非挥发性半导体存储器件包括第一柱状半导体层和形成为使得用于存储电荷的电荷存储层夹在第一导电层和第一柱状半导体层之间的多个第一导电层。此外，非挥发性半导体存储器件包括第二柱状半导体层和形成为使得绝缘层夹在第二导电层和第二柱状半导体层之间的第二导电层，第二导电层重复地设置在一行中通过在与层叠方向垂直的第一方向上设置一定间隔来形成。沿着第二导电层的纵向方向在侧壁上形成与第二导电层接触并沿第一方向延伸的第一侧壁导电层。

83. 发明授权

US08410538B2 Semiconductor memory device and method for manufacturing same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US08410538B2
公开(公告)日：2013-04-02
申请号：US12834390
申请日：2010-07-12
申请人： Megumi Ishiduki , Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hideaki Aochi
发明人： Megumi Ishiduki , Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hideaki Aochi
IPC分类号： H01L29/66
CPC分类号： H01L27/11578 , H01L27/11582 , H01L29/7926
摘要： According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a memory film, and a SiGe film. The stacked body includes a plurality of conductive layers and a plurality of insulating layers alternately stacked above the substrate. The memory film includes a charge storage film. The memory film is provided on a sidewall of a memory hole punched through the stacked body. The SiGe film is provided inside the memory film in the memory hole.
摘要翻译：根据一个实施例，半导体存储器件包括衬底，层叠体，存储膜和SiGe膜。层叠体包括交替层叠在基板的上方的多个导电层和多个绝缘层。记忆膜包括电荷存储膜。记忆膜设置在穿过堆叠体的冲击的存储孔的侧壁上。 SiGe膜被提供在存储器孔内的记忆膜内部。

84. 发明申请

US20110227140A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20110227140A1
公开(公告)日：2011-09-22
申请号：US12834390
申请日：2010-07-12
申请人： Megumi ISHIDUKI , Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hideaki Aochi
发明人： Megumi ISHIDUKI , Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hideaki Aochi
IPC分类号： H01L27/115 , H01L21/8246
CPC分类号： H01L27/11578 , H01L27/11582 , H01L29/7926
摘要： According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a memory film, and a SiGe film. The stacked body includes a plurality of conductive layers and a plurality of insulating layers alternately stacked above the substrate. The memory film includes a charge storage film. The memory film is provided on a sidewall of a memory hole punched through the stacked body. The SiGe film is provided inside the memory film in the memory hole.
摘要翻译：根据一个实施例，半导体存储器件包括衬底，层叠体，存储膜和SiGe膜。层叠体包括交替层叠在基板的上方的多个导电层和多个绝缘层。记忆膜包括电荷存储膜。记忆膜设置在穿过堆叠体的冲击的存储孔的侧壁上。 SiGe膜被提供在存储器孔内的记忆膜内部。

85. 发明授权

US08350326B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US08350326B2
公开(公告)日：2013-01-08
申请号：US12839895
申请日：2010-07-20
申请人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kito , Masaru Kidoh , Hiroyasu Tanaka , Hideaki Aochi
发明人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kito , Masaru Kidoh , Hiroyasu Tanaka , Hideaki Aochi
IPC分类号： H01L29/792
CPC分类号： H01L29/7926 , H01L21/28282 , H01L27/11578 , H01L27/11582 , H01L29/42344 , H01L29/66833
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes first and second stacked structural bodies, first and second semiconductor pillars, a memory unit connection portion, a selection unit stacked structural body, first and second selection unit semiconductor pillars, a selection unit connection portion, and first to fifth interconnections. The semiconductor pillars pierce the stacked structural bodies. The first and second interconnections are connected to the first and second semiconductor pillars, respectively. The memory unit connection portion connects the first and second semiconductor pillars. The selection unit semiconductor pillars pierce the selection unit stacked structural body. The third and fourth interconnections are connected to the first and second selection unit semiconductor pillars, respectively. The selection unit connection portion connects the first and second selection unit semiconductor pillars. The fifth interconnection is connected to the third interconnection on a side opposite to the selection unit stacked structural body.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括第一和第二堆叠结构体，第一和第二半导体柱，存储单元连接部分，选择单元堆叠结构体，第一和第二选择单元半导体柱，选择单元连接部分，以及第一至第五互连。半导体支柱刺穿堆叠的结构体。第一和第二互连分别连接到第一和第二半导体柱。存储单元连接部连接第一和第二半导体柱。选择单元半导体柱刺穿选择单元堆叠结构体。第三和第四互连分别连接到第一和第二选择单元半导体柱。选择单元连接部分连接第一和第二选择单元半导体柱。第五互连在与选择单元堆叠结构体相反的一侧连接到第三互连。

86. 发明授权

US08154103B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08154103B2
公开(公告)日：2012-04-10
申请号：US12972243
申请日：2010-12-17
申请人： Hiroyasu Tanaka , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh , Yoshiaki Fukuzumi , Masaru Kito , Yasuyuki Matsuoka
发明人： Hiroyasu Tanaka , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh , Yoshiaki Fukuzumi , Masaru Kito , Yasuyuki Matsuoka
IPC分类号： H01L29/00 , H01L21/76
CPC分类号： H01L29/792 , H01L21/28282 , H01L27/11578 , H01L27/11582 , H01L29/0649 , H01L29/7923 , H01L29/7926
摘要： A semiconductor device has a substrate, a source region formed on the surface portion of the substrate, a first insulating layer formed on the substrate, a gate electrode formed on the first insulating layer, a second insulating layer formed on the gate electrode, a body section connected with the source region, penetrating through the first insulating layer, the gate electrode and the second insulating layer, and containing a void, a gate insulating film surrounding the body section, and formed between the body section and the gate electrode, and a drain region connected with the body section.
摘要翻译：半导体器件具有衬底，形成在衬底的表面部分上的源极区域，形成在衬底上的第一绝缘层，形成在第一绝缘层上的栅电极，形成在栅电极上的第二绝缘层，主体与源极区域连接，穿过第一绝缘层，栅电极和第二绝缘层，并且包含空隙，围绕主体部分的栅极绝缘膜，并且形成在主体部分和栅电极之间，并且漏极区域与主体部分连接。

87. 发明申请

US20110111579A1 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20110111579A1
公开(公告)日：2011-05-12
申请号：US13010466
申请日：2011-01-20
申请人： Masaru Kito , Ryota Katsumata , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Hideaki Aochi , Yasuyuki Matsuoka
发明人： Masaru Kito , Ryota Katsumata , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Hideaki Aochi , Yasuyuki Matsuoka
IPC分类号： H01L21/20
CPC分类号： H01L27/11578 , H01L21/8221 , H01L27/0688 , H01L27/11573 , H01L27/11582 , H01L29/66833 , H01L29/7923 , H01L29/7926
摘要： A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings includes: a memory columnar semiconductor extending in a direction perpendicular to a substrate; a tunnel insulation layer contacting the memory columnar semiconductor; a charge accumulation layer contacting the tunnel insulation layer and accumulating charges; a block insulation layer contacting the charge accumulation layer; and a plurality of memory conductive layers contacting the block insulation layer. The lower portion of the charge accumulation layer is covered by the tunnel insulation layer and the block insulation layer.
摘要翻译：非易失性半导体存储装置具有多个具有串联连接的多个电可重写存储单元的存储器串。每个存储器串包括：在垂直于衬底的方向上延伸的存储器柱状半导体; 与记录柱状半导体接触的隧道绝缘层; 与隧道绝缘层接触并积累电荷的电荷累积层; 与电荷累积层接触的块绝缘层; 以及与块绝缘层接触的多个存储器导电层。电荷累积层的下部被隧道绝缘层和块绝缘层覆盖。

88. 发明授权

US07927926B2 Non-volatile semiconductor storage device and method of manufacturing the same 有权
标题翻译：非易失性半导体存储装置及其制造方法
公开(公告)号：US07927926B2
公开(公告)日：2011-04-19
申请号：US12908546
申请日：2010-10-20
申请人： Ryota Katsumata , Masaru Kito , Hiroyasu Tanaka , Masaru Kidoh , Yoshiaki Fukuzumi , Hideaki Aochi , Yasuyuki Matsuoka
发明人： Ryota Katsumata , Masaru Kito , Hiroyasu Tanaka , Masaru Kidoh , Yoshiaki Fukuzumi , Hideaki Aochi , Yasuyuki Matsuoka
IPC分类号： H01L21/82
CPC分类号： H01L21/764 , H01L27/11551 , H01L27/11556 , H01L27/11575 , H01L27/11578
摘要： A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings comprises: a first columnar semiconductor layer extending in a vertical direction to a substrate; a charge accumulation layer formed around the first columnar semiconductor layer via a first insulation layer; and a first conductive layer formed around the charge accumulation layer via a second insulation layer. Each of the first conductive layers is formed to expand in a two-dimensional manner, and air gaps are formed between the first conductive layers located there above and there below.
摘要翻译：非易失性半导体存储装置具有多个具有串联连接的多个电可重写存储单元的存储器串。每个存储器串包括：沿垂直方向延伸到衬底的第一柱状半导体层; 电荷累积层，经由第一绝缘层形成在第一柱状半导体层周围; 以及经由第二绝缘层形成在电荷累积层周围的第一导电层。每个第一导电层被形成为以二维方式膨胀，并且在位于其上方和下方的第一导电层之间形成气隙。

89. 发明申请

US20110084331A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110084331A1
公开(公告)日：2011-04-14
申请号：US12972243
申请日：2010-12-17
申请人： Hiroyasu Tanaka , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh , Yoshiaki Fukuzumi , Masaru Kito , Yasuyuki Matsuoka
发明人： Hiroyasu Tanaka , Hideaki Aochi , Ryota Katsumata , Masaru Kidoh , Yoshiaki Fukuzumi , Masaru Kito , Yasuyuki Matsuoka
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , H01L21/28282 , H01L27/11578 , H01L27/11582 , H01L29/0649 , H01L29/7923 , H01L29/7926
摘要： A semiconductor device has a substrate, a source region formed on the surface portion of the substrate, a first insulating layer formed on the substrate, a gate electrode formed on the first insulating layer, a second insulating layer formed on the gate electrode, a body section connected with the source region, penetrating through the first insulating layer, the gate electrode and the second insulating layer, and containing a void, a gate insulating film surrounding the body section, and formed between the body section and the gate electrode, and a drain region connected with the body section.
摘要翻译：半导体器件具有衬底，形成在衬底的表面部分上的源极区域，形成在衬底上的第一绝缘层，形成在第一绝缘层上的栅电极，形成在栅电极上的第二绝缘层，主体与源极区域连接，穿过第一绝缘层，栅电极和第二绝缘层，并且包含空隙，围绕主体部分的栅极绝缘膜，并且形成在主体部分和栅电极之间，并且漏极区域与主体部分连接。

90. 发明授权

US07847342B2 Non-volatile semiconductor storage device and method of manufacturing the same 有权
标题翻译：非易失性半导体存储装置及其制造方法
公开(公告)号：US07847342B2
公开(公告)日：2010-12-07
申请号：US12325023
申请日：2008-11-28
申请人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hiroyasu Tanaka , Hideaki Aochi , Yasuyuki Matsuoka
发明人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hiroyasu Tanaka , Hideaki Aochi , Yasuyuki Matsuoka
IPC分类号： H01L27/115 , H01L21/336 , H01L29/792 , H01L21/8247
CPC分类号： H01L27/11578 , G11C16/0483 , H01L21/8221 , H01L27/115 , H01L27/11556
摘要： A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings includes: a first columnar semiconductor layer extending in a direction perpendicular to a substrate and having a first hollow extending downward from its upper end; a first insulation layer formed in contact with the outer wall of the first columnar semiconductor layer; a second insulation layer formed on the inner wall of the first columnar semiconductor layer so as to leave the first hollow; and a plurality of first conductive layers formed to sandwich the first insulation layer with the first columnar semiconductor layer and functioning as control electrodes of the memory cells.
摘要翻译：非易失性半导体存储装置具有多个具有串联连接的多个电可重写存储单元的存储器串。每个存储器串包括：第一柱状半导体层，其在垂直于衬底的方向上延伸并具有从其上端向下延伸的第一中空; 形成为与第一柱状半导体层的外壁接触的第一绝缘层; 第二绝缘层，形成在第一柱状半导体层的内壁上以离开第一中空部; 以及形成为将第一绝缘层与第一柱状半导体层夹在中间并用作存储单元的控制电极的多个第一导电层。

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