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    • 81. 发明授权
    • Semiconductor processing method of making a hemispherical grain (HSG) polysilicon layer
    • US06194264B1
    • 2001-02-27
    • US08926596
    • 1997-08-20
    • Er-Xang PingRandhir P. S. Thakur
    • Er-Xang PingRandhir P. S. Thakur
    • H01L218242
    • H01L28/84
    • A semiconductor processing method of providing a hemispherical grain polysilicon layer atop a substrate includes, a) providing a substantially amorphous layer of silicon over a substrate at a selected temperature; b) raising the temperature of the substantially amorphous silicon layer to a higher dielectric layer deposition temperature, the temperature raising being effective to transform the amorphous silicon layer into hemispherical grain polysilicon; and c) depositing a dielectric layer over the silicon layer at the higher dielectric deposition temperature. Transformation to hemispherical grain might occur during the temperature rise to the higher dielectric layer deposition temperature, after the higher dielectric layer deposition temperature has been achieved but before dielectric layer deposition, or after the higher dielectric layer deposition temperature has been achieved and during dielectric layer deposition. The temperature raising step can include initially raising the silicon layer temperature to an annealing temperature below the higher dielectric layer deposition temperature, and maintaining the silicon layer at the annealing temperature for a time period effective to increase its degree of surface roughness. Subsequently the silicon layer temperature is raised to the higher dielectric layer deposition temperature, with such further increasing the degree of surface roughness of the resultant silicon layer.
    • 82. 发明授权
    • Barrier layer fabrication methods
    • 阻隔层制造方法
    • US06180481B2
    • 2001-01-30
    • US09004932
    • 1998-01-09
    • Scott J. DeboerRandhir P. S. Thakur
    • Scott J. DeboerRandhir P. S. Thakur
    • H01L218242
    • H01L28/75H01L21/28568H01L27/1085H01L28/55H01L28/60
    • Exemplary embodiments of the present invention teach a process for forming a storage capacitor for a semiconductor assembly, by forming a first storage electrode having a top surface consisting of titanium nitride; forming a barrier layer directly on the titanium nitride, the barrier layer (a material containing any one of amorphous silicon, tantalum, titanium, or strontium) being of sufficient thickness to substantially limit the oxidation of the titanium nitride when said semiconductor assembly is subjected to an oxidizing agent (either an oxidizing agent or an nitridizing agent); converting a portion of the barrier layer to a dielectric compound; depositing a storage cell dielectric directly on the dielectric compound, the storage cell dielectric being of the same chemical makeup as the dielectric compound and thereby using the dielectric compound as a nucleation surface; and forming a second capacitor electrode on the storage cell dielectric.
    • 本发明的示例性实施例通过形成具有由氮化钛组成的顶表面的第一存储电极来教导形成用于半导体组件的存储电容器的工艺; 在氮化钛上直接形成阻挡层,阻挡层(含有非晶硅,钽,钛或锶中的任何一种的材料)具有足够的厚度,以在所述半导体组件经受时基本上限制氮化钛的氧化 氧化剂(氧化剂或氮化剂); 将阻挡层的一部分转变为电介质化合物; 将存储单元电介质直接沉积在电介质化合物上,储能单元电介质具有与电介质化合物相同的化学组成,从而使用电介质化合物作为成核面; 以及在所述存储单元电介质上形成第二电容器电极。
    • 89. 发明授权
    • Method for cleaning semiconductor wafers
    • 清洗半导体晶圆的方法
    • US5994240A
    • 1999-11-30
    • US915517
    • 1997-08-13
    • Randhir P. S. Thakur
    • Randhir P. S. Thakur
    • C23C16/44H01L21/31
    • C23C16/4405Y10S438/905Y10S438/906
    • A low temperature in-situ precleaning process for a semiconductor surface is disclosed. Ambient reactant gases, such as NF.sub.3 and GeH.sub.4, having a partial pressure of between approximately 10.sup.-8 and 700 Torr, are pulsed in a batch furnace at temperatures in the approximate range of 250 to 950 degrees Celsius and pressure in the approximate range of 4.times.10.sup.3 to 20.times.10.sup.3 Torr. This forms material on the surface that easily vaporizes in that temperature and pressure range, providing a clean surface for formation of the next layer. A similar in-situ cleaning process is performed at temperature ranges of between approximately 300 to 1,000 degrees Celsius for the equipment utilized in processing semiconductor substrates.
    • 公开了半导体表面的低温原位预清洗方法。 具有介于约10-8和700托之间的分压的环境反应物气体,例如NF 3和GeH 4在分压炉中在大约250至950摄氏度的温度下脉冲,压力约为4×10 3 至20x103乇。 这在表面上形成在该温度和压力范围内容易蒸发的材料,提供用于形成下一层的干净的表面。 对于处理半导体衬底中使用的设备,在大约300至1000摄氏度之间的温度范围内进行类似的原位清洁过程。
    • 90. 发明授权
    • Method for depositing cell nitride with improved step coverage using
MOCVD in a wafer deposition system
    • 在晶片沉积系统中使用MOCVD沉积具有改进的台阶覆盖的单元氮化物的方法
    • US5989338A
    • 1999-11-23
    • US561735
    • 1995-11-22
    • Scott J. DeBoerRandhir P. S. Thakur
    • Scott J. DeBoerRandhir P. S. Thakur
    • C30B25/02H01L21/02H01L21/314H01L21/318C30B25/04
    • H01L28/40C30B25/02C30B29/38H01L21/3185
    • An embodiment of the present invention teaches a method for forming a storage capacitor during semiconductor memory device fabrication, the method comprising the steps of: forming a first capacitor plate structure comprising a polysilicon material having an aspect ratio comprising a vertical component and a horizontal component; wherein the vertical component of the first capacitor plate structure is greater in dimension than the horizontal component of the first capacitor plate structure; depositing a silicon nitride layer over the first capacitor plate structure by exposing the first capacitor plate structure to a gas vapor phase of an organometallic precursor and to an nitrogen based gas in an Metal Organic Chemical Vapor Deposition (MOCVD) chamber; and forming a second capacitor plate structure over the silicon nitride layer, the second capacitor plate structure being positioned to span at least a portion of the first capacitor plate structure.
    • 本发明的实施例教导了一种在半导体存储器件制造期间形成存储电容器的方法,该方法包括以下步骤:形成第一电容器板结构,其包括具有垂直分量和水平分量的纵横比的多晶硅材料; 其中所述第一电容器板结构的垂直分量的尺寸大于所述第一电容器板结构的水平分量; 通过在金属有机化学气相沉积(MOCVD)室中将第一电容器板结构暴露于有机金属前体的气相和氮基气体,在第一电容器板结构上沉积氮化硅层; 以及在所述氮化硅层上形成第二电容器板结构,所述第二电容器板结构被定位成跨越所述第一电容器板结构的至少一部分。