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    • 82. 发明授权
    • Printed circuit board terminal device
    • 印刷电路板终端设备
    • US4680675A
    • 1987-07-14
    • US725814
    • 1985-04-22
    • Hideo Sato
    • Hideo Sato
    • H01J17/34H05K1/11H05K1/14H05K1/18H05K3/36H05K7/06
    • H01R12/62H05K1/118H05K3/361H05K1/189H05K2201/09445H05K2201/10128H05K2201/10136H05K2201/10681H05K2201/10689
    • A printed circuit terminal device which includes a terminal array having very fine pitch between lead lines from a circuit portion including a flexible printed circuit board having a terminal array pattern which corresponds to the terminal array and wiring pattern and which are arranged to alternately extend from two sides of the terminal array pattern thus changing the pitch of the wiring pattern on the flexible printed circuit board to be twice that of the pitch of the wiring pattern of the terminal array. This allows a circuit to be easily and reliably coupled to the electrical terminals having very fine pitch and the formation of the wiring pattern of a coupling portion with the circuit portion can be easily performed and results in an arrangement of very small size. The flexible printed circuit board can be manufactured at low cost and the yield can be increased. Also, circuit elements such as resistors can be mounted on the wiring pattern without changing the wiring pitch.
    • 一种印刷电路端子装置,其包括端子阵列,该引线从包括具有对应于端子阵列的端子阵列图案的柔性印刷电路板和布线图案的电路部分的引线之间具有非常细的间距,并且布置成从两个 从而将柔性印刷电路板上的布线图案的间距改变为端子阵列的布线图案的间距的两倍。 这允许电路容易且可靠地耦合到具有非常细间距的电端子,并且可以容易地执行与电路部分的耦合部分的布线图案的形成,并且导致非常小的尺寸的布置。 可以以低成本制造柔性印刷电路板,并且可以提高成品率。 此外,诸如电阻器的电路元件可以安装在布线图案上而不改变布线间距。
    • 85. 发明授权
    • Address signal generating circuit for a memory circuit
    • 用于存储电路的地址信号发生电路
    • US4587558A
    • 1986-05-06
    • US540553
    • 1983-10-11
    • Hiroyuki SugiyamaNobuaki TakahashiTakeshi ShibamotoHideo SatoYoshiaki AmanoKoji Tanaka
    • Hiroyuki SugiyamaNobuaki TakahashiTakeshi ShibamotoHideo SatoYoshiaki AmanoKoji Tanaka
    • G11B3/00G06F12/02G11B7/00G11B7/004G11B20/10G11B27/30G11C8/00H04N1/21H04N5/781H04N5/907H04N9/806H04N9/81H04N5/14
    • G06F12/0207G11B27/3027H04N1/21H04N5/907H04N9/8066H04N9/81
    • An address signal generating circuit for a memory circuit comprises a first latch driver for producing a signal corresponding to upper m bits of a 2m-bit address signal which is to be generated, where m is an integer, a second latch driver for producing a signal corresponding to lower m bits of the 2m-bit address signal, a circuit for dividing a 2m-bit signal which has a predetermined value into upper m bits and lower m bits and for alternately producing signals corresponding to the upper and lower m bits, a first adder for adding the value of n bits in the signal which has the predetermined value and the value of upper n bits in an output signal of the first or second latch driver and for producing an n-bit signal, where n is an integer less than m, a second adder for adding the value of m-n bits in the signal which has the predetermined value and lower m-n bits of the output signal of the first or second latch driver and for producing an (m-n)-bit signal, an adding circuit for supplying a carry signal of the first or second adder to the second or the first adder so as to add the carry signal with another input signal of the second or the first adder, and a driver control circuit for controlling the first and second latch drivers to alternately and time-divisionally produce upper m bits of the 2m-bit address signal and lower m bits of the 2m-bit address signal by alternately latching an m-bit output signal of the first and second adders in the first and second latch drivers.
    • 一种用于存储电路的地址信号产生电路包括:第一锁存驱动器,用于产生对应于要生成的2m位地址信号的高m位的信号,其中m是整数;第二锁存驱动器,用于产生信号 对应于2m位地址信号的较低m位,用于将具有预定值的2m位信号划分为上m位和低m位并用于交替产生对应于上m位和下m位的信号的电路, 第一加法器,用于将具有预定值的信号中的n位的值和第一或第二锁存驱动器的输出信号中的高n位的值相加,并产生n位信号,其中n是整数减去 m的第二加法器,用于将具有第一或第二锁存驱动器的输出信号的预定值和较低mn位的信号中的mn位的值相加并用于产生(mn)位信号;第二加法器, 供应 将第一或第二加法器的进位信号输入到第二加法器或第一加法器,以将进位信号与第二加法器或第一加法器的另一输入信号相加,以及驱动器控制电路,用于将第一和第二锁存驱动器控制为 通过交替地锁存第一和第二锁存驱动器中的第一和第二加法器的m位输出信号,交替地并且分时地产生2m位地址信号的高位m位和2m位地址信号的较低位。
    • 86. 发明授权
    • Pressure transducer using integrated circuit elements
    • 使用集成电路元件的压力传感器
    • US4558238A
    • 1985-12-10
    • US536870
    • 1983-09-29
    • Kazuji YamadaHideo SatoYukitaka KitadateKanji KawakamiKazuo KatoTakao Sasayama
    • Kazuji YamadaHideo SatoYukitaka KitadateKanji KawakamiKazuo KatoTakao Sasayama
    • G01L9/04G01L9/00G01L9/06
    • G01L9/065Y10S323/907
    • A pressure transducer comprises a pressure sensor including a bridge connection of gauging resistors formed on a semiconductor substrate, and a power supply connected to the pressure sensor for driving it and basically acting as a constant current source. The power supply includes at least two transistors formed on the semiconductor substrate. One of the transistors provides a collector current which is less in temperature-dependency relative to that of the other transistor, and the other transistor has a collector circuit connected to the pressure sensor and provides a collector current corresponding to a sum of a substantially temperature-dependent current and a substantially temperature-independent current. A ratio of the temperature-dependent current to the temperature-independent current is adjusted by selecting operation characteristics of the two transistors such that a temperature characteristic of the collector current of the other transistor is substantially inversely proportional to a temperature characteristic of the output of the pressure sensor when it is driven with a constant voltage.
    • 压力传感器包括压力传感器,该压力传感器包括形成在半导体衬底上的测量电阻器的桥连接器,以及连接到压力传感器的电源,用于驱动它并基本上作为恒定电流源。 电源包括形成在半导体衬底上的至少两个晶体管。 晶体管中的一个提供了相对于另一个晶体管的温度依赖性较小的集电极电流,另一个晶体管具有连接到压力传感器的集电极电路,并且提供对应于基本上温度相关的总和的集电极电流, 依赖电流和基本上温度无关的电流。 通过选择两个晶体管的工作特性来调节温度依赖电流与独立于温度的电流的比例,使得另一个晶体管的集电极电流的温度特性与输出的温度特性成反比 压力传感器用恒定电压驱动时。