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81. 发明授权

US07389097B2 Receiver, transceiver circuit, signal transmission method, and signal transmission system 有权
标题翻译：接收机，收发电路，信号传输方式和信号传输系统
公开(公告)号：US07389097B2
公开(公告)日：2008-06-17
申请号：US10931201
申请日：2004-09-01
申请人： Hirotaka Tamura
发明人： Hirotaka Tamura
IPC分类号： H04B1/18
CPC分类号： H03F3/45183 , H03F3/45475 , H03F3/45762 , H03F3/45986 , H04L5/14 , H04L5/1461 , H04L7/033 , H04L25/0274 , H04L25/0292 , H04L25/061
摘要： A receiver has an offset application circuit for applying a known offset to an input signal, and a decision circuit for comparing the offset-applied input signal with a reference voltage. The level of the input signal is determined based on the known offset and on the result output from the decision circuit. With this configuration, a large common mode voltage can be eliminated in a circuit used for signal transmission.
摘要翻译：接收机具有用于向输入信号施加已知偏移的偏移应用电路，以及用于将偏移施加的输入信号与参考电压进行比较的判定电路。输入信号的电平根据已知偏移量和决策电路的结果输出来确定。通过这种配置，可以在用于信号传输的电路中消除大的共模电压。

82. 发明授权

US07173965B2 Equalizing a signal for transmission 有权
标题翻译：将信号均衡以进行传输
公开(公告)号：US07173965B2
公开(公告)日：2007-02-06
申请号：US10357691
申请日：2003-02-03
申请人： Yoichi Koyanagi , Yasuo Hidaka , Weixin Gai , Hirotaka Tamura
发明人： Yoichi Koyanagi , Yasuo Hidaka , Weixin Gai , Hirotaka Tamura
IPC分类号： H03K5/159 , H04B3/04 , H04B3/14 , H01P9/00
CPC分类号： H04L25/03343
摘要： Equalizing a signal includes receiving a data sequence signal having an amplitude. An adjustment of the data sequence signal operable to equalize the data sequence signal is determined. A control signal operable to adjust the amplitude of the data sequence signal in accordance with the adjustment is generated, where the control signal has an analog form. The amplitude of the data sequence signal is adjusted using the control signal in order to equalize the data sequence signal.
摘要翻译：信号均衡包括接收具有振幅的数据序列信号。确定可操作以均衡数据序列信号的数据序列信号的调整。产生用于根据调整来调节数据序列信号的幅度的控制信号，其中控制信号具有模拟形式。使用控制信号调整数据序列信号的幅度，以便均衡数据序列信号。

83. 发明申请

US20060274837A1 Receiver circuit, signal transmission system, and receiver circuit device used for high- speed signal transmission 审中-公开
标题翻译：接收机电路，信号传输系统以及用于高速信号传输的接收机电路设备
公开(公告)号：US20060274837A1
公开(公告)日：2006-12-07
申请号：US11505456
申请日：2006-08-17
申请人： Yoshiyasu Doi , Satoshi Matsubara , Hirotaka Tamura
发明人： Yoshiyasu Doi , Satoshi Matsubara , Hirotaka Tamura
IPC分类号： H04L25/00 , H04L27/00
CPC分类号： H03K5/2481 , G11C27/02 , H03F2203/7236 , H03K5/249
摘要： A receiver circuit has a sampling circuit, a buffer circuit, a determining circuit, and a buffer control circuit. The sampling circuit samples an input signal, and the buffer circuit buffers an output of the sampling circuit. The determining circuit determines an output of the buffer circuit, and the buffer control circuit keeps a small input signal dependency of the output of the buffer circuit until carrying out the sampling. Consequently, an inter symbol interference caused by characteristics of a transmission path which poses a problem for receiving a high-speed signal can be invalidated, and therefore the high-speed received signal can be determined with a higher accuracy.
摘要翻译：接收器电路具有采样电路，缓冲电路，确定电路和缓冲器控制电路。采样电路对输入信号进行采样，缓冲电路对采样电路的输出进行缓冲。确定电路确定缓冲电路的输出，并且缓冲器控制电路保持缓冲电路的输出的小的输入信号依赖性，直到进行采样。因此，由于传输路径的特性导致的接收高速信号的问题引起的符号间干扰可能无效，因此能够以更高的精度确定高速接收信号。

84. 发明授权

US06707727B2 Timing signal generator for correctly transmitting a signal at high speed without waveform distortion 有权
标题翻译：定时信号发生器，用于在没有波形失真的情况下高速正确传输信号
公开(公告)号：US06707727B2
公开(公告)日：2004-03-16
申请号：US10126665
申请日：2002-04-22
申请人： Hirotaka Tamura , Hideki Takauchi , Tsz-Shing Cheung , Kohtaroh Gotoh
发明人： Hirotaka Tamura , Hideki Takauchi , Tsz-Shing Cheung , Kohtaroh Gotoh
IPC分类号： G11C700
CPC分类号： H04L25/0282 , G11C7/1012 , G11C7/1048 , G11C7/1051 , G11C7/1069 , G11C7/22 , G11C7/222 , G11C8/08 , G11C11/4076 , G11C11/4096 , H03K19/018571 , H03L7/07 , H03L7/0812 , H04L25/0272 , H04L25/0274 , H04L25/0276 , H04L25/0278 , H04L25/028 , H04L25/0288 , H04L25/0292 , H04L25/03878 , H04L25/03885 , H04L25/10
摘要： A driver circuit transmits a signal to a receiver circuit through a signal transmission line. The driver circuit has an output driver, a front driver, and a level adjuster. The front driver drives the output driver, and the level adjuster adjusts the output level of the front driver. The output driver generates a signal whose level is variable in response to an output level of the front driver.
摘要翻译：驱动电路通过信号传输线将信号发送到接收机电路。驱动器电路具有输出驱动器，前驱动器和电平调节器。前驱动器驱动输出驱动器，电平调节器调节前驱动器的输出电平。输出驱动器响应于前驱动器的输出电平产生电平可变的信号。

85. 发明授权

US06493394B2 SIGNAL TRANSMISSION SYSTEM FOR TRANSMITTING SIGNALS BETWEEN LSI CHIPS, RECEIVER CIRCUIT FOR USE IN THE SIGNAL TRANSMISSION SYSTEM, AND SEMICONDUCTOR MEMORY DEVICE APPLYING THE SIGNAL TRANSMISSION SYSTEM 有权
公开(公告)号：US06493394B2
公开(公告)日：2002-12-10
申请号：US10076526
申请日：2002-02-19
申请人： Hirotaka Tamura , Miyoshi Saito , Kohtaroh Gotoh , Shigetoshi Wakayama , Junji Ogawa , Hisakatsu Araki , Tsz-shing Cheung
发明人： Hirotaka Tamura , Miyoshi Saito , Kohtaroh Gotoh , Shigetoshi Wakayama , Junji Ogawa , Hisakatsu Araki , Tsz-shing Cheung
IPC分类号： H04B300
CPC分类号： H04L25/0276 , G06F13/4243 , H04L25/0278 , H04L25/0282 , H04L25/0288 , H04L25/497 , Y02D10/14 , Y02D10/151
摘要： A signal transmission system has a response time of a signal transmission line which is set approximately equal to or longer than the length of a transmitted symbol. More specifically, terminal resistance is set larger than the characteristic impedance of the signal transmission line, driver output resistance is set to a large value, or a damping resistor is provided in series with the signal transmission line. With this configuration, signal power can be reduced drastically.

86. 发明授权

US06191441B1 Ferroelectric memory device and its drive method 失效
标题翻译：铁电存储器及其驱动方式
公开(公告)号：US06191441B1
公开(公告)日：2001-02-20
申请号：US09178426
申请日：1998-10-26
申请人： Masaki Aoki , Hirotaka Tamura , Hideki Takauchi , Takashi Eshita
发明人： Masaki Aoki , Hirotaka Tamura , Hideki Takauchi , Takashi Eshita
IPC分类号： H01L2976
CPC分类号： H01L27/11502 , G11C11/22 , H01L21/28291
摘要： A ferroelectric memory capable of writing data at a small operation voltage has an insulated-gate field effect transistor, a ferroelectric film, and a pair of capacitor electrodes formed on the ferroelectric film and facing each other, one of the pair of capacitor electrodes being electrically connected to the insulated gate. A ferroelectric memory device with a simple structure has an insulated-gate field effect transistor including a source, a drain, and an insulated gate, and a ferroelectric capacitor connected between the drain and the insulated gate.
摘要翻译：能够以小的操作电压写入数据的铁电存储器具有绝缘栅场效应晶体管，铁电体膜和形成在铁电体膜上并且彼此面对的一对电容器电极，所述一对电容器电极中的一个电气连接到绝缘门。具有简单结构的铁电存储器件具有包括源极，漏极和绝缘栅极的绝缘栅场效应晶体管和连接在漏极和绝缘栅极之间的铁电电容器。

87. 发明授权

US5623439A Ferroelectric memory device 失效
标题翻译：铁电存储器件
公开(公告)号：US5623439A
公开(公告)日：1997-04-22
申请号：US439780
申请日：1995-05-12
申请人： Kohtaroh Gotoh , Hirotaka Tamura , Akira Yoshida
发明人： Kohtaroh Gotoh , Hirotaka Tamura , Akira Yoshida
IPC分类号： H01L21/8247 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L29/78 , H01L29/788 , H01L29/792
CPC分类号： H01L29/78391
摘要： A ferroelectric memory device includes a channel layer of a dielectric material containing oxygen, source and drain electrode provided on the channel layer across a channel region defined in the channel layer, a ferroelectric memory layer provided on the channel layer so as to cover at least the channel region, and a write control electrode provided on the ferroelectric memory layer for applying an electric field thereto.
摘要翻译：铁电存储器件包括在沟道层上设置有沟道层的介电材料的沟道层，该沟道层包含氧，源极和漏极，沟道层中限定的沟道区，设置在沟道层上的铁电存储层，以至少覆盖以及设置在强电介质存储层上用于对其施加电场的写入控制电极。

88. 发明授权

US5291274A Electron device having a current channel of dielectric material 失效
标题翻译：具有介电材料的电流通道的电子器件
公开(公告)号：US5291274A
公开(公告)日：1994-03-01
申请号：US779004
申请日：1991-11-20
申请人： Hirotaka Tamura
发明人： Hirotaka Tamura
IPC分类号： H01L45/00 , H01L29/06 , H01L39/22
CPC分类号： H01L45/00 , Y10S505/702
摘要： An electron device comprises a first dielectric layer (103) having a first thickness determined to allow the tunneling of carriers therethrough and a first dielectric constant, a second dielectric layer (104) provided in contact with the first dielectric layer, the second dielectric layer having a second thickness substantially larger than the first thickness and a second dielectric constant that is substantially larger than the first dielectric constant, a first electrode (101) provided on the first dielectric layer for injecting the carriers, and a second electrode (108) provided in contact with the second dielectric layer for controlling a flow of the carriers through the second dielectric layer in response to a control voltage supplied thereto.
摘要翻译： PCT No.PCT / JP91 / 00372 Sec。 371日期1991年11月20日 102（e）1991年11月20日日期PCT 1991年3月20日PCT PCT。出版物WO91 / 15033 日期：1991年10月3日。电子器件包括第一介电层（103），其具有确定允许载流子穿透其中的第一厚度和第一介电常数的第一介电层（103），与第一介电层层，所述第二介电层具有基本上大于所述第一厚度的第二厚度和基本上大于所述第一介电常数的第二介电常数;设置在所述第一介电层上用于注入载流子的第一电极，第二电极（108），其设置成与第二电介质层接触，用于响应于提供给其的控制电压来控制载流子通过第二介电层的流动。

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