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81. 发明授权

US08247905B2 Formation of vertical devices by electroplating 有权
标题翻译：通过电镀形成垂直装置
公开(公告)号：US08247905B2
公开(公告)日：2012-08-21
申请号：US12538782
申请日：2009-08-10
申请人： Hariklia Deligianni , Qiang Huang , John P. Hummel , Lubomyr T. Romankiw , Mary B. Rothwell
发明人： Hariklia Deligianni , Qiang Huang , John P. Hummel , Lubomyr T. Romankiw , Mary B. Rothwell
IPC分类号： H01L29/40
CPC分类号： H01L21/76879 , H01L21/2885 , Y10S205/925
摘要： The present invention is related to a method for forming vertical conductive structures by electroplating. Specifically, a template structure is first formed, which includes a substrate, a discrete metal contact pad located on the substrate surface, an inter-level dielectric (ILD) layer over both the discrete metal contact pad and the substrate, and a metal via structure extending through the ILD layer onto the discrete metal contact pad. Next, a vertical via is formed in the template structure, which extends through the ILD layer onto the discrete metal contact pad. A vertical conductive structure is then formed in the vertical via by electroplating, which is conducted by applying an electroplating current to the discrete metal contact pad through the metal via structure. Preferably, the template structure comprises multiple discrete metal contact pads, multiple metal via structures, and multiple vertical vias for formation of multiple vertical conductive structures.
摘要翻译：本发明涉及通过电镀形成垂直导电结构的方法。具体地，首先形成模板结构，其包括衬底，位于衬底表面上的离散金属接触焊盘，分立金属接触焊盘和衬底两者之间的级间电介质（ILD）层，以及金属通孔结构延伸穿过ILD层到分立的金属接触垫上。接下来，在模板结构中形成垂直通孔，其延伸穿过ILD层到分立的金属接触垫上。然后通过电镀在垂直通孔中形成垂直导电结构，电镀通过通过金属通孔结构将电镀电流施加到离散的金属接触焊盘来进行。优选地，模板结构包括多个分立的金属接触焊盘，多个金属通孔结构以及用于形成多个垂直导电结构的多个垂直通孔。

82. 发明申请

US20120061247A1 Method and Chemistry for Selenium Electrodeposition 有权
标题翻译：硒电沉积的方法与化学
公开(公告)号：US20120061247A1
公开(公告)日：2012-03-15
申请号：US12878811
申请日：2010-09-09
申请人： Shafaat Ahmed , Hariklia Deligianni
发明人： Shafaat Ahmed , Hariklia Deligianni
IPC分类号： C25D5/00 , C25D5/50 , C23C28/00 , C25D9/04
CPC分类号： C25D9/04 , C25D3/54 , C25D3/56 , C25D5/50 , C25D7/12 , H01L31/0272 , H01L31/0322 , Y02E10/541
摘要： Techniques for electrodepositing selenium (Se)-containing films are provided. In one aspect, a method of preparing a Se electroplating solution is provided. The method includes the following steps. The solution is formed from a mixture of selenium oxide; an acid selected from the group consisting of alkane sulfonic acid, alkene sulfonic acid, aryl sulfonic acid, heterocyclic sulfonic acid, aromatic sulfonic acid and perchloric acid; and a solvent. A pH of the solution is then adjusted to from about 2.0 to about 3.0. The pH of the solution can be adjusted to from about 2.0 to about 3.0 by adding a base (e.g., sodium hydroxide) to the solution. A Se electroplating solution, an electroplating method and a method for fabricating a photovoltaic device are also provided.
摘要翻译：提供了用于电沉积含硒（Se）的膜的技术。一方面，提供了一种制备Se电镀溶液的方法。该方法包括以下步骤。溶液由氧化硒的混合物形成; 选自烷烃磺酸，烯烃磺酸，芳基磺酸，杂环磺酸，芳族磺酸和高氯酸的酸; 和溶剂。然后将溶液的pH调节至约2.0至约3.0。通过向溶液中加入碱（例如氢氧化钠），可将溶液的pH调节至约2.0至约3.0。还提供了Se电镀溶液，电镀方法和制造光伏器件的方法。

83. 发明授权

US08115191B2 Self-constrained anisotropic germanium nanostructure from electroplating 有权
标题翻译：电镀自限制各向异性锗纳米结构
公开(公告)号：US08115191B2
公开(公告)日：2012-02-14
申请号：US12541559
申请日：2009-08-14
申请人： Guy Cohen , Hariklia Deligianni , Qiang Huang , Lubomyr T. Romankiw
发明人： Guy Cohen , Hariklia Deligianni , Qiang Huang , Lubomyr T. Romankiw
IPC分类号： H01L21/302
CPC分类号： C25D3/54 , B82Y10/00 , C25D5/022 , C25D7/123 , H01L21/0237 , H01L21/02532 , H01L21/02603 , H01L21/02628 , H01L21/02639 , Y10S977/762
摘要： A nanostructure comprising germanium, including wires of less than 1 micron in diameter and walls of less than 1 micron in width, in contact with the substrate and extending outward from the substrate is provided along with a method of preparation.
摘要翻译：提供包括锗的纳米结构，其包括直径小于1微米的导线和宽度小于1微米的与基底接触并从基底向外延伸的纳米结构以及制备方法。

84. 发明申请

US20110108115A1 Forming a Photovoltaic Device 审中-公开
标题翻译：形成光伏器件
公开(公告)号：US20110108115A1
公开(公告)日：2011-05-12
申请号：US12616745
申请日：2009-11-11
申请人： Hariklia Deligianni , Lubomyr T. Romankiw , Raman Vaidyanathan
发明人： Hariklia Deligianni , Lubomyr T. Romankiw , Raman Vaidyanathan
IPC分类号： H01L31/0296 , H01L31/18
CPC分类号： H01L31/0322 , C25D3/56 , H01L31/18 , Y02E10/541
摘要： Methods for forming photovoltaic devices, methods for forming semiconductor compounds, photovoltaic device and chemical solutions are presented. For example, a method for forming a photovoltaic device comprising a semiconductor layer includes forming the semiconductor layer by electrodeposition from an electrolyte solution. The electrolyte solution includes copper, indium, gallium, selenous acid (H2SeO3) and water.
摘要翻译：提出了形成光伏器件的方法，形成半导体化合物的方法，光伏器件和化学溶液。例如，形成包含半导体层的光电器件的方法包括通过电解液的电沉积来形成半导体层。电解质溶液包括铜，铟，镓，硒酸（H 2 SeO 3）和水。

85. 发明申请

US20100218814A1 METHOD OF CONTROLLING THE COMPOSITION OF A PHOTOVOLTAIC THIN FILM 有权
标题翻译：控制光伏薄膜组成的方法
公开(公告)号：US20100218814A1
公开(公告)日：2010-09-02
申请号：US12556335
申请日：2009-09-09
申请人： Hariklia Deligianni , Harold J. Hovel , Raman Vaidvanathan
发明人： Hariklia Deligianni , Harold J. Hovel , Raman Vaidvanathan
IPC分类号： H01L31/0216 , H01L31/18 , H01L21/3205 , H01L21/31
CPC分类号： H01L31/0749 , H01L31/0322 , Y02E10/541
摘要： A method of reducing the loss of elements of a photovoltaic thin film structure during an annealing process, includes depositing a thin film on a substrate, wherein the thin film includes a single chemical element or a chemical compound, coating the thin film with a protective layer to form a coated thin film structure, wherein the protective layer prevents part of the single chemical element or part of the chemical compound from escaping during an annealing process, and annealing the coated thin film structure to form a coated photovoltaic thin film structure, wherein the coated photovoltaic thin film retains the part of the single chemical element or the part of the chemical compound that is prevented from escaping during the annealing by the protective layer.
摘要翻译：一种在退火工艺中减少光伏薄膜结构元件损耗的方法，包括在衬底上沉积薄膜，其中薄膜包括单一化学元素或化合物，用保护层涂覆薄膜以形成涂覆的薄膜结构，其中所述保护层防止在退火过程期间所述单一化学元素或所述化学化合物的一部分的部分逸出，并且使所述涂覆的薄膜结构退火以形成涂覆的光伏薄膜结构，其中涂覆的光伏薄膜保留在保护层退火期间防止单一化学元素或化学化合物部分逸出的部分。

86. 发明授权

US07638406B2 Method of fabricating a high Q factor integrated circuit inductor 有权
标题翻译：制造高Q因子集成电路电感的方法
公开(公告)号：US07638406B2
公开(公告)日：2009-12-29
申请号：US11320375
申请日：2005-12-28
申请人： Daniel C. Edelstein , Panayotis C. Andricacos , John M. Cotte , Hariklia Deligianni , John H. Magerlein , Kevin S. Petrarca , Kenneth J. Stein , Richard P. Volant
发明人： Daniel C. Edelstein , Panayotis C. Andricacos , John M. Cotte , Hariklia Deligianni , John H. Magerlein , Kevin S. Petrarca , Kenneth J. Stein , Richard P. Volant
IPC分类号： H01L21/20
CPC分类号： H01L24/12 , H01L23/5227 , H01L23/53238 , H01L24/03 , H01L24/05 , H01L27/08 , H01L28/10 , H01L2224/0401 , H01L2224/04042 , H01L2224/05007 , H01L2224/05014 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05084 , H01L2224/05555 , H01L2224/05557 , H01L2224/05558 , H01L2224/05624 , H01L2224/05644 , H01L2224/13007 , H01L2224/13022 , H01L2224/13023 , H01L2224/13099 , H01L2224/45124 , H01L2224/45144 , H01L2224/48624 , H01L2224/48644 , H01L2224/48724 , H01L2224/48744 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2924/05042 , H01L2924/14 , H01L2924/19042 , H01L2924/30107 , H01L2924/00014 , H01L2924/00
摘要： A method of forming an inductor. The method includes: forming a dielectric layer on a substrate; forming a lower trench in the dielectric layer; forming a liner in the lower trench and on the dielectric layer; forming a Cu seed layer over the liner; forming a resist layer on the Cu seed layer; forming an upper trench in the resist layer; electroplating Cu to completely fill the lower trench and at least partially fill the upper trench; removing the resist layer; selectively forming a passivation layer on all exposed Cu surfaces; selectively removing the Cu seed layer from regions of the liner; and removing the thus exposed regions of the liner from the dielectric layer, wherein a top surface of the inductor extends above a top surface of the dielectric layer, the passivation layer remaining on regions of sidewalls of the inductor above the top surface of the dielectric layer.
摘要翻译：一种形成电感器的方法。该方法包括：在基板上形成电介质层; 在介电层中形成下沟槽; 在下沟槽和电介质层上形成衬垫; 在衬套上形成Cu籽晶层; 在Cu籽晶层上形成抗蚀剂层; 在抗蚀剂层中形成上沟槽; 电镀Cu以完全填充下沟槽并且至少部分地填充上沟槽; 去除抗蚀剂层; 在所有暴露的Cu表面上选择性地形成钝化层; 从所述衬垫的区域选择性地去除所述Cu籽晶层; 以及从所述电介质层去除所述衬垫的这样暴露的区域，其中所述电感器的顶表面延伸到所述电介质层的顶表面之上，所述钝化层保留在所述电介质的位于所述电介质层的顶表面之上的侧壁的区域上。

87. 发明申请

US20090302353A1 STRUCTURES CONTAINING ELECTRODEPOSITED GERMANIUM AND METHODS FOR THEIR FABRICATION 有权
标题翻译：含有电沉积锗的结构及其制备方法
公开(公告)号：US20090302353A1
公开(公告)日：2009-12-10
申请号：US12541499
申请日：2009-08-14
申请人： Stephen W. Bedell , Hariklia Deligianni , Qiang Huang , Lubomyr T. Romankiw , Devendra K. Sadana , Katherine L. Saenger
发明人： Stephen W. Bedell , Hariklia Deligianni , Qiang Huang , Lubomyr T. Romankiw , Devendra K. Sadana , Katherine L. Saenger
IPC分类号： H01L29/165 , H01L29/16 , H01L29/78 , H01L27/092 , H01L29/12
CPC分类号： H01L21/823807 , H01L21/0237 , H01L21/02532 , H01L21/02628 , H01L21/02636 , H01L21/02639 , H01L21/28255 , H01L29/1054 , H01L29/78
摘要： Methods for electrodepositing germanium on various semiconductor substrates such as Si, Ge, SiGe, and GaAs are provided. The electrodeposited germanium can be formed as a blanket or patterned film, and may be crystallized by solid phase epitaxy to the orientation of the underlying semiconductor substrate by subsequent annealing. These plated germanium layers may be used as the channel regions of high-mobility channel field effect transistors (FETs) in complementary metal oxide semiconductor (CMOS) circuits.
摘要翻译：提供了在诸如Si，Ge，SiGe和GaAs的各种半导体衬底上电沉积锗的方法。电沉积锗可以形成为覆盖或图案化的膜，并且可以通过后续退火使固相外延结晶到下面的半导体衬底的取向。这些电镀锗层可以用作互补金属氧化物半导体（CMOS）电路中的高迁移率沟道场效应晶体管（FET）的沟道区。

88. 发明申请

US20090179279A1 METAL GATE ELECTRODE STABILIZATION BY ALLOYING 有权
标题翻译：金属门电极通过合金稳定
公开(公告)号：US20090179279A1
公开(公告)日：2009-07-16
申请号：US12014511
申请日：2008-01-15
申请人： Veeraraghavan S. Basker , Hariklia Deligianni , Rajarao Jammy , Vamsi K. Paruchuri , Lubomyr T. Romankiw
发明人： Veeraraghavan S. Basker , Hariklia Deligianni , Rajarao Jammy , Vamsi K. Paruchuri , Lubomyr T. Romankiw
IPC分类号： H01L21/283 , H01L29/43 , C25D3/00
CPC分类号： C25D3/567 , C25D5/02 , C25D7/12 , H01L21/28079 , H01L21/28088 , H01L21/28176 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： Stabilized metal gate electrode for complementary metal-oxide-semiconductor (“CMOS”) applications and methods of making the stabilized metal gate electrodes are disclosed. Specifically, the metal gate electrodes are stabilized by alloying wherein the alloy comprises a metal selected from the group consisting of Re, Ru, Pt, Rh, Ni, Al and combinations thereof and an element selected from the group consisting of W, V, Ti, Ta and combinations thereof.
摘要翻译：公开了用于互补金属氧化物半导体（“CMOS”）应用的稳定金属栅极电极和制造稳定的金属栅电极的方法。具体地说，金属栅电极通过合金化来稳定化，其中合金包括选自Re，Ru，Pt，Rh，Ni，Al及其组合的金属和选自W，V，Ti ，Ta及其组合。

89. 发明授权

US07539051B2 Memory storage devices comprising different ferromagnetic material layers, and methods of making and using the same 有权
标题翻译：包含不同铁磁材料层的存储器存储装置及其制造和使用方法
公开(公告)号：US07539051B2
公开(公告)日：2009-05-26
申请号：US11620445
申请日：2007-01-05
申请人： Hariklia Deligianni , Qiang Huang , Lubomyr T. Romankiw
发明人： Hariklia Deligianni , Qiang Huang , Lubomyr T. Romankiw
IPC分类号： G11C11/15
CPC分类号： G11C19/0808 , G11C11/161 , G11C11/1675 , Y10S977/933
摘要： A memory storage device that contains alternating first and second ferromagnetic material layers is provided. Each first ferromagnetic material layer has a first layer thickness (L1) and a first critical current density (JC1), and each second ferromagnetic material layer has a second layer thickness (L2) and a second critical current density (JC2), provided that JC1
摘要翻译：提供了包含交替的第一和第二铁磁材料层的存储器存储装置。每个第一铁磁材料层具有第一层厚度（L1）和第一临界电流密度（JC1），并且每个第二铁磁材料层具有第二层厚度（L2）和第二临界电流密度（JC2），条件是JC1

90. 发明申请

US20090127121A1 METHOD AND APPARATUS FOR ELECTROPLATING ON SOI AND BULK SEMICONDUCTOR WAFERS 有权
标题翻译：在SOI和大块半导体波导上电镀的方法和装置
公开(公告)号：US20090127121A1
公开(公告)日：2009-05-21
申请号：US11940720
申请日：2007-11-15
申请人： Veeraraghavan S. Basker , Eduard Cartier , Hariklia Deligianni , Rajarao Jammy , Vamsi K. Paruchuri
发明人： Veeraraghavan S. Basker , Eduard Cartier , Hariklia Deligianni , Rajarao Jammy , Vamsi K. Paruchuri
IPC分类号： C25D5/00 , C25D17/00
CPC分类号： C25D5/18 , C25D5/024 , C25D17/001 , C25D17/002 , C25D17/005 , H01L21/2885 , H01L21/7624
摘要： An electroplating apparatus and method for depositing a metallic layer on the surface of a wafer is provided wherein said apparatus and method do not require physical attachment of an electrode to the wafer. The surface of the wafer to be plated is positioned to face the anode and a plating fluid is provided between the wafer and the electrodes to create localized metallic plating. The wafer may be positioned to physically separate and lie between the anode and cathode so that one side of the wafer facing the anode contains a catholyte solution and the other side of the wafer facing the cathode contains an anolyte solution. Alternatively, the anode and cathode may exist on the same side of the wafer in the same plating fluid. In one example, the anode and cathode are separated by a semi permeable membrane.
摘要翻译：提供了一种用于在晶片的表面上沉积金属层的电镀设备和方法，其中所述设备和方法不需要将电极物理附接到晶片。要镀覆的晶片的表面被定位成面对阳极，并且在晶片和电极之间设置电镀液以产生局部金属电镀。晶片可以被定位成物理分离并且位于阳极和阴极之间，使得面向阳极的晶片的一侧包含阴极电解液，并且晶片的面向阴极的另一侧包含阳极电解液。或者，阳极和阴极可以存在于同一电镀液中晶片的同一侧。在一个实例中，阳极和阴极被半透膜隔开。

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