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    • 82. 发明授权
    • Display apparatus with improved sensing speed of resolution change and sensing method thereof
    • 具有改进的分辨率变化的感测速度的显示装置及其感测方法
    • US06822660B2
    • 2004-11-23
    • US09918254
    • 2001-07-30
    • Min-Su Kim
    • Min-Su Kim
    • G09G500
    • G09G1/167
    • A display apparatus is provided for displaying a picture signal which is synchronized with a synchronization signal provided from a host. The display apparatus includes: a counting circuit for counting a first number of pulses of the synchronization signal provided from the host, and generating a counted number of pulses in a predetermined time period; a register for storing the first number of the pulses provided from the counting circuit; and a comparator for comparing a second number of pulses newly provided from the counting circuit with the first number of pulses stored in the register, and generating a resolution change sensing signal when the first number of pulses and the second number of pulses are different.
    • 提供一种用于显示与从主机提供的同步信号同步的图像信号的显示装置。 显示装置包括:计数电路,用于对从主机提供的同步信号的第一数量的脉冲进行计数,并且在预定时间段内产生计数的脉冲数; 用于存储从计数电路提供的第一脉冲数的寄存器; 以及比较器,用于将从计数电路新提供的第二脉冲数与存储在寄存器中的第一数量的脉冲进行比较,以及当第一脉冲数和第二脉冲数不同时,产生分辨率变化感测信号。
    • 83. 发明授权
    • SOI structure and method of producing same
    • US06656806B2
    • 2003-12-02
    • US10096185
    • 2002-03-11
    • Min-Su Kim
    • Min-Su Kim
    • H01L21336
    • H01L27/1203H01L21/76264H01L21/76895H01L21/84
    • A Silicon On Insulator (SOI) structure and method of producing an SOI structure that can prevent a short circuit between a Local Inter-Connect (LIC) and a well in the SOI structure is disclosed. The SOI structure includes a BOX layer of insulation material formed on a silicon substrate; an SOI layer formed on the BOX layer; a well formed within a device isolation area of the SOI layer such that its lower surface is in contact with the BOX layer; a field oxide film formed on a surface side within the well; a gate line formed across an active area on the SOI layer and a portion on the field oxide film; an N+ type source/drain area formed within the active area along both sides of the gate line to contact its lower surface with the BOX layer; an insulation layer formed on such resultant structure; and an opening part that is formed within the insulation layer. The opening part can be opened in a Full Trench (FT) structure so that the active area is partially exposed, and can be opened in a Partial Trench (PT) structure on the field oxide film so that an upper part of the gate line of an adjacent transistor is exposed. An LIC fills in the opening part within the insulation layer, and in such construction, the SOI element is designed by an FT-LIC structure where the LIC is contacted with one portion of the active area of an optional transistor, and by a PT-LIC structure where the LIC is contacted with an upper part of the gate line on the field oxide film.
    • 84. 发明授权
    • Flash memory device and method of programming the same
    • 闪存设备及其编程方法相同
    • US08976584B2
    • 2015-03-10
    • US13767535
    • 2013-02-14
    • Jinman HanHo-Chul LeeMin-Su KimSangwan NamJunghoon Park
    • Jinman HanHo-Chul LeeMin-Su KimSangwan NamJunghoon Park
    • G11C11/34G06F12/02G11C16/04G11C16/34H01L27/115
    • G06F12/0246G11C16/0483G11C16/3418H01L27/11582
    • A method is provided for programming a flash memory device including memory cells formed in a direction perpendicular to a substrate, a first sub word line connected to first memory cells and selectable by a first selection line, and a second sub word line connected to second memory cells and selectable by a second selection line, the first and second memory cells being formed at the same level and being supplied with a program voltage at the same time. The method includes performing LSB program operations on the first and second sub word lines by enabling the first and second selection lines, respectively; performing CSB program operations on the first and second sub word lines by enabling the first and second selection lines, respectively; and performing MSB program operations on the first and second sub word lines by enabling the first and second selection lines, respectively.
    • 提供一种用于编程闪存器件的方法,所述闪存器件包括沿垂直于衬底的方向形成的存储器单元,连接到第一存储器单元并由第一选择线选择的第一子字线以及连接到第二存储器的第二子字线 并且可由第二选择线选择,第一和第二存储器单元在同一电平上形成,同时被提供有编程电压。 该方法包括分别通过启用第一和第二选择线来对第一和第二子字线执行LSB编程操作; 通过分别启用第一和第二选择线来对第一和第二子字线执行CSB编程操作; 以及通过分别启用第一和第二选择线来对第一和第二子字线执行MSB编程操作。
    • 85. 发明授权
    • Flip-flop circuit and scan flip-flop circuit
    • 触发电路和扫描触发器电路
    • US08656238B2
    • 2014-02-18
    • US13049427
    • 2011-03-16
    • Hyoung-Wook LeeMin-Su KimChung-Hee KimJin-Soo Park
    • Hyoung-Wook LeeMin-Su KimChung-Hee KimJin-Soo Park
    • G01R31/28
    • G06F11/24
    • A scan flip-flop circuit includes a pulse generator, a dynamic input unit and a latch output unit. The pulse generator generates a pulse signal which is enabled in synchronization with a rising edge of a clock signal in a normal mode, and is selectively enabled in synchronization with the rising edge of the clock signal in response to a logic level of a scan input signal in a scan mode. The dynamic input unit precharges a first node to a power supply voltage in a first phase of the clock signal, selectively discharges the first node in the normal mode, and discharges the first node in the scan mode. The latch output unit latches an internal signal provided from the first node to provide an output data, and determines whether the output data is toggled based on the clock signal and a previous state of the output data.
    • 扫描触发电路包括脉冲发生器,动态输入单元和锁存器输出单元。 脉冲发生器产生脉冲信号,其在正常模式下与时钟信号的上升沿同步使能,并且响应于扫描输入信号的逻辑电平而与时钟信号的上升沿同步地选择性地使能 处于扫描模式。 动态输入单元在时钟信号的第一阶段中将第一节点预充电到电源电压,以正常模式选择性地放电第一节点,并以扫描模式放电第一节点。 闩锁输出单元锁存从第一节点提供的内部信号以提供输出数据,并且基于时钟信号和输出数据的先前状态来确定输出数据是否被切换。
    • 86. 发明申请
    • INTEGRATED CIRCUIT PULSE GENERATORS
    • 集成电路脉冲发生器
    • US20120319753A1
    • 2012-12-20
    • US13527214
    • 2012-06-19
    • Min-Su KimYong-Jin YoonJi-Kyum Kim
    • Min-Su KimYong-Jin YoonJi-Kyum Kim
    • H03L7/00
    • H03K5/05
    • An integrated circuit device includes a clock delay circuit configured to receive a clock signal and a pulse signal and to produce an output signal therefrom. The clock delay circuit is configured to transition the output signal to a first state responsive to a first state of the clock signal and to transition the output signal to a second state responsive to a first state transition of the pulse signal. The integrated circuit device further includes a pulse generator circuit configured to receive the clock signal and the output signal and to produce the pulse signal therefrom. The pulse generator circuit is configured to generate the first state transition in the pulse signal responsive to a transition of the clock signal to a second state and to generate a second state transition in the pulse signal responsive to the transition of the output signal to the second state.
    • 集成电路装置包括:时钟延迟电路,被配置为接收时钟信号和脉冲信号并从其产生输出信号。 时钟延迟电路被配置为响应于时钟信号的第一状态而将输出信号转换到第一状态,并且响应于脉冲信号的第一状态转换而将输出信号转变到第二状态。 集成电路装置还包括脉冲发生器电路,其被配置为接收时钟信号和输出信号并从其产生脉冲信号。 脉冲发生器电路被配置为响应于时钟信号向第二状态的转变而产生脉冲信号中的第一状态转换,并且响应于输出信号向第二状态的转变而产生脉冲信号中的第二状态转换 州。
    • 89. 发明授权
    • Polarizer and liquid crystal display using the same
    • 偏光镜和液晶显示器使用相同
    • US08164715B2
    • 2012-04-24
    • US12309761
    • 2007-07-27
    • Jae-Hong ParkJong-Sung ParkMin-Su KimSung-Hyun Kim
    • Jae-Hong ParkJong-Sung ParkMin-Su KimSung-Hyun Kim
    • G02F1/1333G02B5/30G02B27/28
    • G02B5/3033G02B1/105G02B1/11G02B1/14G02B1/16G02F1/133528G02F1/13452
    • Disclosed is a liquid crystal display and a polarizing plate used in the same. The liquid crystal display includes a liquid crystal cell and a first polarizing plate and a second polarizing plate respectively provided on each side of the liquid crystal cell. The first polarizing plate and the second polarizing plate each includes a polyvinyl alcohol polarizing film and protective films provided on both sides of the polyvinyl alcohol polarizing film, the protective films that are provided on surfaces opposite to the liquid crystal cell of the first polarizing plate and the second polarizing plate each has vapor transmissivity of 100 g/m Day or less, and the protective films that are provided on surfaces abutting the liquid crystal cell of the first polarizing plate and the second polarizing plate each has the vapor transmissivity of more than 1,500 g/m Day. When the protective films that are provided on surfaces opposite to the liquid crystal cell of the first polarizing plate and the second polarizing plate each has a UV absorption ability, the protective films that are provided on surfaces abutting the liquid crystal cell of the first polarizing plate and the second polarizing plate each has the vapor transmissivity of more than 200 g/m Day.
    • 公开了一种液晶显示器和偏光板。 液晶显示器包括分别设置在液晶单元的每一侧的液晶单元和第一偏振板和第二偏振板。 第一偏振片和第二偏振片各自包含聚乙烯醇偏振片和设置在聚乙烯醇偏振片两侧的保护膜,所述保护膜设置在与第一偏振片的液晶单元相反的表面上, 第二偏光板各自具有100g / m 2天以下的蒸气透过率,并且设置在与第一偏振片和第二偏振片的液晶单元抵接的表面上的保护膜各自具有大于1500的蒸汽透过率 g / m天。 当设置在与第一偏振片和第二偏振片的液晶单元相对的表面上的保护膜各自具有UV吸收能力时,设置在与第一偏振板的液晶单元相邻的表面上的保护膜 并且第二偏振板各自具有大于200g / m 2日的蒸汽透过率。