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81. 发明授权

US08549922B2 Motion detection using capacitor having different work function materials 有权
标题翻译：运动检测使用电容器具有不同的功能材料
公开(公告)号：US08549922B2
公开(公告)日：2013-10-08
申请号：US12720813
申请日：2010-03-10
申请人： Alexander Kalnitsky , Fu-Lung Hsueh
发明人： Alexander Kalnitsky , Fu-Lung Hsueh
IPC分类号： G01P15/125
CPC分类号： G01B7/003 , A63F13/06 , A63F13/211 , A63F13/24 , A63F2300/1043 , A63F2300/105 , G01P3/52 , G01P15/125 , G01P15/16
摘要： An apparatus for detecting mechanical displacement in a micro-electromechanical system includes a capacitor having first and second plates spaced from one another, the first and second plates having different work functions and being electrically connected with each other. The capacitor plates are movable with respect to one another such that a spacing between the plates changes in response to a force. A current through the capacitor represents a rate of change in the spacing between the plates at a given time.
摘要翻译：一种用于检测微机电系统中的机械位移的装置包括具有彼此间隔开的第一和第二板的电容器，所述第一和第二板具有不同的功函数并且彼此电连接。电容器板可以相对于彼此移动，使得板之间的间隔响应于力而变化。通过电容器的电流表示给定时间间板间距的变化率。

82. 发明授权

US08539388B2 Method and apparatus for low power semiconductor chip layout and low power semiconductor chip 有权
标题翻译：低功耗半导体芯片布局和低功耗半导体芯片的方法和装置
公开(公告)号：US08539388B2
公开(公告)日：2013-09-17
申请号：US12852664
申请日：2010-08-09
申请人： Chewn-Pu Jou , Ming-Tsun Lin , Fu-Lung Hsueh , Shauh-Teh Juang
发明人： Chewn-Pu Jou , Ming-Tsun Lin , Fu-Lung Hsueh , Shauh-Teh Juang
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F17/505 , G06F2217/78
摘要： A layout system is described comprising a layout unit configured to layout cells in a mask design for a semiconductor chip based on library cells for a specified process node; a non-critical path determination unit configured to determine a non-critical path in the semiconductor chip; a cell determination unit configured to determine a group of cells in the mask design that form a part of the non-critical path and determine the corresponding library cell for at least one of the group of cells; a library cell modifying unit configured to modify one or more corresponding library cells to form a corresponding modified library cell; and a cell replacement unit configured to replace a library cell in the group of cells in the mask design that form a part of the non-critical path with the corresponding modified library cell.
摘要翻译：描述布局系统，其包括布局单元，其被配置为基于用于指定处理节点的库单元为半导体芯片的掩模设计布置单元; 非关键路径确定单元，被配置为确定半导体芯片中的非关键路径; 细胞确定单元，被配置为确定所述掩模设计中形成所述非关键路径的一部分的一组细胞，并确定所述细胞组中的至少一个的相应库细胞; 文库细胞修饰单元，被配置为修饰一个或多个相应的文库细胞以形成相应的修饰的文库细胞; 以及细胞置换单元，被配置为用形成所述非关键路径的一部分的掩模设计中的所述细胞组中的库单元替换相应的修改的库单元。

83. 发明授权

US08451033B2 Millimeter-wave wideband frequency doubler 有权
标题翻译：毫米波宽带倍频器
公开(公告)号：US08451033B2
公开(公告)日：2013-05-28
申请号：US12967160
申请日：2010-12-14
申请人： Po-Yi Wu , Hsieh-Hung Hsieh , Ho-Hsiang Chen , Tzu-Jin Yeh , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： Po-Yi Wu , Hsieh-Hung Hsieh , Ho-Hsiang Chen , Tzu-Jin Yeh , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H03B19/00
CPC分类号： H03B19/00
摘要： A millimeter-wave wideband frequency doubler stage for use in a distributed frequency doubler includes: a differential input pair of transistors, each transistor having respective gate, drain and source terminals, wherein the source terminals are coupled together to a first power supply node and the drain terminals are coupled together at a first node to a second power supply node; first and second pairs of bandpass gate lines coupled to the gate terminals of the transistors; and a pair of bandpass drain lines coupled to the drain terminals of the transistors.
摘要翻译：用于分布式倍频器的毫米波宽带倍频器级包括：差分输入对晶体管，每个晶体管具有相应的栅极，漏极和源极端子，其中源极端子耦合到第一电源节点，并且漏极端子在第一节点耦合到第二电源节点; 耦合到晶体管的栅极端子的第一和第二对带通栅极线; 以及耦合到晶体管的漏极端子的一对带通漏极线。

84. 发明授权

US08450672B2 CMOS image sensors formed of logic bipolar transistors 有权
标题翻译： CMOS图像传感器由逻辑双极晶体管组成
公开(公告)号：US08450672B2
公开(公告)日：2013-05-28
申请号：US12751552
申请日：2010-03-31
申请人： Shine Chung , Tao-Wen Chung , Fu-Lung Hsueh
发明人： Shine Chung , Tao-Wen Chung , Fu-Lung Hsueh
IPC分类号： H01L27/146 , H01L31/101
CPC分类号： H01L27/14609 , H01L27/14601 , H01L27/14643 , H01L31/0352
摘要： An integrated circuit structure includes an image sensor cell, which further includes a photo transistor configured to sense light and to generate a current from the light.
摘要翻译：集成电路结构包括图像传感器单元，其还包括被配置为感测光并从光产生电流的光电晶体管。

85. 发明申请

US20130038418A1 CONTACTLESS COMMUNICATIONS USING FERROMAGNETIC MATERIAL 有权
标题翻译：使用纤维材料的无缝通信
公开(公告)号：US20130038418A1
公开(公告)日：2013-02-14
申请号：US13206584
申请日：2011-08-10
申请人： Ping-Lin Yang , Jun-De Jin , Fu-Lung Hsueh , Sa-Lly Liu , Tong-Chern Ong , Chun-Jung Lin , Ya-Chen Kao
发明人： Ping-Lin Yang , Jun-De Jin , Fu-Lung Hsueh , Sa-Lly Liu , Tong-Chern Ong , Chun-Jung Lin , Ya-Chen Kao
IPC分类号： H01F38/14 , H01F41/00
CPC分类号： H01L25/0657 , H01F5/00 , H01F27/2804 , H01F41/046 , H01F2027/2809 , H01L23/48 , H01L23/5227 , H01L2225/06531 , H01L2924/0002 , Y10T29/4902 , H01L2924/00
摘要： A communications structure comprises a first semiconductor substrate having a first coil, and a second semiconductor substrate having a second coil above the first semiconductor substrate. Inner edges of the first and second coils define a boundary of a volume that extends below the first coil and above the second coil. A ferromagnetic core is positioned at least partially within the boundary, such that a mutual inductance is provided between the first and second coils for wireless transmission of signals or power between the first and second coils.
摘要翻译：通信结构包括具有第一线圈的第一半导体衬底和在第一半导体衬底上方具有第二线圈的第二半导体衬底。第一和第二线圈的内边缘限定在第一线圈下方延伸并在第二线圈之上的体积的边界。铁磁芯至少部分地位于边界内，使得在第一和第二线圈之间提供互感以在第一和第二线圈之间无线地传输信号或电力。

86. 发明授权

US08324970B2 Circuit and method for radio frequency amplifier 有权
标题翻译：射频放大器电路及方法
公开(公告)号：US08324970B2
公开(公告)日：2012-12-04
申请号：US12894903
申请日：2010-09-30
申请人： Chewn-Pu Jou , Fu-Lung Hsueh , Sally Liu
发明人： Chewn-Pu Jou , Fu-Lung Hsueh , Sally Liu
IPC分类号： H03F3/04
CPC分类号： H03F3/19 , H01L29/78
摘要： A radio frequency amplifier circuit includes a substrate that is capable of receiving a substrate bias voltage. The source of a transistor is capable of receiving a source bias voltage. The drain of the transistor is capable of receiving a drain bias voltage. The gate of the transistor is located between the source and the drain. A radio frequency input signal is coupled to the gate. A substrate bias circuit provides the substrate bias voltage. The substrate bias voltage and the source bias voltage forward bias the first diode formed by the source and the substrate. The substrate bias voltage and the drain bias voltage reverse bias the second diode formed by the drain and the substrate.
摘要翻译：射频放大器电路包括能够接收衬底偏置电压的衬底。晶体管的源极能够接收源极偏置电压。晶体管的漏极能够接收漏极偏置电压。晶体管的栅极位于源极和漏极之间。射频输入信号耦合到门。衬底偏置电路提供衬底偏置电压。衬底偏置电压和源极偏置电压正向偏置由源极和衬底形成的第一二极管。衬底偏置电压和漏极偏置电压反向偏置由漏极和衬底形成的第二二极管。

87. 发明授权

US08295018B2 Transmission-line-based ESD protection 有权
标题翻译：基于传输线路的ESD保护
公开(公告)号：US08295018B2
公开(公告)日：2012-10-23
申请号：US12843082
申请日：2010-07-26
申请人： Hsieh-Hung Hsieh , Po-Yi Wu , Ho-Hsiang Chen , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： Hsieh-Hung Hsieh , Po-Yi Wu , Ho-Hsiang Chen , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H02H9/00 , H01C7/12 , H02H1/00 , H02H1/04 , H02H3/22 , H02H9/06
CPC分类号： H03F1/52 , H01L27/0288 , H03F3/189 , H03F2200/255 , H03F2200/441 , H03F2200/444
摘要： An ESD protection circuit includes a signal pad, a short circuited shunt stub on-chip with and coupled to the signal pad, an open circuited shunt stub on-chip and coupled to the signal pad.
摘要翻译： ESD保护电路包括信号焊盘，芯片上的短路分流短截线并且耦合到信号焊盘，芯片上的开路分流短截线并耦合到信号焊盘。

88. 发明申请

US20120264269A1 Bipolar Junction Transistors and Methods of Fabrication Thereof 有权
标题翻译：双极结晶体管及其制造方法
公开(公告)号：US20120264269A1
公开(公告)日：2012-10-18
申请号：US13535090
申请日：2012-06-27
申请人： Po-Yao Ke , Tao-Wen Chung , Shine Chung , Fu-Lung Hsueh
发明人： Po-Yao Ke , Tao-Wen Chung , Shine Chung , Fu-Lung Hsueh
IPC分类号： H01L21/8222
CPC分类号： H01L29/73 , H01L21/823431
摘要： A method of forming a semiconductor device is provided. The method includes forming a first fin above a substrate, forming a first emitter region in a first portion of the first fin, forming a first collector region in a second portion of the first fin, and forming a first base region in a third portion of the first fin. The third portion of the first fin is disposed underneath a first gate electrode. The method further includes forming a second fin adjacent to the first fin and above the substrate. The second fin is composed of a semiconductor material. The method also includes forming a first base contact over the second fin. The first base contact is coupled to the first base region through the second fin, the substrate, and the first fin.
摘要翻译：提供一种形成半导体器件的方法。该方法包括在衬底上形成第一鳍片，在第一鳍片的第一部分中形成第一发射极区域，在第一鳍片的第二部分中形成第一集电极区域，并在第三鳍片的第三部分形成第一基底区域第一个翅膀第一鳍片的第三部分设置在第一栅电极下方。该方法还包括形成邻近第一鳍片和衬底上方的第二鳍片。第二鳍由半导体材料构成。该方法还包括在第二翅片上形成第一基底接触。第一基底接触件通过第二鳍片，基底和第一鳍片耦合到第一基底区域。

89. 发明授权

US08207775B2 VOL up-shifting level shifters 有权
标题翻译： VOL上移电平转换器
公开(公告)号：US08207775B2
公开(公告)日：2012-06-26
申请号：US12871343
申请日：2010-08-30
申请人： Chan-Hong Chern , Fu-Lung Hsueh , Yuwen Swei , Chih-Chang Lin
发明人： Chan-Hong Chern , Fu-Lung Hsueh , Yuwen Swei , Chih-Chang Lin
IPC分类号： H03L5/00
CPC分类号： H03K19/0941 , H03K3/356182 , H03K19/018514
摘要： A representative level-shifter comprises a dynamically biased current source circuit that receives a first voltage, a first and a second unidirectional current-conducting devices, a first and a second pull-down devices, and a pull-up device. The first and second unidirectional current-conducting devices are coupled to the dynamically biased current source circuit. A voltage output of the level-shifter is located at a first node that is located between the current-constant circuit and the second unidirectional current-conducting device. The first and second pull-down devices are coupled to the first and second unidirectional current-conducting devices, respectively. The pull-up device receives a second voltage and is coupled to the dynamically biased current source circuit and the first unidirectional current-conducting device. The pull-up device is configured to dynamically bias the dynamically biased current source circuit such that a voltage drop of the second unidirectional current-conducting device is output at the voltage output responsive to the pull-up device outputting the second voltage to the dynamically biased current source circuit, the first pull-down device being non-conducting and the second pull-down device being conducting.
摘要翻译：代表性的电平转换器包括接收第一电压，第一和第二单向导流器件，第一和第二下拉器件以及上拉器件的动态偏置电流源电路。第一和第二单向导流器件耦合到动态偏置电流源电路。电平移位器的电压输出位于位于电流恒定电路和第二单向导流器件之间的第一节点处。第一和第二下拉装置分别耦合到第一和第二单向导流装置。上拉装置接收第二电压并耦合到动态偏置电流源电路和第一单向导流装置。上拉装置被配置为动态地偏置动态偏置的电流源电路，使得第二单向导流装置的电压降在电压输出处被输出，响应于上拉装置将第二电压输出到动态偏置电流源电路，第一下拉装置不导通，第二下拉装置导通。

90. 发明授权

US08193963B2 Method and system for time to digital conversion with calibration and correction loops 有权
标题翻译：用于校准和校正循环的时间到数字转换的方法和系统
公开(公告)号：US08193963B2
公开(公告)日：2012-06-05
申请号：US12874462
申请日：2010-09-02
申请人： You-Jen Wang , Shen-Iuan Liu , Feng-Wei Kuo , Chewn-Pu Jou , Fu-Lung Hsueh
发明人： You-Jen Wang , Shen-Iuan Liu , Feng-Wei Kuo , Chewn-Pu Jou , Fu-Lung Hsueh
IPC分类号： H03M1/50
CPC分类号： G04F10/005
摘要： Methods and apparatuses for time to digital conversion (TDC) are disclosed. A timing circuit comprises a TDC circuit, a calibration module, and a correction module. The TDC circuit is configured to provide a timing signal indicative of a timing difference between edges of a periodic reference clock signal and a variable feedback signal. The TDC circuit is also configured to provide a delay signal that is variably delayed relative to the reference clock signal. The calibration module is configured to provide a calibration signal to increase and decrease a total delay of the TDC circuit based on a time delay of the calibration signal plus a time delay of a correction signal. The correction module, which is configured to receive the timing signal and provide the correction signal, minimizes harmonic spurs in a frequency response of the timing signal by operating at a frequency of the reference clock signal.
摘要翻译：公开了时间到数字转换（TDC）的方法和装置。定时电路包括TDC电路，校准模块和校正模块。 TDC电路被配置为提供指示周期性参考时钟信号的边沿与可变反馈信号之间的定时差的定时信号。 TDC电路还被配置为提供相对于参考时钟信号可变地延迟的延迟信号。校准模块被配置为提供校准信号，以根据校准信号的时间延迟加上校正信号的时间延迟来增加和减少TDC电路的总延迟。被配置为接收定时信号并提供校正信号的校正模块通过在参考时钟信号的频率下工作来最小化定时信号的频率响应中的谐波杂散。

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