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81. 发明授权

US07760125B2 A/D conversion circuit for use with low-potential and high-potential power supplies 失效
标题翻译：用于低电位和高电位电源的A / D转换电路
公开(公告)号：US07760125B2
公开(公告)日：2010-07-20
申请号：US12026901
申请日：2008-02-06
申请人： Yoshiaki Shimizu , Hisao Suzuki , Kenji Ito , Masashi Kijima
发明人： Yoshiaki Shimizu , Hisao Suzuki , Kenji Ito , Masashi Kijima
IPC分类号： H03M1/36
CPC分类号： H03M1/0675 , H03M1/08 , H03M1/165 , H03M1/168 , H03M1/366 , H03M1/42 , H03M1/765
摘要： An A/D conversion circuit including a plurality of resistor elements connected in series between a low-potential power supply and a high-potential power supply. The A/D conversion circuit includes a plurality of comparators that compare a reference voltage divided by each of the resistor elements with an analog input voltage, the comparators having a sample-and-hold function for holding a sampled analog input voltage. The plurality of comparators also include a high-order bit comparator and a low-order bit comparator having different sampling sources. The high-order bit comparator may be configured to compare the analog input voltage and one of the reference voltages to obtain a determination result. The low-order bit comparator may old the analog voltage from the time that the low-order bit comparator retrieves the analog input voltage until the low-order bit comparator performs comparison.
摘要翻译：一种A / D转换电路，包括串联连接在低电位电源和高电位电源之间的多个电阻元件。 A / D转换电路包括将由每个电阻元件划分的参考电压与模拟输入电压进行比较的多个比较器，比较器具有用于保持采样的模拟输入电压的采样保持功能。多个比较器还包括具有不同采样源的高位比较器和低位比较器。高位比较器可以被配置为比较模拟输入电压和参考电压之一以获得确定结果。低位比较器可以从低位比较器检索模拟输入电压直到低位比较器执行比较时的模拟电压为老。

82. 发明申请

US20090213098A1 Reducing Scrolling Effect for LCD Lamps 有权
标题翻译：降低LCD灯的滚动效果
公开(公告)号：US20090213098A1
公开(公告)日：2009-08-27
申请号：US12037762
申请日：2008-02-26
申请人： Vincent Du , Marcelo Goto , Khoua Vang , Yoshiaki Shimizu
发明人： Vincent Du , Marcelo Goto , Khoua Vang , Yoshiaki Shimizu
IPC分类号： G09G5/00
CPC分类号： G09G3/3406 , G09G2320/0247 , G09G2320/064
摘要： A liquid crystal display (LCD) device's microcontroller is used drive an LCD lamp ballast such that the scrolling effect from its light leakage may be reduced to a visually imperceptible level. A check may be performed of lamp's control status in order to verify the microcontroller's ability to properly and accurately control the lamp ballast. The microcontroller may then determine a frequency and duty cycle to use for the microcontroller's PWM control signal. Thereafter, the microcontroller may generate the PWM control signal in accordance with the determined frequency and duty cycle, and drive the lamp ballast using the control signal.
摘要翻译：液晶显示器（LCD）器件的微控制器用于驱动LCD灯镇流器，使得其漏光的滚动效应可能降低到视觉上不可察觉的水平。可以对灯的控制状态进行检查，以验证微控制器正确且准确地控制灯泡镇流器的能力。微控制器然后可以确定用于微控制器的PWM控制信号的频率和占空比。此后，微控制器可以根据确定的频率和占空比产生PWM控制信号，并使用控制信号驱动灯镇流器。

83. 发明申请

US20090015450A1 D/A CONVERSION CIRCUIT AND A/D CONVERSION CIRCUIT 失效
标题翻译： D / A转换电路和A / D转换电路
公开(公告)号：US20090015450A1
公开(公告)日：2009-01-15
申请号：US12026901
申请日：2008-02-06
申请人： Yoshiaki Shimizu , Hisao Suzuki , Kenji Ito , Masashi Kijima
发明人： Yoshiaki Shimizu , Hisao Suzuki , Kenji Ito , Masashi Kijima
IPC分类号： H03M1/00 , H03M1/76
CPC分类号： H03M1/0675 , H03M1/08 , H03M1/165 , H03M1/168 , H03M1/366 , H03M1/42 , H03M1/765
摘要： A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.
摘要翻译：用于以高速执行D / A转换的D / A转换电路。 D / A转换电路包括连接在低电位电源和高电位电源之间的多个电阻元件的电阻串。多个第一开关组连接到电阻元件之间的连接节点，用于选择性地输出连接节点处的电压。第一交换机组的交换机的输出共同连接到对应的一个节点。多个节点通过第二开关组连接到D / A转换电路的输出端。第一开关组的预定开关并联连接到第三开关以向节点施加电压。

84. 发明申请

US20060250441A1 Wiper device and liquid ejection apparatus 失效
公开(公告)号：US20060250441A1
公开(公告)日：2006-11-09
申请号：US11411053
申请日：2006-04-26
申请人： Yoshiaki Shimizu
发明人： Yoshiaki Shimizu
IPC分类号： B41J2/165
CPC分类号： B41J2/16544
摘要： A wiper device of a liquid ejection apparatus includes a first wiper that wipes a nozzle surface defined in a liquid ejection head, a second wiper that wipes a side surface of the liquid ejection head extending in a direction intersecting the nozzle surface, and a drive mechanism that drives the first and second wipers to move between respective standby positions and wiping positions. The second wiper is formed separately from a cap that seals the nozzle surface of the liquid ejection head. The drive mechanism operates to move the second wiper to the corresponding wiping position independently from the first wiper. In this manner, independent wiping of the side surface of the liquid ejection head is performed when desired.

85. 发明授权

US06973409B1 Liquid container, method of manufacturing the same, and method and program of controlling liquid ejecting device 有权
标题翻译：液体容器，其制造方法以及控制液体喷射装置的方法和程序
公开(公告)号：US06973409B1
公开(公告)日：2005-12-06
申请号：US10445455
申请日：2003-05-27
申请人： Yoshiaki Shimizu , Takeo Seino
发明人： Yoshiaki Shimizu , Takeo Seino
IPC分类号： B41J2/01 , B41J2/175 , B41J29/393
CPC分类号： B41J2/17566 , B41J2/17546
摘要： Cartridge total weight SN of an ink bag filled with ink is measured. Ink weight SU of ink stored in the ink bag is calculated from the found cartridge total weight SN (step S17). The ink weight SU is converted into a printable amount and this printable amount is stored in an IC chip as an initial value Sc for calculating a remaining amount (step S19). A printer reads the initial value Sc for calculating the remaining amount from the IC chip, subtracts the ink consumption amount from the initial value Sc for calculating the remaining amount to calculate a new ink remaining amount, and stores the calculated ink remaining amount in the IC chip.
摘要翻译：测量填充有墨的墨袋的墨盒总重量SN。从找到的墨盒总重量SN计算存储在墨水袋中的墨水的墨量SU（步骤S17）。油墨重量SU被转换为可打印量，该可打印量作为用于计算剩余量的初始值Sc被存储在IC芯片中（步骤S19）。打印机读取用于从IC芯片计算剩余量的初始值Sc，从用于计算剩余量的初始值Sc中减去墨水消耗量以计算新的墨水剩余量，并将计算出的墨水剩余量存储在IC 芯片。

86. 发明申请

US20050132753A1 Optical fiber manufacture method, preform manufacture method, and preform manufacture apparatus 审中-公开
标题翻译：光纤制造方法，预制件制造方法和预制件制造装置
公开(公告)号：US20050132753A1
公开(公告)日：2005-06-23
申请号：US11046889
申请日：2005-02-01
申请人： Yoshiaki Shimizu , Takaaki Nagano , Tadakatsu Shimada , Hideo Hirasawa , Masataka Watanabe , Kazuhisa Hatayama , Mitsukuni Sakashita , Minoru Taya , Waichi Yamamura , Shinji Suzuki , Jiro Moriya
发明人： Yoshiaki Shimizu , Takaaki Nagano , Tadakatsu Shimada , Hideo Hirasawa , Masataka Watanabe , Kazuhisa Hatayama , Mitsukuni Sakashita , Minoru Taya , Waichi Yamamura , Shinji Suzuki , Jiro Moriya
IPC分类号： C03B23/047 , C03B37/012 , C03B37/027 , C03B37/07
CPC分类号： C03B23/047 , C03B37/01202 , C03B37/01205 , C03B37/0124 , C03B37/027 , C03B2205/47
摘要： A method for manufacturing an optical fiber comprises setting a heating condition for heating a glass rod, which is a parent material of the optical-fiber, and an elongating speed of the glass rod based on a prescribed numerical value which changes with a progress of elongation of the glass rod; heating and elongating the glass rod to generate a preform based on the heating condition and the elongating speed which are set by the setting; and drawing the preform to a filament-like form by further heating the preform to generate the optical fiber.
摘要翻译：制造光纤的方法包括：设定用于加热作为光纤的母材的玻璃棒的加热条件和根据随着伸长率的变化而变化的规定数值的玻璃棒的拉伸速度的玻璃棒; 加热和拉伸玻璃棒，以根据加热条件和通过设定设定的拉伸速度产生预成型件; 并通过进一步加热预成型件将预成型件拉丝成丝状，以产生光纤。

87. 发明授权

US06568788B2 Ink jet recording apparatus 失效
公开(公告)号：US06568788B2
公开(公告)日：2003-05-27
申请号：US09998428
申请日：2001-12-03
申请人： Yoshiaki Shimizu , Hitoshi Hayakawa , Norihiro Maruyama
发明人： Yoshiaki Shimizu , Hitoshi Hayakawa , Norihiro Maruyama
IPC分类号： B41J2165
CPC分类号： B41J2/16547
摘要： The driving mechanism of the cleaner includes a drive shaft having a sun gear; a gear holding lever that is rotatably and pivotally supported between two rotation stop positions on the drive shaft and rotatably holds a planet gear, which is engaged with the sun gear; and a cleaner drive lever having an inner teeth that is juxtaposed on the gear holding lever, rotatably and pivotally supported on the drive shaft, and is engageable with the planet gear; wherein the cleaner drive lever is formed of a pivotally supporting lever that is caused to turn by engagement of the planet gear with the inner teeth by rotations of the sun gear in a rotation stop state of the gear holding lever and applies a driving force to the cleaner.

88. 发明授权

US6088253A Semiconductor memory device and method for forming same 有权
标题翻译：半导体存储器件及其形成方法
公开(公告)号：US6088253A
公开(公告)日：2000-07-11
申请号：US438844
申请日：1999-11-12
申请人： Yoshiaki Shimizu
发明人： Yoshiaki Shimizu
IPC分类号： G11C11/401 , G11C7/10 , G11C7/22 , G11C11/41 , H01L21/8242 , H01L27/108 , G11C5/02
CPC分类号： G11C7/1078 , G11C7/1051 , G11C7/1072 , G11C7/22
摘要： A synchronous DRAM has a plurality of data pads formed into a data pad row, a plurality of data latch circuits for latching signals from each of the data pads, these data latch circuits being disposed in a region surrounded by a second straight line that is perpendicular to a first straight line that passes over the data pad row and that passes one end of the data pad row, and a third straight line that is parallel to the second straight line and that passes the other end of the data pad row. The length of interconnections from the plurality of data latch circuits to an internal clock signal generating circuit being made the same length, the length of the interconnection between each first stage circuit to each data latch circuit being made the same as the length of the interconnection from the internal clock signal generating circuit to the data latch circuits, and the first stage circuits, the data latch circuits, and the internal clock signal generating circuit being operated by a voltage that is dropped down from an external power supply.
摘要翻译：同步DRAM具有形成数据焊盘行的多个数据焊盘，用于锁存来自每个数据焊盘的信号的多个数据锁存电路，这些数据锁存电路设置在由垂直于第二直线的第二直线包围的区域中到达经过数据焊盘行并且通过数据焊盘行的一端的第一直线，以及平行于第二直线并且通过数据焊盘行的另一端的第三直线。从多个数据锁存电路到内部时钟信号发生电路的互连长度相同，每个第一级电路与每个数据锁存电路之间的互连长度与互连的长度相同内部时钟信号发生电路到数据锁存电路，第一级电路，数据锁存电路和内部时钟信号发生电路由从外部电源下降的电压来操作。

89. 发明授权

US6012218A Process for producing thin film magnetic heads 失效
标题翻译：薄膜磁头制造方法
公开(公告)号：US6012218A
公开(公告)日：2000-01-11
申请号：US42631
申请日：1998-03-17
申请人： Yoshiaki Shimizu , Fumio Tatezono , Naoto Matono , Takashi Ogura , Hiroyuki Okuda , Katsumi Umeda
发明人： Yoshiaki Shimizu , Fumio Tatezono , Naoto Matono , Takashi Ogura , Hiroyuki Okuda , Katsumi Umeda
IPC分类号： G11B5/31 , G11B5/39 , G11B5/127
CPC分类号： G11B5/3967 , G11B5/3116 , G11B5/3163 , Y10T29/49044 , Y10T29/49046
摘要： The invention provides a thin film magnetic head including an upper core layer 9 which comprises a front first core layer 91a formed on a gap spacer layer 6 and having the same width as a track width on the recording medium at least in the vicinity of the face to be opposed to a recording medium, and a second core layer 92 extending from the medium-opposed face over the upper surface of the front first core layer 91a and further over the upper surface of an upper insulating layer 72. The upper core layer 9 has a thickness greater in a region extending from the medium-opposed face to a depth end restricting face DE of a lower insulating layer 71 than in a region extending over the upper surface of the upper insulating layer 72. The front first core layer 91a has an upper surface flush with the upper surface of the lower insulating layer 71. This structure gives an accurate track width and assures production with a high yield.
摘要翻译：本发明提供了一种薄膜磁头，其包括上芯层9，其包括形成在间隙隔离层6上的前第一芯层91a，并且至少在表面附近具有与记录介质上的磁道宽度相同的宽度与记录介质相对，第二芯层92从前第一芯层91a的上表面延伸并且在上绝缘层72的上表面上方从介质相对面延伸。上芯层9 在从中间相对面延伸到下绝缘层71的深度限制面DE的区域中的厚度大于在上绝缘层72的上表面延伸的区域中的厚度。前第一芯层91a具有上表面与下绝缘层71的上表面齐平。这种结构提供了准确的轨道宽度并以高产量确保生产。

90. 发明授权

US6010745A Method for manufacturing a combination read/write thin film magnetic head 有权
标题翻译：制造读写薄膜磁头的方法
公开(公告)号：US6010745A
公开(公告)日：2000-01-04
申请号：US156953
申请日：1998-09-18
申请人： Kiyoshi Sato , Yoshiaki Shimizu
发明人： Kiyoshi Sato , Yoshiaki Shimizu
IPC分类号： G11B5/31 , G11B5/39 , B05D5/12 , C23C14/00
CPC分类号： G11B5/3906 , G11B5/3163 , G11B5/3967
摘要： The lower core layer 7 is formed in approximately constant thickness at the portion confronting the upper core layer so that its thickness gradually reduces toward its side edge. Therefore, the thickness of the layer of the non-magnetic material 8 formed on the lower core layer 7 becomes uniform, stabilizing the coil layer formed thereon. An excellent material of soft magnetic materials can be used since the lower core layer 7 is formed by sputtering, enabling to record at a high frequency.
摘要翻译：下核芯层7在面对上芯层的部分处形成为大致恒定的厚度，使得其厚度朝向其侧边缘逐渐减小。因此，形成在下芯层7上的非磁性材料8的层的厚度变得均匀，使形成在其上的线圈层变得稳定。可以使用软磁性材料的优异材料，因为通过溅射形成下芯层7，能够以高频记录。

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