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71. 发明授权

US08716395B2 Light-emitting-element encapsulating composition, light-emitting diode and liquid-crystal display device 有权
标题翻译：发光元件封装组合物，发光二极管和液晶显示装置
公开(公告)号：US08716395B2
公开(公告)日：2014-05-06
申请号：US13386001
申请日：2010-07-20
申请人： Sang Ki Chun , In Seok Hwang , Dong-Wook Lee , Ji Young Hwang
发明人： Sang Ki Chun , In Seok Hwang , Dong-Wook Lee , Ji Young Hwang
IPC分类号： C08L83/04
CPC分类号： H01L33/56 , C08K3/017 , C08K3/18 , C08K3/30 , C08K5/17 , C08K5/3445 , C08K5/43 , C08K2003/2203 , C08K2201/001 , C08L83/04 , G02F1/1336 , H01B1/22 , H01L23/29 , H01L51/5253
摘要： An encapsulating composition for a light emitting element, a light emitting diode (LED) and a liquid crystal display device (LCD) are provided. A silicone-cured product included as a main ingredient and a conductivity-providing agent having excellent compatibility and capable of providing superior conductivity can be used to significantly reduce the surface resistivity of the silicone-cured product. Therefore, the encapsulating composition for a light emitting element, the LED and the LCD can be useful in solving the problems regarding attachment of a foreign substance such as dust due to static electricity, and degradation of transparency since the composition has low surface resistivity when used as a semiconductor encapsulation material for an LED, and also in providing a cured product having excellent properties such as light resistance, heat resistance, durability and optical transparency.
摘要翻译：本发明提供一种发光元件封装组合物，发光二极管（LED）和液晶显示装置（LCD）。可以使用包含作为主要成分的硅酮固化产物和具有优异相容性并且能够提供优异导电性的导电性提供剂，以显着降低硅氧烷固化产物的表面电阻率。因此，用于发光元件的封装组合物，LED和LCD可用于解决由于静电引起的诸如灰尘等异物的附着和透明度的降低的问题，因为组合物在使用时具有低的表面电阻率作为LED的半导体封装材料，并且还提供具有优异性能如耐光性，耐热性，耐久性和光学透明性的固化产物。

72. 发明授权

US08653644B2 Packaged semiconductor chips with array 有权
标题翻译：阵列封装半导体芯片
公开(公告)号：US08653644B2
公开(公告)日：2014-02-18
申请号：US13407085
申请日：2012-02-28
申请人： Andrey Grinman , David Ovrutsky , Charles Rosenstein , Vage Oganesian
发明人： Andrey Grinman , David Ovrutsky , Charles Rosenstein , Vage Oganesian
IPC分类号： H01L23/50
CPC分类号： H01L23/3128 , H01L23/29 , H01L23/3114 , H01L23/3135 , H01L23/49816 , H01L23/49827 , H01L23/4985 , H01L23/556 , H01L24/17 , H01L25/0657 , H01L25/105 , H01L2224/16148 , H01L2224/274 , H01L2225/06513 , H01L2225/06517 , H01L2225/1058 , H01L2225/1064 , H01L2924/01019 , H01L2924/01079 , H01L2924/01322 , H01L2924/01327 , H01L2924/14 , H01L2924/1436 , H01L2924/3025 , H01L2924/00
摘要： A chip-sized, wafer level packaged device including a portion of a semiconductor wafer including a device, at least one packaging layer containing silicon and formed over the device, a first ball grid array formed over a surface of the at least one packaging layer and being electrically connected to the device and a second ball grid array formed over a surface of the portion of the semiconductor wafer and being electrically connected to the device.
摘要翻译：一种芯片尺寸的晶片级封装器件，其包括半导体晶片的一部分，其包括器件，至少一个包含硅并且形成在器件上的封装层，形成在所述至少一个封装层的表面上的第一球栅阵列;以及电连接到所述装置，以及形成在所述半导体晶片的所述部分的表面上并且电连接到所述装置的第二球栅阵列。

73. 发明申请

US20140027885A1 THREE-DIMENSIONAL INTEGRATED CIRCUIT LAMINATE, AND INTERLAYER FILLER FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT LAMINATE 有权
标题翻译：三维集成电路层叠体和三维集成电路层叠体的层间填料
公开(公告)号：US20140027885A1
公开(公告)日：2014-01-30
申请号：US14041341
申请日：2013-09-30
申请人： Mitsubishi Chemical Corporation
发明人： Yasuhiro KAWASE , Makoto Ikemoto , Hideki Kiritani
IPC分类号： H01L23/532
CPC分类号： H01L23/5329 , H01L21/56 , H01L21/563 , H01L23/29 , H01L23/295 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/92 , H01L25/0657 , H01L2224/0401 , H01L2224/05009 , H01L2224/0557 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/06181 , H01L2224/11334 , H01L2224/11462 , H01L2224/13025 , H01L2224/13147 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/2929 , H01L2224/293 , H01L2224/2937 , H01L2224/29386 , H01L2224/29387 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/92125 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/00014 , H01L2924/01019 , H01L2924/10253 , H01L2924/12044 , H01L2924/15311 , Y10T428/2991 , H01L2924/00012 , H01L2224/05552 , H01L2924/00
摘要： To provide a three-dimensional integrated circuit laminate filled in with an interlayer filler composition having both high thermal conductivity and low linear expansion property.A three-dimensional integrated circuit laminate, which comprises a semiconductor substrate laminate having at least two semiconductor substrates each having a semiconductor device layer formed thereon laminated, and has a first interlayer filler layer containing a resin (A) and an organic filler (B) and having a thermal conductivity of at least 0.8 W/(m·K) between the semiconductor substrate.
摘要翻译：为了提供一种填充有具有高导热性和低线性膨胀性的层间填料组合物的三维集成电路层叠体。一种三维集成电路层叠体，其具有：半导体基板层叠体，其具有形成有半导体器件层的至少两个半导体基板，并且具有含有树脂（A）和有机填料（B）的第一层间填充层，并且在半导体衬底之间具有至少0.8W /（m·K）的热导率。

74. 发明申请

US20140025353A1 Algorithm and a Method for Characterizing Fractal Volumes 审中-公开
标题翻译：算法和表征分形体的方法
公开(公告)号：US20140025353A1
公开(公告)日：2014-01-23
申请号：US13915684
申请日：2013-06-12
申请人： John G. Michopoulos , Athanasios Iliopoulos
发明人： John G. Michopoulos , Athanasios Iliopoulos
IPC分类号： G06F17/50
CPC分类号： C09D163/00 , G06F17/10 , G06F17/5018 , G06F2217/16 , H01L23/29 , H01L2924/0002 , H01L2924/00
摘要： A computer implemented method for obtaining an analytical representation of an internal structure and spatial properties distribution of a selected physical domain includes identifying d-dimensional correspondences of measured spatial properties or field distributions; and applying an inverse algorithm to the d-dimensional spatial properties or field distributions to calculate the Weierstrass-Mandelbrot (W-M) fractal model to thereby determine parameters defining an analytical and continuous Weierstrass-Mandelbrot (W-M) representation.
摘要翻译：用于获得内部结构的分析表示和所选物理域的空间属性分布的计算机实现方法包括识别所测量的空间属性或场分布的d维对应度; 并对d维空间属性或场分布应用逆算法来计算Weierstrass-Mandelbrot（W-M）分形模型，从而确定定义分析和连续Weierstrass-Mandelbrot（W-M）表示的参数。

75. 发明授权

US08630720B2 Implantable device using ultra-nanocrystalline diamond 有权
标题翻译：使用超微晶钻石的植入式装置
公开(公告)号：US08630720B2
公开(公告)日：2014-01-14
申请号：US13474003
申请日：2012-05-17
申请人： Brian V. Mech , Robert J. Greenberg
发明人： Brian V. Mech , Robert J. Greenberg
IPC分类号： A61N1/00
CPC分类号： C23C16/274 , A61K9/0009 , A61N1/0543 , A61N1/36046 , A61N1/375 , C23C16/277 , C23C16/278 , C23C16/279 , H01L23/29 , H01L23/3107 , H01L2924/0002 , H01L2924/00
摘要： An implantable biocompatible electrical device is uniformly covered with a coating approximately one-micron thick of ultra-nanocrystalline diamond, hermetically sealing the electrical device. Selected electrodes are either left uncovered during coating or uncovered by conventional patterning techniques, allowing the electrodes to be exposed to living tissue and fluids. The ultra-nanocrystalline diamond coating may be doped to create electrically conductive electrodes. These approaches eliminate the need for a hermetically sealed lid or cover to protect electrical circuitry, and thus allow the device to be thinner than otherwise possible. The conformal ultra-nanocrystalline diamond coating uniformly covers the device, providing relief from sharp edges and producing a strong, uniformly thick hermetic coating around sharp edges and on high aspect-ratio parts.
摘要翻译：植入式生物相容性电气装置均匀地覆盖有大约1微米厚的超微晶金刚石的涂层，气密地密封电气装置。所选择的电极在涂覆期间未被覆盖或者通过常规图案化技术未被覆盖，允许电极暴露于活组织和流体。超级纳米晶体金刚石涂层可以被掺杂以产生导电电极。这些方法消除了对密封的盖或盖的需要以保护电路，并且因此允许该装置比其它可能的更薄。保形的超纳米晶金刚石涂层均匀地覆盖了该装置，从尖锐的边缘提供浮雕，并在尖锐的边缘和高纵横比的部分上产生强而均匀的厚的密封涂层。

76. 发明申请

US20130320510A1 DURABLE, HEAT-RESISTANT MULTI-LAYER COATINGS AND COATED ARTICLES 有权
标题翻译：耐久，耐热多层涂料和涂层文章
公开(公告)号：US20130320510A1
公开(公告)日：2013-12-05
申请号：US13959601
申请日：2013-08-05
申请人： Applied Microstructures, Inc.
发明人： Boris Kobrin , Nikunj Dangaria , Romuald Nowak , Michael T. Grimes
IPC分类号： H01L23/00 , H01L21/02
CPC分类号： H01L23/564 , B81B3/0075 , B81B2207/115 , B81C1/00206 , B81C1/0038 , H01L21/02126 , H01L21/02164 , H01L21/02214 , H01L21/02271 , H01L21/02304 , H01L21/3127 , H01L21/3141 , H01L21/31604 , H01L21/31612 , H01L21/3162 , H01L23/29 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： An article having a surface treated to provide a protective coating structure in accordance with the following method: vapor depositing a first layer on a substrate, wherein said first layer is a metal oxide adhesion layer selected from the group consisting of an oxide of a Group IIIA metal element, a Group IVB metal element, a Group VB metal element, and combinations thereof; vapor depositing a second layer upon said first layer, wherein said second layer includes a silicon-containing layer selected from the group consisting of silicon oxide, silicon nitride, and silicon oxynitride; and vapor depositing a third layer upon said second layer, wherein said third layer is a functional organic-comprising layer, wherein said functional organic-comprising layer is a SAM.
摘要翻译：具有被处理以提供根据以下方法的保护涂层结构的表面的制品：在基底上气相沉积第一层，其中所述第一层是选自IIIA族的氧化物的金属氧化物粘附层金属元素，IVB族金属元素，VB族金属元素及其组合; 在所述第一层上气相沉积第二层，其中所述第二层包括选自氧化硅，氮化硅和氮氧化硅的含硅层; 并且在所述第二层上气相沉积第三层，其中所述第三层是包含功能的有机物的层，其中所述含有功能的有机物层是SAM。

77. 发明申请

US20130270720A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
公开(公告)号：US20130270720A1
公开(公告)日：2013-10-17
申请号：US13912309
申请日：2013-06-07
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Tomoyuki AOKI , Takuya TSURUME , Hiroki ADACHI , Nozomi HORIKOSHI , Hisashi OHTANI
IPC分类号： H01L23/29
CPC分类号： H01L23/29 , G06K19/07749 , H01L21/563 , H01L23/145 , H01L23/295 , H01L23/3121 , H01L23/60 , H01L23/66 , H01L27/1214 , H01L27/1266 , H01L27/13 , H01L2223/6677 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/09701 , H01L2924/12032 , H01L2924/12044 , H01L2924/19041 , H01L2924/3025 , Y10T428/31522 , H01L2924/00
摘要： A separation layer and a semiconductor element layer including a thin film transistor are formed. A conductive resin electrically connected to the semiconductor element layer is formed. A first sealing layer including a fiber and an organic resin layer is formed over the semiconductor element layer and the conductive resin. A groove is formed in the first sealing layer, the semiconductor element layer, and the separation layer. A liquid is dropped into the groove to separate the separation layer and the semiconductor element layer. The first sealing layer over the conductive resin is removed to form an opening. A set of the first sealing layer and the semiconductor element layer is divided into a chip. The chip is bonded to an antenna formed over a base material. A second sealing layer including a fiber and an organic resin layer is formed so as to cover the antenna and the chip.

78. 发明申请

US20130256922A1 Method for Fabricating a Semiconductor Device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20130256922A1
公开(公告)日：2013-10-03
申请号：US13432633
申请日：2012-03-28
申请人： Michael Bauer , Daniel Porwol , Ulrich Wachter
发明人： Michael Bauer , Daniel Porwol , Ulrich Wachter
IPC分类号： H01L23/28 , H01L21/56 , H01L21/78
CPC分类号： H01L23/29 , H01L21/565 , H01L23/24 , H01L23/291 , H01L23/293 , H01L23/3128 , H01L2224/0401 , H01L2224/04105 , H01L2224/05548 , H01L2224/12105 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/1461 , H01L2924/00
摘要： In a method for fabricating a semiconductor device, a carrier and at least one semiconductor chip are provided.
摘要翻译：在制造半导体器件的方法中，提供载体和至少一个半导体芯片。

79. 发明申请

US20130250527A1 ELECTRONIC DEVICE 有权
标题翻译：电子设备
公开(公告)号：US20130250527A1
公开(公告)日：2013-09-26
申请号：US13820080
申请日：2011-10-25
申请人： Hidefumi Hatanaka , Katsura Hayashi
发明人： Hidefumi Hatanaka , Katsura Hayashi
IPC分类号： H01L23/29 , H05K1/18
CPC分类号： H01L23/29 , H01L23/295 , H01L23/3135 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/2929 , H01L2224/29386 , H01L2924/01019 , H01L2924/09701 , H03H9/1007 , H03H9/1078 , H03H9/1085 , H05K1/181 , H01L2224/05624 , H01L2924/00014 , H01L2224/05639 , H01L2224/05647 , H01L2224/05666
摘要： An electronic device is provided wherein the characteristics thereof are prevented from deteriorating. The electronic device (1) is provided with: a chip component (2) having an electronic element (22); a wiring board (3) on which the chip component (2) is mounted with a space therebetween, the space for containing the electronic element (22); a resin layer (4) provided from the surface of the chip component (2) to the surface of the wiring board (3) so as to surround the space; and an inorganic insulating layer (5), which is provided at the resin layer (4) and is positioned at the side of the space. Since entry of water vapor into the space can be reduced not only by means of the resin layer (4) but also by means of the inorganic insulating layer (5), the electronic device (1) having high airtight sealing performance can be provided.
摘要翻译：提供了一种防止其特性劣化的电子设备。电子装置（1）具有：具有电子元件（22）的芯片部件（2）; 芯片组件（2）在其上安装有空间的布线板（3），用于容纳电子元件（22）的空间; 从所述芯片部件（2）的表面向所述布线基板（3）的表面设置以围绕所述空间的树脂层（4）和无机绝缘层（5），其设置在所述树脂层（4）处并位于所述空间侧。由于不仅可以通过树脂层（4）还可以通过无机绝缘层（5）将水蒸汽进入空间，所以可以提供具有高密封性能的电子设备（1）。

80. 发明申请

US20130241086A1 CURABLE EPOXY RESIN COMPOSITION 有权
标题翻译：可固化环氧树脂组合物
公开(公告)号：US20130241086A1
公开(公告)日：2013-09-19
申请号：US13883297
申请日：2011-11-09
申请人： Masanori Sakane
发明人： Masanori Sakane
IPC分类号： C08K3/36 , H01L23/29 , C08K5/52
CPC分类号： C08K3/36 , C08G59/24 , C08K5/52 , C08L63/00 , H01L23/29 , H01L23/293 , H01L2924/0002 , H01L2924/00
摘要： Disclosed is a liquid curable epoxy resin composition which includes a cycloaliphatic epoxy compound (A) having at least one alicyclic skeleton and two or more epoxy groups per molecule; a silica (B); and a phosphite ester (C). The liquid curable epoxy resin composition preferably includes, for example, 5 to 80 parts by weight of the cycloaliphatic epoxy compound (A) having at least one alicyclic skeleton and two or more epoxy groups per molecule; 20 to 95 parts by weight of the silica (B); and 0.001 to 5.0 parts by weight of the phosphite ester (C), per 100 parts by weight of the total amount of the components (A) and (B).
摘要翻译：公开了一种液体固化型环氧树脂组合物，其包含每分子具有至少一个脂环骨架和两个或更多个环氧基团的脂环族环氧化合物（A）二氧化硅（B）; 和亚磷酸酯（C）。液固环氧树脂组合物优选包含例如每分子具有至少一个脂环骨架和两个或更多个环氧基团的脂环族环氧化合物（A）5至80重量份; 20〜95重量份二氧化硅（B）; 和0.001〜5.0重量份的亚磷酸酯（C），相对于成分（A）和（B）的总量100重量份。

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