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    • 73. 发明授权
    • Liquid crystal display device and driving method
    • 液晶显示装置及驱动方法
    • US09251741B2
    • 2016-02-02
    • US13084030
    • 2011-04-11
    • Atsushi Umezaki
    • Atsushi Umezaki
    • G09G3/34G09G5/00
    • G09G3/344G09G3/3433G09G2300/08G09G2310/0205G09G2310/0248G09G2310/0251G09G2310/0272
    • A display device comprising a display area in which a plurality of pixels, a plurality of gate signal lines, and a plurality of source signal lines are arranged in a matrix; a scan line driver circuit having a function of controlling a timing of selecting any one of the plurality of gate signal lines; and a signal line driver circuit having a function of controlling, in a period during which the scan line driver circuit selects any one of the plurality of gate signal lines, a timing of outputting a first signal to all the plurality of source signal lines and then outputting a second signal to any one of the plurality of source signal lines. Each of the plurality of pixels includes a transistor and a display element being sandwiched between a pixel electrode and a common electrode and having memory properties.
    • 一种显示装置,包括:多个像素,多个栅极信号线和多个源极信号线排列成矩阵的显示区域; 扫描线驱动电路,其具有控制选择所述多个栅极信号线中的任一个的定时的功能; 以及信号线驱动电路,具有在扫描线驱动电路选择多个栅极信号线中的任一个的期间,控制对所有多个源极信号线输出第一信号的定时,然后 向所述多个源信号线中的任一个输出第二信号。 多个像素中的每一个包括晶体管和显示元件,其夹在像素电极和公共电极之间并具有记忆特性。
    • 77. 发明申请
    • DISPLAY DEVICE, METHOD OF DRIVING DISPLAY DEVICE, AND SIGNAL OUTPUT CIRCUIT
    • 显示装置,驱动显示装置的方法和信号输出电路
    • US20150302803A1
    • 2015-10-22
    • US14441046
    • 2013-11-08
    • Sony Corporation
    • Takeshi AokiIwao Ushinohama
    • G09G3/32
    • G09G3/3291G09G3/3233G09G3/3283G09G2310/0248G09G2320/045G09G2330/021G09G2370/14H01L27/3276
    • A signal output circuit that alternately supplies a reference voltage and a video signal voltage to a data line includes: an output node to which the data line is connected; a reference voltage node to which the reference voltage is applied; a source amplifier that outputs the video signal voltage in accordance with an input gradation signal; a first switch provided between the output side of the source amplifier and the output node; a second switch provided between the reference voltage node and the output node; and a third switch provided in the power supply path of the source amplifier, wherein, during a scanning period for scanning display elements row by row, switching is performed between a state where the first switch is non-conductive while the second switch is conductive and a state where the first switch is conductive while the second switch is non-conductive, and the third switch is put into a conductive state when the first switch is put into a conductive state, and is put into a non-conductive state when the first switch is put into a non-conductive state.
    • 向数据线交替地提供参考电压和视频信号电压的信号输出电路包括:连接数据线的输出节点; 施加参考电压的参考电压节点; 源放大器,其根据输入灰度信号输出视频信号电压; 设置在所述源极放大器的输出侧与所述输出节点之间的第一开关; 设置在所述参考电压节点和所述输出节点之间的第二开关; 以及设置在所述源极放大器的电源路径中的第三开关,其中,在扫描显示元件逐行扫描期间,在所述第一开关不导通的状态下,在所述第二开关导通的状态下进行切换, 当第二开关不导通时第一开关导通的状态,并且当第一开关处于导通状态时第三开关处于导通状态,并且当第一开关处于导通状态时,当第一开关处于非导通状态时 开关处于非导通状态。
    • 78. 发明授权
    • Circuits for controlling an array of light modulators of a display apparatus to generate display images
    • 用于控制显示装置的光调制器阵列以产生显示图像的电路
    • US09159277B2
    • 2015-10-13
    • US13622980
    • 2012-09-19
    • Pixtronix, Inc.
    • Stephen EnglishStephen R. Lewis
    • G06F3/038G09G3/34
    • G09G3/3466G09G3/346G09G2300/0473G09G2300/0842G09G2310/0248
    • A display includes an array of light modulators each having a first actuator and a second actuator. A control matrix includes a circuit having a first state inverter having an output coupled to an input of a second state inverter. A data store capacitor is coupled to an input of the first inverter and configured to store a data voltage corresponding to a future pixel state of the pixel. A first update interconnect is coupled to the first state inverter and configured such that altering a voltage applied to the first update interconnect causes the first actuator to respond to the stored data voltage. A second update interconnect is coupled to the second state inverter and configured such that altering a voltage applied to the second update interconnect causes the second actuator to respond to a voltage state of the first inverter.
    • 显示器包括每个具有第一致动器和第二致动器的光调制器阵列。 控制矩阵包括具有第一状态反相器的电路,其具有耦合到第二状态反相器的输入的输出。 数据存储电容器耦合到第一反相器的输入,并被配置为存储对应于像素的未来像素状态的数据电压。 第一更新互连耦合到第一状态反相器并且被配置为使得改变施加到第一更新互连的电压使得第一致动器响应于所存储的数据电压。 第二更新互连耦合到第二状态反相器并且被配置为使得改变施加到第二更新互连的电压使得第二致动器响应于第一反相器的电压状态。
    • 79. 发明申请
    • DATA DRIVER AND DISPLAY DEVICE DRIVING METHOD
    • 数据驱动和显示设备驱动方法
    • US20150287374A1
    • 2015-10-08
    • US14566672
    • 2014-12-10
    • AU Optronics Corp.
    • Wei-Jyun ChenChun-Fan ChungSzu-Che Yeh
    • G09G3/36
    • G09G3/3614G09G3/3648G09G3/3688G09G2310/0248
    • A driving method for driving a display apparatus including a plurality of pixels, a plurality of data lines and a data driver. The data driver includes a first latch outputting a first sample data signal to a second latch, the second latch, a first charge sharing line and a second charge sharing line. The method includes performing a first charge sharing when a polarity of one of the pixels changes so as to output a first calibrated data signal to the data line electrically coupled to the pixel, and executing a second charge sharing when the most significant bit of the first sample data signal is different from the most significant bit of the second sample data signal so as to output a second adjusted data signal to the data line.
    • 一种用于驱动包括多个像素,多个数据线和数据驱动器的显示装置的驱动方法。 数据驱动器包括将第一采样数据信号输出到第二锁存器,第二锁存器,第一电荷共享线路和第二电荷共享线路的第一锁存器。 该方法包括当一个像素的极性改变以便将第一校准数据信号输出到与像素电耦合的数据线时执行第一电荷共享,以及当第一电荷分配的最高有效位时执行第二电荷共享 采样数据信号不同于第二采样数据信号的最高有效位,以便将第二调整数据信号输出到数据线。
    • 80. 发明申请
    • PIXEL CIRCUIT AND DISPLAY DEVICE USING THE SAME
    • 像素电路和使用其的显示装置
    • US20150287364A1
    • 2015-10-08
    • US14444157
    • 2014-07-28
    • AU OPTRONICS CORP.
    • Hua-Gang CHANGMan-Wen SHIHChing-Kai LOChien-Chung HUANG
    • G09G3/32
    • G09G3/3291G09G3/3233G09G3/3258G09G3/3266G09G2300/0819G09G2300/0852G09G2300/0861G09G2310/0248G09G2310/061G09G2320/0233G09G2320/043
    • A pixel circuit includes four transistors, two capacitors and a light emitting element. A gate of first transistor receives a scan signal and a source/drain thereof receives a display data. A terminal of first capacitor couples to another source/drain of first transistor. A gate and a source/drain of second transistor couple to another terminal of first capacitor; and another source/drain thereof receives a switch signal. A terminal of second capacitor receives a reset signal; and another terminal thereof couples to another terminal of first capacitor. A gate of third transistor couples to a terminal of first capacitor. A gate of fourth transistor receives an enable signal; a source/drain thereof couples to a first power supply voltage; and another source/drain thereof couples to one source/drain of third transistor. The anode and cathode of the light emitting element couple to one source/drain of third transistor and a second power supply voltage, respectively.
    • 像素电路包括四个晶体管,两个电容器和发光元件。 第一晶体管的栅极接收扫描信号,其源极/漏极接收显示数据。 第一电容器的端子耦合到第一晶体管的另一源极/漏极。 第二晶体管的栅极和源极/漏极耦合到第一电容器的另一个端子; 并且其另一个源极/漏极接收开关信号。 第二电容器的端子接收复位信号; 并且另一个端子耦合到第一电容器的另一个端子。 第三晶体管的栅极耦合到第一电容器的端子。 第四晶体管的栅极接收使能信号; 其源/漏耦合到第一电源电压; 并且其另一个源极/漏极耦合到第三晶体管的一个源极/漏极。 发光元件的阳极和阴极分别耦合到第三晶体管的一个源极/漏极和第二电源电压。